From dcfd37e5ef17a3beec212fc4088f14f3fdcba5d1 Mon Sep 17 00:00:00 2001 From: Vladimir Zapolskiy Date: Sat, 18 Jul 2015 03:07:52 +0300 Subject: nand: lpc32xx: add SLC NAND controller support The change adds support of LPC32xx SLC NAND controller. LPC32xx SoC has two different mutually exclusive NAND controllers to communicate with single and multiple layer chips. This simple driver allows to specify NAND chip timings and defines custom read_buf()/write_buf() operations, because access to 8-bit data register must be 32-bit aligned. Support of hardware ECC calculation is not implemented (data correction is always done by software), since it requires a working DMA engine. The driver can be included to an SPL image. Signed-off-by: Vladimir Zapolskiy Acked-by: Scott Wood Tested-by: Sylvain Lemieux --- drivers/mtd/nand/Makefile | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers/mtd/nand/Makefile') diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile index b40dda8..46dce72 100644 --- a/drivers/mtd/nand/Makefile +++ b/drivers/mtd/nand/Makefile @@ -54,6 +54,7 @@ obj-$(CONFIG_NAND_KB9202) += kb9202_nand.o obj-$(CONFIG_NAND_KIRKWOOD) += kirkwood_nand.o obj-$(CONFIG_NAND_KMETER1) += kmeter1_nand.o obj-$(CONFIG_NAND_LPC32XX_MLC) += lpc32xx_nand_mlc.o +obj-$(CONFIG_NAND_LPC32XX_SLC) += lpc32xx_nand_slc.o obj-$(CONFIG_NAND_MPC5121_NFC) += mpc5121_nfc.o obj-$(CONFIG_NAND_VF610_NFC) += vf610_nfc.o obj-$(CONFIG_NAND_MXC) += mxc_nand.o -- cgit v1.1