From 583a82d5e2702f2c8aadcd75d416d6e45dd5188a Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sat, 22 Jul 2023 13:30:22 +0000 Subject: rockchip: clk: clk_rk3568: Add CLK_PCIEPHY2_REF support Add dummy support for the CLK_PCIEPHY2_REF clock. Signed-off-by: Jonas Karlman Reviewed-by: Kever Yang --- drivers/clk/rockchip/clk_rk3568.c | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers/clk/rockchip') diff --git a/drivers/clk/rockchip/clk_rk3568.c b/drivers/clk/rockchip/clk_rk3568.c index 6bdd96f..0df82f5 100644 --- a/drivers/clk/rockchip/clk_rk3568.c +++ b/drivers/clk/rockchip/clk_rk3568.c @@ -427,6 +427,7 @@ static ulong rk3568_pmuclk_set_rate(struct clk *clk, ulong rate) break; case CLK_PCIEPHY0_REF: case CLK_PCIEPHY1_REF: + case CLK_PCIEPHY2_REF: return 0; default: return -ENOENT; -- cgit v1.1