From b4353b371322b54d8effd8737e3f7ba021950180 Mon Sep 17 00:00:00 2001 From: Trent Piepho Date: Wed, 27 Mar 2019 23:50:09 +0000 Subject: bootm: Simplying cache flush code The cache flush of the kernel load area needs to be aligned outward to the DMA cache alignment. The operations are simpler if we think of this as aligning the start down, ALIGN_DOWN(load, ARCH_DMA_MINALIGN), and aligning the end up, ALIGN(load_end, ARCH_DMA_MINALIGN), and then find the length of the flushed region by subtracting the former from the latter. Cc: Tom Rini Cc: Simon Glass Cc: Bryan O'Donoghue Signed-off-by: Trent Piepho Reviewed-by: Simon Glass --- common/bootm.c | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) (limited to 'common') diff --git a/common/bootm.c b/common/bootm.c index 3adbcea..42358b8 100644 --- a/common/bootm.c +++ b/common/bootm.c @@ -450,7 +450,6 @@ static int bootm_load_os(bootm_headers_t *images, int boot_progress) ulong image_start = os.image_start; ulong image_len = os.image_len; ulong flush_start = ALIGN_DOWN(load, ARCH_DMA_MINALIGN); - ulong flush_len; bool no_overlap; void *load_buf, *image_buf; int err; @@ -465,11 +464,7 @@ static int bootm_load_os(bootm_headers_t *images, int boot_progress) return err; } - flush_len = load_end - load; - if (flush_start < load) - flush_len += load - flush_start; - - flush_cache(flush_start, ALIGN(flush_len, ARCH_DMA_MINALIGN)); + flush_cache(flush_start, ALIGN(load_end, ARCH_DMA_MINALIGN) - flush_start); debug(" kernel loaded at 0x%08lx, end = 0x%08lx\n", load, load_end); bootstage_mark(BOOTSTAGE_ID_KERNEL_LOADED); -- cgit v1.1