From df9ebbe17ea13de4c443849ecf23cba545dd0395 Mon Sep 17 00:00:00 2001 From: Luka Kovacic Date: Tue, 26 May 2020 20:17:50 +0200 Subject: arm: mvebu: Convert CRS305-1G-4S board to CRS3xx-98DX3236 Convert the CRS305-1G-4S board to CRS3xx-98DX3236 to enable easier implementation of new CRS3xx series boards, based on Marvell Prestera 98DX3236. Signed-off-by: Luka Kovacic Reviewed-by: Stefan Roese Cc: Luka Perkov Cc: Jakov Petrina --- board/mikrotik/crs305-1g-4s/.gitignore | 1 - board/mikrotik/crs305-1g-4s/MAINTAINERS | 7 --- board/mikrotik/crs305-1g-4s/Makefile | 14 ----- board/mikrotik/crs305-1g-4s/README | 23 ------- board/mikrotik/crs305-1g-4s/binary.0 | 11 ---- board/mikrotik/crs305-1g-4s/crs305-1g-4s.c | 77 ------------------------ board/mikrotik/crs305-1g-4s/kwbimage.cfg.in | 12 ---- board/mikrotik/crs3xx-98dx3236/.gitignore | 1 + board/mikrotik/crs3xx-98dx3236/MAINTAINERS | 11 ++++ board/mikrotik/crs3xx-98dx3236/Makefile | 14 +++++ board/mikrotik/crs3xx-98dx3236/README | 23 +++++++ board/mikrotik/crs3xx-98dx3236/binary.0 | 11 ++++ board/mikrotik/crs3xx-98dx3236/crs3xx-98dx3236.c | 77 ++++++++++++++++++++++++ board/mikrotik/crs3xx-98dx3236/kwbimage.cfg.in | 12 ++++ 14 files changed, 149 insertions(+), 145 deletions(-) delete mode 100644 board/mikrotik/crs305-1g-4s/.gitignore delete mode 100644 board/mikrotik/crs305-1g-4s/MAINTAINERS delete mode 100644 board/mikrotik/crs305-1g-4s/Makefile delete mode 100644 board/mikrotik/crs305-1g-4s/README delete mode 100644 board/mikrotik/crs305-1g-4s/binary.0 delete mode 100644 board/mikrotik/crs305-1g-4s/crs305-1g-4s.c delete mode 100644 board/mikrotik/crs305-1g-4s/kwbimage.cfg.in create mode 100644 board/mikrotik/crs3xx-98dx3236/.gitignore create mode 100644 board/mikrotik/crs3xx-98dx3236/MAINTAINERS create mode 100644 board/mikrotik/crs3xx-98dx3236/Makefile create mode 100644 board/mikrotik/crs3xx-98dx3236/README create mode 100644 board/mikrotik/crs3xx-98dx3236/binary.0 create mode 100644 board/mikrotik/crs3xx-98dx3236/crs3xx-98dx3236.c create mode 100644 board/mikrotik/crs3xx-98dx3236/kwbimage.cfg.in (limited to 'board') diff --git a/board/mikrotik/crs305-1g-4s/.gitignore b/board/mikrotik/crs305-1g-4s/.gitignore deleted file mode 100644 index 775b934..0000000 --- a/board/mikrotik/crs305-1g-4s/.gitignore +++ /dev/null @@ -1 +0,0 @@ -kwbimage.cfg diff --git a/board/mikrotik/crs305-1g-4s/MAINTAINERS b/board/mikrotik/crs305-1g-4s/MAINTAINERS deleted file mode 100644 index 3823489..0000000 --- a/board/mikrotik/crs305-1g-4s/MAINTAINERS +++ /dev/null @@ -1,7 +0,0 @@ -CRS305-1G-4S BOARD -M: Luka Kovacic -S: Maintained -F: board/mikrotik/crs305-1g-4s/ -F: include/configs/crs305-1g-4s.h -F: configs/crs305-1g-4s_defconfig -F: arch/arm/dts/armada-xp-crs305-1g-4s.dts diff --git a/board/mikrotik/crs305-1g-4s/Makefile b/board/mikrotik/crs305-1g-4s/Makefile deleted file mode 100644 index c03f534..0000000 --- a/board/mikrotik/crs305-1g-4s/Makefile +++ /dev/null @@ -1,14 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# Copyright (C) 2015 Stefan Roese - -obj-y := crs305-1g-4s.o -extra-y := kwbimage.cfg - -quiet_cmd_sed = SED $@ - cmd_sed = sed $(SEDFLAGS_$(@F)) $< >$(dir $@)$(@F) - -SEDFLAGS_kwbimage.cfg =-e "s|^BINARY.*|BINARY $(srctree)/$(@D)/binary.0 0000005b 00000068|" -$(obj)/kwbimage.cfg: $(src)/kwbimage.cfg.in include/autoconf.mk \ - include/config/auto.conf - $(call if_changed,sed) diff --git a/board/mikrotik/crs305-1g-4s/README b/board/mikrotik/crs305-1g-4s/README deleted file mode 100644 index f420aab..0000000 --- a/board/mikrotik/crs305-1g-4s/README +++ /dev/null @@ -1,23 +0,0 @@ -MikroTik CRS305-1G-4S+IN -======================== - -CRS305-1G-4S+IN is a 4x SFP+ switch with a Gigabit Ethernet port for management. -Specifications: - - Marvell Prestera 98DX3236 switch with an integrated ARMv7 CPU - - 512 MB DDR3 RAM - - UART @ 115200bps - - 4x SFP+ - - Gigabit Ethernet (AR8033) - - 16 MB SPI flash (Winbond 25Q128JVSM) - -Currently supported hardware: - - UART boot (using kwboot) and console - - SPI boot, environment and load kernel - -Planned: - - Gigabit Ethernet support - -Getting binary.0 -================ -binary.0 (DDR3 init phase) can be retrieved/extracted from the integrated bootloader on the SPI flash. -Then binary.0 can be replaced with the extracted blob. diff --git a/board/mikrotik/crs305-1g-4s/binary.0 b/board/mikrotik/crs305-1g-4s/binary.0 deleted file mode 100644 index 8dd6872..0000000 --- a/board/mikrotik/crs305-1g-4s/binary.0 +++ /dev/null @@ -1,11 +0,0 @@ --------- -WARNING: --------- -This file should contain the bin_hdr generated by the original Marvell -U-Boot implementation. As this is currently not included in this -U-Boot version, we have added this placeholder, so that the U-Boot -image can be generated without errors. - -If you have a known to be working bin_hdr for your board, then you -just need to replace this text file here with the binary header -and recompile U-Boot. diff --git a/board/mikrotik/crs305-1g-4s/crs305-1g-4s.c b/board/mikrotik/crs305-1g-4s/crs305-1g-4s.c deleted file mode 100644 index 8b419ef..0000000 --- a/board/mikrotik/crs305-1g-4s/crs305-1g-4s.c +++ /dev/null @@ -1,77 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2015 Stefan Roese - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -DECLARE_GLOBAL_DATA_PTR; - -/* - * These values and defines are taken from the Marvell U-Boot version - * "u-boot-2013.01-2016_T1.0.eng_drop_v6" - */ -#define DB_DX_AC3_GPP_OUT_ENA_LOW (~(BIT(0) | BIT(2) | BIT(3) | BIT(4) \ - | BIT(6) | BIT(12) | BIT(13) \ - | BIT(16) | BIT(17) | BIT(20) \ - | BIT(29) | BIT(30))) -#define DB_DX_AC3_GPP_OUT_ENA_MID (~(0)) -#define DB_DX_AC3_GPP_OUT_VAL_LOW (BIT(0) | BIT(2) | BIT(3) | BIT(4) \ - | BIT(6) | BIT(12) | BIT(13) \ - | BIT(16) | BIT(17) | BIT(20) \ - | BIT(29) | BIT(30)) -#define DB_DX_AC3_GPP_OUT_VAL_MID 0x0 -#define DB_DX_AC3_GPP_POL_LOW 0x0 -#define DB_DX_AC3_GPP_POL_MID 0x0 - -int board_early_init_f(void) -{ - /* Configure MPP */ - writel(0x00142222, MVEBU_MPP_BASE + 0x00); - writel(0x11122000, MVEBU_MPP_BASE + 0x04); - writel(0x44444004, MVEBU_MPP_BASE + 0x08); - writel(0x14444444, MVEBU_MPP_BASE + 0x0c); - writel(0x00000001, MVEBU_MPP_BASE + 0x10); - - /* - * MVEBU_GPIO0_BASE is the User LED - * MVEBU_GPIO1_BASE is the Reset Button (currently not used) - */ - - /* Set GPP Out value */ - writel(DB_DX_AC3_GPP_OUT_VAL_LOW, MVEBU_GPIO0_BASE + 0x00); - /* writel(DB_DX_AC3_GPP_OUT_VAL_MID, MVEBU_GPIO1_BASE + 0x00); */ - - /* Set GPP Polarity */ - writel(DB_DX_AC3_GPP_POL_LOW, MVEBU_GPIO0_BASE + 0x0c); - /* writel(DB_DX_AC3_GPP_POL_MID, MVEBU_GPIO1_BASE + 0x0c); */ - - /* Set GPP Out Enable */ - writel(DB_DX_AC3_GPP_OUT_ENA_LOW, MVEBU_GPIO0_BASE + 0x04); - /* writel(DB_DX_AC3_GPP_OUT_ENA_MID, MVEBU_GPIO1_BASE + 0x04); */ - - return 0; -} - -int board_init(void) -{ - /* address of boot parameters */ - gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100; - - return 0; -} - -int checkboard(void) -{ - puts("Board: " CONFIG_SYS_BOARD "\n"); - - return 0; -} diff --git a/board/mikrotik/crs305-1g-4s/kwbimage.cfg.in b/board/mikrotik/crs305-1g-4s/kwbimage.cfg.in deleted file mode 100644 index 2dbbbd0..0000000 --- a/board/mikrotik/crs305-1g-4s/kwbimage.cfg.in +++ /dev/null @@ -1,12 +0,0 @@ -# -# Copyright (C) 2014 Stefan Roese -# - -# Armada XP uses version 1 image format -VERSION 1 - -# Boot Media configurations -BOOT_FROM spi - -# Binary Header (bin_hdr) with DDR3 training code -BINARY board/mikrotik/crs305-1g-4s/binary.0 0000005b 00000068 diff --git a/board/mikrotik/crs3xx-98dx3236/.gitignore b/board/mikrotik/crs3xx-98dx3236/.gitignore new file mode 100644 index 0000000..775b934 --- /dev/null +++ b/board/mikrotik/crs3xx-98dx3236/.gitignore @@ -0,0 +1 @@ +kwbimage.cfg diff --git a/board/mikrotik/crs3xx-98dx3236/MAINTAINERS b/board/mikrotik/crs3xx-98dx3236/MAINTAINERS new file mode 100644 index 0000000..127e0ea --- /dev/null +++ b/board/mikrotik/crs3xx-98dx3236/MAINTAINERS @@ -0,0 +1,11 @@ +CRS3XX-98DX3236 BOARD +M: Luka Kovacic +S: Maintained +F: board/mikrotik/crs3xx-98dx3236/ +F: include/configs/crs3xx-98dx3236.h + +CRS305-1G-4S BOARD +M: Luka Kovacic +S: Maintained +F: configs/crs305-1g-4s_defconfig +F: arch/arm/dts/armada-xp-crs305-1g-4s.dts diff --git a/board/mikrotik/crs3xx-98dx3236/Makefile b/board/mikrotik/crs3xx-98dx3236/Makefile new file mode 100644 index 0000000..0b2930d --- /dev/null +++ b/board/mikrotik/crs3xx-98dx3236/Makefile @@ -0,0 +1,14 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# Copyright (C) 2015 Stefan Roese + +obj-y := crs3xx-98dx3236.o +extra-y := kwbimage.cfg + +quiet_cmd_sed = SED $@ + cmd_sed = sed $(SEDFLAGS_$(@F)) $< >$(dir $@)$(@F) + +SEDFLAGS_kwbimage.cfg =-e "s|^BINARY.*|BINARY $(srctree)/$(@D)/binary.0 0000005b 00000068|" +$(obj)/kwbimage.cfg: $(src)/kwbimage.cfg.in include/autoconf.mk \ + include/config/auto.conf + $(call if_changed,sed) diff --git a/board/mikrotik/crs3xx-98dx3236/README b/board/mikrotik/crs3xx-98dx3236/README new file mode 100644 index 0000000..952f774 --- /dev/null +++ b/board/mikrotik/crs3xx-98dx3236/README @@ -0,0 +1,23 @@ +MikroTik CRS3XX-98DX3236 +======================== + +CRS3XX-98DX3236 is a U-Boot port that supports a series of MikroTik switches +based on the Marvell Prestera 98DX3236 switch with an integrated CPU. + +Common specifications: + - Marvell Prestera 98DX3236 switch with an integrated ARMv7 CPU + - 512 MB DDR3 RAM + - UART @ 115200bps + - 16 MB SPI flash (Winbond 25Q128JVSM) + +Currently supported hardware: + - UART boot (using kwboot) and console + - SPI boot, environment and load kernel + +Planned: + - Gigabit Ethernet support (internal CPU <-> switch fabric connection) + +Getting binary.0 +================ +binary.0 (DDR3 init phase) can be retrieved/extracted from the integrated bootloader on the SPI flash. +Then binary.0 can be replaced with the extracted blob. diff --git a/board/mikrotik/crs3xx-98dx3236/binary.0 b/board/mikrotik/crs3xx-98dx3236/binary.0 new file mode 100644 index 0000000..8dd6872 --- /dev/null +++ b/board/mikrotik/crs3xx-98dx3236/binary.0 @@ -0,0 +1,11 @@ +-------- +WARNING: +-------- +This file should contain the bin_hdr generated by the original Marvell +U-Boot implementation. As this is currently not included in this +U-Boot version, we have added this placeholder, so that the U-Boot +image can be generated without errors. + +If you have a known to be working bin_hdr for your board, then you +just need to replace this text file here with the binary header +and recompile U-Boot. diff --git a/board/mikrotik/crs3xx-98dx3236/crs3xx-98dx3236.c b/board/mikrotik/crs3xx-98dx3236/crs3xx-98dx3236.c new file mode 100644 index 0000000..8b419ef --- /dev/null +++ b/board/mikrotik/crs3xx-98dx3236/crs3xx-98dx3236.c @@ -0,0 +1,77 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2015 Stefan Roese + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +/* + * These values and defines are taken from the Marvell U-Boot version + * "u-boot-2013.01-2016_T1.0.eng_drop_v6" + */ +#define DB_DX_AC3_GPP_OUT_ENA_LOW (~(BIT(0) | BIT(2) | BIT(3) | BIT(4) \ + | BIT(6) | BIT(12) | BIT(13) \ + | BIT(16) | BIT(17) | BIT(20) \ + | BIT(29) | BIT(30))) +#define DB_DX_AC3_GPP_OUT_ENA_MID (~(0)) +#define DB_DX_AC3_GPP_OUT_VAL_LOW (BIT(0) | BIT(2) | BIT(3) | BIT(4) \ + | BIT(6) | BIT(12) | BIT(13) \ + | BIT(16) | BIT(17) | BIT(20) \ + | BIT(29) | BIT(30)) +#define DB_DX_AC3_GPP_OUT_VAL_MID 0x0 +#define DB_DX_AC3_GPP_POL_LOW 0x0 +#define DB_DX_AC3_GPP_POL_MID 0x0 + +int board_early_init_f(void) +{ + /* Configure MPP */ + writel(0x00142222, MVEBU_MPP_BASE + 0x00); + writel(0x11122000, MVEBU_MPP_BASE + 0x04); + writel(0x44444004, MVEBU_MPP_BASE + 0x08); + writel(0x14444444, MVEBU_MPP_BASE + 0x0c); + writel(0x00000001, MVEBU_MPP_BASE + 0x10); + + /* + * MVEBU_GPIO0_BASE is the User LED + * MVEBU_GPIO1_BASE is the Reset Button (currently not used) + */ + + /* Set GPP Out value */ + writel(DB_DX_AC3_GPP_OUT_VAL_LOW, MVEBU_GPIO0_BASE + 0x00); + /* writel(DB_DX_AC3_GPP_OUT_VAL_MID, MVEBU_GPIO1_BASE + 0x00); */ + + /* Set GPP Polarity */ + writel(DB_DX_AC3_GPP_POL_LOW, MVEBU_GPIO0_BASE + 0x0c); + /* writel(DB_DX_AC3_GPP_POL_MID, MVEBU_GPIO1_BASE + 0x0c); */ + + /* Set GPP Out Enable */ + writel(DB_DX_AC3_GPP_OUT_ENA_LOW, MVEBU_GPIO0_BASE + 0x04); + /* writel(DB_DX_AC3_GPP_OUT_ENA_MID, MVEBU_GPIO1_BASE + 0x04); */ + + return 0; +} + +int board_init(void) +{ + /* address of boot parameters */ + gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100; + + return 0; +} + +int checkboard(void) +{ + puts("Board: " CONFIG_SYS_BOARD "\n"); + + return 0; +} diff --git a/board/mikrotik/crs3xx-98dx3236/kwbimage.cfg.in b/board/mikrotik/crs3xx-98dx3236/kwbimage.cfg.in new file mode 100644 index 0000000..9a58b33 --- /dev/null +++ b/board/mikrotik/crs3xx-98dx3236/kwbimage.cfg.in @@ -0,0 +1,12 @@ +# +# Copyright (C) 2014 Stefan Roese +# + +# Armada XP uses version 1 image format +VERSION 1 + +# Boot Media configurations +BOOT_FROM spi + +# Binary Header (bin_hdr) with DDR3 training code +BINARY board/mikrotik/crs3xx-98dx3236/binary.0 0000005b 00000068 -- cgit v1.1