From 0fcec5775207353fd7ffcdeaad7f490d9a56be2c Mon Sep 17 00:00:00 2001 From: Hannes Schmelzer Date: Tue, 9 Jan 2018 19:01:35 +0100 Subject: board/BuR: provide real clock-frequency instead a divider Actual am335x-fb implementation takes now a real clock frequency instead a divider. So this component doesn't need to know anymore some base frequency of the LCDC, we simply provide the pixel-clock frequency. Signed-off-by: Hannes Schmelzer Reviewed-by: Anatolij Gustschin --- board/BuR/common/common.c | 14 ++++---------- 1 file changed, 4 insertions(+), 10 deletions(-) (limited to 'board') diff --git a/board/BuR/common/common.c b/board/BuR/common/common.c index c1cd010..d82b8cd 100644 --- a/board/BuR/common/common.c +++ b/board/BuR/common/common.c @@ -139,13 +139,7 @@ int load_lcdtiming(struct am335x_lcdpanel *panel) pnltmp.vsw = FDTPROP(PATHTIM, "vsync-len"); pnltmp.pup_delay = FDTPROP(PATHTIM, "pupdelay"); pnltmp.pon_delay = FDTPROP(PATHTIM, "pondelay"); - - /* calc. proper clk-divisor */ - dtbprop = FDTPROP(PATHTIM, "clock-frequency"); - if (dtbprop != ~0UL) - pnltmp.pxl_clk_div = 192000000 / dtbprop; - else - pnltmp.pxl_clk_div = ~0UL; + pnltmp.pxl_clk = FDTPROP(PATHTIM, "clock-frequency"); /* check polarity of control-signals */ dtbprop = FDTPROP(PATHTIM, "hsync-active"); @@ -195,7 +189,7 @@ int load_lcdtiming(struct am335x_lcdpanel *panel) pnltmp.vfp = env_get_ulong("ds1_vfp", 10, ~0UL); pnltmp.vbp = env_get_ulong("ds1_vbp", 10, ~0UL); pnltmp.vsw = env_get_ulong("ds1_vsw", 10, ~0UL); - pnltmp.pxl_clk_div = env_get_ulong("ds1_pxlclkdiv", 10, ~0UL); + pnltmp.pxl_clk = env_get_ulong("ds1_pxlclk", 10, ~0UL); pnltmp.pol = env_get_ulong("ds1_pol", 16, ~0UL); pnltmp.pup_delay = env_get_ulong("ds1_pupdelay", 10, ~0UL); pnltmp.pon_delay = env_get_ulong("ds1_tondelay", 10, ~0UL); @@ -211,7 +205,7 @@ int load_lcdtiming(struct am335x_lcdpanel *panel) ~0UL == (pnltmp.vfp) || ~0UL == (pnltmp.vbp) || ~0UL == (pnltmp.vsw) || - ~0UL == (pnltmp.pxl_clk_div) || + ~0UL == (pnltmp.pxl_clk) || ~0UL == (pnltmp.pol) || ~0UL == (pnltmp.pup_delay) || ~0UL == (pnltmp.pon_delay) @@ -234,7 +228,7 @@ int load_lcdtiming(struct am335x_lcdpanel *panel) pnltmp.hactive, pnltmp.vactive, pnltmp.bpp, pnltmp.hfp, pnltmp.hbp, pnltmp.hsw, pnltmp.vfp, pnltmp.vbp, pnltmp.vsw, - pnltmp.pxl_clk_div, pnltmp.pol, pnltmp.pon_delay); + pnltmp.pxl_clk, pnltmp.pol, pnltmp.pon_delay); return -1; } -- cgit v1.1 From 193f6fb9e8659b63afcd09f24fec92d70497ccf5 Mon Sep 17 00:00:00 2001 From: Hannes Schmelzer Date: Tue, 9 Jan 2018 19:01:36 +0100 Subject: board/BuR: drop LCDC clock manipulation from board code The clock selection is done now from the am335x-fb code, so there is no more need doing this in the board code. Signed-off-by: Hannes Schmelzer Reviewed-by: Anatolij Gustschin --- board/BuR/brppt1/board.c | 3 --- board/BuR/brxre1/board.c | 2 -- 2 files changed, 5 deletions(-) (limited to 'board') diff --git a/board/BuR/brppt1/board.c b/board/BuR/brppt1/board.c index 6083479..9f7b2d9 100644 --- a/board/BuR/brppt1/board.c +++ b/board/BuR/brppt1/board.c @@ -120,9 +120,6 @@ void am33xx_spl_board_init(void) }; do_enable_clocks(clk_domains, clk_modules_tsspecific, 1); - /* setup LCD-Pixel Clock */ - writel(0x2, &cmdpll->clklcdcpixelclk); /* clock comes from perPLL M2 */ - /* setup I2C */ enable_i2c_pin_mux(); i2c_set_bus_num(0); diff --git a/board/BuR/brxre1/board.c b/board/BuR/brxre1/board.c index ca08f3c..7e83437 100644 --- a/board/BuR/brxre1/board.c +++ b/board/BuR/brxre1/board.c @@ -114,8 +114,6 @@ void am33xx_spl_board_init(void) 0 }; do_enable_clocks(clk_domains, clk_modules_xre1specific, 1); - /* setup LCD-Pixel Clock */ - writel(0x2, CM_DPLL + 0x34); /* power-OFF LCD-Display */ gpio_direction_output(LCD_PWR, 0); -- cgit v1.1