From a4884831745d713169dc2ec94b3625eddf54b09c Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Wed, 22 Oct 2014 12:13:19 +0200 Subject: arm: armada-xp: Add basic support for the maxBCM board The maxBCM board is equipped with the Marvell Armada-XP MV78460 SoC. It integrates an SPI NOR flash and an Marvell 88E6185 switch. Signed-off-by: Stefan Roese --- board/maxbcm/Kconfig | 19 ++++++++++++ board/maxbcm/MAINTAINERS | 6 ++++ board/maxbcm/Makefile | 7 +++++ board/maxbcm/kwbimage.cfg | 12 ++++++++ board/maxbcm/maxbcm.c | 77 +++++++++++++++++++++++++++++++++++++++++++++++ 5 files changed, 121 insertions(+) create mode 100644 board/maxbcm/Kconfig create mode 100644 board/maxbcm/MAINTAINERS create mode 100644 board/maxbcm/Makefile create mode 100644 board/maxbcm/kwbimage.cfg create mode 100644 board/maxbcm/maxbcm.c (limited to 'board/maxbcm') diff --git a/board/maxbcm/Kconfig b/board/maxbcm/Kconfig new file mode 100644 index 0000000..d34e2ab --- /dev/null +++ b/board/maxbcm/Kconfig @@ -0,0 +1,19 @@ +if TARGET_MAXBCM + +config SYS_CPU + string + default "armv7" + +config SYS_BOARD + string + default "maxbcm" + +config SYS_SOC + string + default "armada-xp" + +config SYS_CONFIG_NAME + string + default "maxbcm" + +endif diff --git a/board/maxbcm/MAINTAINERS b/board/maxbcm/MAINTAINERS new file mode 100644 index 0000000..3c8af21 --- /dev/null +++ b/board/maxbcm/MAINTAINERS @@ -0,0 +1,6 @@ +MAXBCM BOARD +M: Stefan Roese +S: Maintained +F: board/maxbcm/ +F: include/configs/maxbcm.h +F: configs/maxbcm_defconfig diff --git a/board/maxbcm/Makefile b/board/maxbcm/Makefile new file mode 100644 index 0000000..37c17d6 --- /dev/null +++ b/board/maxbcm/Makefile @@ -0,0 +1,7 @@ +# +# Copyright (C) 2014 Stefan Roese +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := maxbcm.o diff --git a/board/maxbcm/kwbimage.cfg b/board/maxbcm/kwbimage.cfg new file mode 100644 index 0000000..5a3bc67 --- /dev/null +++ b/board/maxbcm/kwbimage.cfg @@ -0,0 +1,12 @@ +# +# Copyright (C) 2014 Stefan Roese +# + +# Armada XP uses version 1 image format +VERSION 1 + +# Boot Media configurations +BOOT_FROM spi + +# Binary Header (bin_hdr) with DDR3 training code +BINARY board/maxbcm/binary.0 0000005b 00000068 diff --git a/board/maxbcm/maxbcm.c b/board/maxbcm/maxbcm.c new file mode 100644 index 0000000..7fc83ee --- /dev/null +++ b/board/maxbcm/maxbcm.c @@ -0,0 +1,77 @@ +/* + * Copyright (C) 2014 Stefan Roese + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +/* Base addresses for the external device chip selects */ +#define DEV_CS0_BASE 0xe0000000 +#define DEV_CS1_BASE 0xe1000000 +#define DEV_CS2_BASE 0xe2000000 +#define DEV_CS3_BASE 0xe3000000 + +/* Needed for dynamic (board-specific) mbus configuration */ +extern struct mvebu_mbus_state mbus_state; + +int board_early_init_f(void) +{ + /* + * Don't configure MPP (pin multiplexing) and GPIO here, + * its already done in bin_hdr + */ + + /* + * Setup some board specific mbus address windows + */ + mbus_dt_setup_win(&mbus_state, DEV_CS0_BASE, 16 << 20, + CPU_TARGET_DEVICEBUS_BOOTROM_SPI, CPU_ATTR_DEV_CS0); + mbus_dt_setup_win(&mbus_state, DEV_CS1_BASE, 16 << 20, + CPU_TARGET_DEVICEBUS_BOOTROM_SPI, CPU_ATTR_DEV_CS1); + mbus_dt_setup_win(&mbus_state, DEV_CS2_BASE, 16 << 20, + CPU_TARGET_DEVICEBUS_BOOTROM_SPI, CPU_ATTR_DEV_CS2); + mbus_dt_setup_win(&mbus_state, DEV_CS3_BASE, 16 << 20, + CPU_TARGET_DEVICEBUS_BOOTROM_SPI, CPU_ATTR_DEV_CS3); + + return 0; +} + +int board_init(void) +{ + /* adress of boot parameters */ + gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100; + + return 0; +} + +int checkboard(void) +{ + puts("Board: maxBCM\n"); + + return 0; +} + +#ifdef CONFIG_RESET_PHY_R +/* Configure and enable MV88E6185 switch */ +void reset_phy(void) +{ + u16 devadr = CONFIG_PHY_BASE_ADDR; + char *name = "neta0"; + u16 reg; + + if (miiphy_set_current_dev(name)) + return; + + /* todo: fill this with the real setup / config code */ + + printf("88E6185 Initialized on %s\n", name); +} +#endif /* CONFIG_RESET_PHY_R */ -- cgit v1.1