From e48b7c0aad687f0b42ba9985c3e2dc67c2cac71d Mon Sep 17 00:00:00 2001 From: Heiko Schocher Date: Fri, 17 Sep 2010 13:10:40 +0200 Subject: ARM: implement relocation for ARM11 Change the implementation for ARM11 to relocate the code to an arbitrary address in RAM. Tested on the qong board. Portions of this work were supported by funding from the CE Linux Forum. Signed-off-by: Heiko Schocher --- board/davedenx/qong/config.mk | 4 +- board/davedenx/qong/qong.c | 87 +++++++++++++++++++++++-------------------- 2 files changed, 49 insertions(+), 42 deletions(-) (limited to 'board/davedenx') diff --git a/board/davedenx/qong/config.mk b/board/davedenx/qong/config.mk index d8d0a57..39c1203 100644 --- a/board/davedenx/qong/config.mk +++ b/board/davedenx/qong/config.mk @@ -1 +1,3 @@ -TEXT_BASE = 0x8ff00000 +TEXT_BASE = 0xa0000000 + +# PLATFORM_CPPFLAGS += -DDEBUG diff --git a/board/davedenx/qong/qong.c b/board/davedenx/qong/qong.c index 781333b..e509383 100644 --- a/board/davedenx/qong/qong.c +++ b/board/davedenx/qong/qong.c @@ -33,10 +33,9 @@ DECLARE_GLOBAL_DATA_PTR; int dram_init (void) { - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; - gd->bd->bi_dram[0].size = get_ram_size((volatile void *)PHYS_SDRAM_1, - PHYS_SDRAM_1_SIZE); - + /* dram_init must store complete ramsize in gd->ram_size */ + gd->ram_size = get_ram_size((volatile void *)CONFIG_SYS_SDRAM_BASE, + PHYS_SDRAM_1_SIZE); return 0; } @@ -49,6 +48,49 @@ static void qong_fpga_reset(void) udelay(300); } +int board_early_init_f (void) +{ +#ifdef CONFIG_QONG_FPGA + /* CS1: FPGA/Network Controller/GPIO */ + /* 16-bit, no DTACK */ + __REG(CSCR_U(1)) = 0x00000A01; + __REG(CSCR_L(1)) = 0x20040501; + __REG(CSCR_A(1)) = 0x04020C00; + + /* setup pins for FPGA */ + mx31_gpio_mux(IOMUX_MODE(0x76, MUX_CTL_GPIO)); + mx31_gpio_mux(IOMUX_MODE(0x7e, MUX_CTL_GPIO)); + mx31_gpio_mux(IOMUX_MODE(0x91, MUX_CTL_OUT_FUNC | MUX_CTL_IN_GPIO)); + mx31_gpio_mux(IOMUX_MODE(0x92, MUX_CTL_GPIO)); + mx31_gpio_mux(IOMUX_MODE(0x93, MUX_CTL_GPIO)); + + /* FPGA reset Pin */ + /* rstn = 0 */ + mx31_gpio_set(QONG_FPGA_RST_PIN, 0); + mx31_gpio_direction(QONG_FPGA_RST_PIN, MX31_GPIO_DIRECTION_OUT); + + /* set interrupt pin as input */ + mx31_gpio_direction(QONG_FPGA_IRQ_PIN, MX31_GPIO_DIRECTION_IN); + +#endif + + /* setup pins for UART1 */ + mx31_gpio_mux(MUX_RXD1__UART1_RXD_MUX); + mx31_gpio_mux(MUX_TXD1__UART1_TXD_MUX); + mx31_gpio_mux(MUX_RTS1__UART1_RTS_B); + mx31_gpio_mux(MUX_CTS1__UART1_CTS_B); + + /* setup pins for SPI (pmic) */ + mx31_gpio_mux(MUX_CSPI2_SS0__CSPI2_SS0_B); + mx31_gpio_mux(MUX_CSPI2_MOSI__CSPI2_MOSI); + mx31_gpio_mux(MUX_CSPI2_MISO__CSPI2_MISO); + mx31_gpio_mux(MUX_CSPI2_SCLK__CSPI2_CLK); + mx31_gpio_mux(MUX_CSPI2_SPI_RDY__CSPI2_DATAREADY_B); + + return 0; + +} + int board_init (void) { /* Chip selects */ @@ -99,43 +141,6 @@ int board_init (void) (0 << 0) /* FCE */ ); -#ifdef CONFIG_QONG_FPGA - /* CS1: FPGA/Network Controller/GPIO */ - /* 16-bit, no DTACK */ - __REG(CSCR_U(1)) = 0x00000A01; - __REG(CSCR_L(1)) = 0x20040501; - __REG(CSCR_A(1)) = 0x04020C00; - - /* setup pins for FPGA */ - mx31_gpio_mux(IOMUX_MODE(0x76, MUX_CTL_GPIO)); - mx31_gpio_mux(IOMUX_MODE(0x7e, MUX_CTL_GPIO)); - mx31_gpio_mux(IOMUX_MODE(0x91, MUX_CTL_OUT_FUNC | MUX_CTL_IN_GPIO)); - mx31_gpio_mux(IOMUX_MODE(0x92, MUX_CTL_GPIO)); - mx31_gpio_mux(IOMUX_MODE(0x93, MUX_CTL_GPIO)); - - /* FPGA reset Pin */ - /* rstn = 0 */ - mx31_gpio_set(QONG_FPGA_RST_PIN, 0); - mx31_gpio_direction(QONG_FPGA_RST_PIN, MX31_GPIO_DIRECTION_OUT); - - /* set interrupt pin as input */ - mx31_gpio_direction(QONG_FPGA_IRQ_PIN, MX31_GPIO_DIRECTION_IN); - -#endif - - /* setup pins for UART1 */ - mx31_gpio_mux(MUX_RXD1__UART1_RXD_MUX); - mx31_gpio_mux(MUX_TXD1__UART1_TXD_MUX); - mx31_gpio_mux(MUX_RTS1__UART1_RTS_B); - mx31_gpio_mux(MUX_CTS1__UART1_CTS_B); - - /* setup pins for SPI (pmic) */ - mx31_gpio_mux(MUX_CSPI2_SS0__CSPI2_SS0_B); - mx31_gpio_mux(MUX_CSPI2_MOSI__CSPI2_MOSI); - mx31_gpio_mux(MUX_CSPI2_MISO__CSPI2_MISO); - mx31_gpio_mux(MUX_CSPI2_SCLK__CSPI2_CLK); - mx31_gpio_mux(MUX_CSPI2_SPI_RDY__CSPI2_DATAREADY_B); - /* board id for linux */ gd->bd->bi_arch_number = MACH_TYPE_QONG; gd->bd->bi_boot_params = (0x80000100); /* adress of boot parameters */ -- cgit v1.1