From ed54e6212518262d27abe5e6de3c608d5ebceafb Mon Sep 17 00:00:00 2001
From: wdenk <wdenk>
Date: Wed, 24 Nov 2004 23:35:19 +0000
Subject: * Fix udelay() on AT91RM9200 for delays < 1 ms.

* Enable long help on CMC PU2 board;
  fix reset issue;
  increase CPU speed from 179 to 207 MHz.
---
 board/cmc_pu2/memsetup.S | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

(limited to 'board/cmc_pu2')

diff --git a/board/cmc_pu2/memsetup.S b/board/cmc_pu2/memsetup.S
index b0c8d4c..317f16d 100644
--- a/board/cmc_pu2/memsetup.S
+++ b/board/cmc_pu2/memsetup.S
@@ -57,11 +57,11 @@
 
 /* clocks */
 #define PLLAR 0xFFFFFC28
-#define PLLAR_VAL 0x20263E04 /* 179.712000 MHz for PCK */
+#define PLLAR_VAL 0x202CBE04 /* 207.360 MHz for PCK */
 #define PLLBR 0xFFFFFC2C
 #define PLLBR_VAL 0x10483E0E /* 48.054857 MHz (divider by 2 for USB) */
 #define MCKR 0xFFFFFC30
-#define MCKR_VAL 0x00000202 /* PCK/3 = MCK Master Clock = 59.904000MHz from PLLA */
+#define MCKR_VAL 0x00000202 /* PCK/3 = MCK Master Clock = 69.120MHz from PLLA */
 
 /* sdram */
 #define PIOC_ASR 0xFFFFF870
-- 
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