From b52a199e323e68ff5cbda4feb03731cb0d39587a Mon Sep 17 00:00:00 2001 From: Jagan Teki Date: Thu, 9 Jan 2020 14:22:17 +0530 Subject: arm: rockchip: Add common cru.h Few of the rockchip family SoC atleast rk3288, rk3399 are sharing some cru register bits so adding common code between these SoC families would require to include both cru include files that indeed resulting function declarations error. So, create a common cru include as cru.h then include the rk3399 arch cru include file and move the common cru register bit definitions into it. The rest of rockchip cru files will add it in future. Reviewed-by: Kever Yang Signed-off-by: Jagan Teki --- arch/arm/include/asm/arch-rockchip/clock.h | 4 ++-- arch/arm/include/asm/arch-rockchip/cru.h | 18 ++++++++++++++++++ arch/arm/include/asm/arch-rockchip/cru_rk3288.h | 6 +++--- arch/arm/include/asm/arch-rockchip/cru_rk3399.h | 11 +++++------ arch/arm/mach-rockchip/rk3288/clk_rk3288.c | 2 +- arch/arm/mach-rockchip/rk3288/rk3288.c | 4 ++-- arch/arm/mach-rockchip/rk3399/clk_rk3399.c | 2 +- arch/arm/mach-rockchip/rk3399/rk3399.c | 2 +- 8 files changed, 33 insertions(+), 16 deletions(-) create mode 100644 arch/arm/include/asm/arch-rockchip/cru.h (limited to 'arch') diff --git a/arch/arm/include/asm/arch-rockchip/clock.h b/arch/arm/include/asm/arch-rockchip/clock.h index 8f7fc86..22de0ae 100644 --- a/arch/arm/include/asm/arch-rockchip/clock.h +++ b/arch/arm/include/asm/arch-rockchip/clock.h @@ -153,10 +153,10 @@ void *rockchip_get_cru(void); */ void *rockchip_get_pmucru(void); -struct rk3288_cru; +struct rockchip_cru; struct rk3288_grf; -void rk3288_clk_configure_cpu(struct rk3288_cru *cru, struct rk3288_grf *grf); +void rk3288_clk_configure_cpu(struct rockchip_cru *cru, struct rk3288_grf *grf); int rockchip_get_clk(struct udevice **devp); diff --git a/arch/arm/include/asm/arch-rockchip/cru.h b/arch/arm/include/asm/arch-rockchip/cru.h new file mode 100644 index 0000000..475d772 --- /dev/null +++ b/arch/arm/include/asm/arch-rockchip/cru.h @@ -0,0 +1,18 @@ +/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ +/* + * (C) Copyright 2019 Amarula Solutions. + * Author: Jagan Teki + */ + +#ifndef _ROCKCHIP_CLOCK_H +#define _ROCKCHIP_CLOCK_H + +#if defined(CONFIG_ROCKCHIP_RK3288) +# include +#elif defined(CONFIG_ROCKCHIP_RK3399) +# include +#endif + +#define MHz 1000000 + +#endif /* _ROCKCHIP_CLOCK_H */ diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3288.h b/arch/arm/include/asm/arch-rockchip/cru_rk3288.h index e891f20..7aa6efe 100644 --- a/arch/arm/include/asm/arch-rockchip/cru_rk3288.h +++ b/arch/arm/include/asm/arch-rockchip/cru_rk3288.h @@ -27,11 +27,11 @@ /* Private data for the clock driver - used by rockchip_get_cru() */ struct rk3288_clk_priv { struct rk3288_grf *grf; - struct rk3288_cru *cru; + struct rockchip_cru *cru; ulong rate; }; -struct rk3288_cru { +struct rockchip_cru { struct rk3288_pll { u32 con0; u32 con1; @@ -58,7 +58,7 @@ struct rk3288_cru { u32 cru_sdio1_con[2]; u32 cru_emmc_con[2]; }; -check_member(rk3288_cru, cru_emmc_con[1], 0x021c); +check_member(rockchip_cru, cru_emmc_con[1], 0x021c); /* CRU_CLKSEL11_CON */ enum { diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3399.h b/arch/arm/include/asm/arch-rockchip/cru_rk3399.h index 15eeb9c..789ca6a 100644 --- a/arch/arm/include/asm/arch-rockchip/cru_rk3399.h +++ b/arch/arm/include/asm/arch-rockchip/cru_rk3399.h @@ -10,7 +10,7 @@ /* Private data for the clock driver - used by rockchip_get_cru() */ struct rk3399_clk_priv { - struct rk3399_cru *cru; + struct rockchip_cru *cru; }; struct rk3399_pmuclk_priv { @@ -33,7 +33,7 @@ struct rk3399_pmucru { }; check_member(rk3399_pmucru, pmucru_gatedis_con[1], 0x134); -struct rk3399_cru { +struct rockchip_cru { u32 apll_l_con[6]; u32 reserved[2]; u32 apll_b_con[6]; @@ -65,8 +65,7 @@ struct rk3399_cru { u32 sdio0_con[2]; u32 sdio1_con[2]; }; -check_member(rk3399_cru, sdio1_con[1], 0x594); -#define MHz 1000000 +check_member(rockchip_cru, sdio1_con[1], 0x594); #define KHz 1000 #define OSC_HZ (24*MHz) #define LPLL_HZ (600*MHz) @@ -107,9 +106,9 @@ enum apll_b_frequencies { APLL_B_600_MHZ, }; -void rk3399_configure_cpu_l(struct rk3399_cru *cru, +void rk3399_configure_cpu_l(struct rockchip_cru *cru, enum apll_l_frequencies apll_l_freq); -void rk3399_configure_cpu_b(struct rk3399_cru *cru, +void rk3399_configure_cpu_b(struct rockchip_cru *cru, enum apll_b_frequencies apll_b_freq); #endif /* __ASM_ARCH_CRU_RK3399_H_ */ diff --git a/arch/arm/mach-rockchip/rk3288/clk_rk3288.c b/arch/arm/mach-rockchip/rk3288/clk_rk3288.c index e64ee86..1730f12 100644 --- a/arch/arm/mach-rockchip/rk3288/clk_rk3288.c +++ b/arch/arm/mach-rockchip/rk3288/clk_rk3288.c @@ -8,7 +8,7 @@ #include #include #include -#include +#include int rockchip_get_clk(struct udevice **devp) { diff --git a/arch/arm/mach-rockchip/rk3288/rk3288.c b/arch/arm/mach-rockchip/rk3288/rk3288.c index 9572f7e..47ee5d4 100644 --- a/arch/arm/mach-rockchip/rk3288/rk3288.c +++ b/arch/arm/mach-rockchip/rk3288/rk3288.c @@ -11,7 +11,7 @@ #include #include #include -#include +#include #include #include #include @@ -104,7 +104,7 @@ void board_debug_uart_init(void) static void rk3288_detect_reset_reason(void) { - struct rk3288_cru *cru = rockchip_get_cru(); + struct rockchip_cru *cru = rockchip_get_cru(); const char *reason; if (IS_ERR(cru)) diff --git a/arch/arm/mach-rockchip/rk3399/clk_rk3399.c b/arch/arm/mach-rockchip/rk3399/clk_rk3399.c index f0411c0..a80a46f 100644 --- a/arch/arm/mach-rockchip/rk3399/clk_rk3399.c +++ b/arch/arm/mach-rockchip/rk3399/clk_rk3399.c @@ -8,7 +8,7 @@ #include #include #include -#include +#include static int rockchip_get_cruclk(struct udevice **devp) { diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c b/arch/arm/mach-rockchip/rk3399/rk3399.c index 863024d..dafa142 100644 --- a/arch/arm/mach-rockchip/rk3399/rk3399.c +++ b/arch/arm/mach-rockchip/rk3399/rk3399.c @@ -240,7 +240,7 @@ static void rk3399_force_power_on_reset(void) void spl_board_init(void) { #if defined(SPL_GPIO_SUPPORT) - struct rk3399_cru *cru = rockchip_get_cru(); + struct rockchip_cru *cru = rockchip_get_cru(); /* * The RK3399 resets only 'almost all logic' (see also in the TRM -- cgit v1.1