From 1541d7a63d46309651bb6cb8abee018c04b7dfa2 Mon Sep 17 00:00:00 2001 From: Vanessa Maegima Date: Mon, 8 May 2017 13:17:28 -0300 Subject: pico-imx7d: Add initial support Add the initial support for pico-imx7d board based on Wig Cheng's source code. Add support for eMMC, USB gadget, I2C, PMIC and Ethernet. For more information about this board, please visit: http://www.technexion.org/products/pico/pico-som/pico-imx7-emmc Signed-off-by: Vanessa Maegima Reviewed-by: Fabio Estevam --- arch/arm/cpu/armv7/mx7/Kconfig | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'arch') diff --git a/arch/arm/cpu/armv7/mx7/Kconfig b/arch/arm/cpu/armv7/mx7/Kconfig index 80c1290..aea8526 100644 --- a/arch/arm/cpu/armv7/mx7/Kconfig +++ b/arch/arm/cpu/armv7/mx7/Kconfig @@ -25,6 +25,13 @@ config TARGET_MX7DSABRESD select DM select DM_THERMAL +config TARGET_PICO_IMX7D + bool "pico-imx7d" + select BOARD_LATE_INIT + select MX7D + select DM + select DM_THERMAL + config TARGET_WARP7 bool "warp7" select BOARD_LATE_INIT @@ -45,6 +52,7 @@ config SYS_SOC default "mx7" source "board/freescale/mx7dsabresd/Kconfig" +source "board/technexion/pico-imx7d/Kconfig" source "board/toradex/colibri_imx7/Kconfig" source "board/warp7/Kconfig" -- cgit v1.1 From 6ecbe13756711baa795180d1a63b7a73a835c303 Mon Sep 17 00:00:00 2001 From: Tim Harvey Date: Fri, 12 May 2017 12:58:41 -0700 Subject: drivers: pci: imx: add imx_pcie_remove function There is no dedicated reset signal wired up for the MX6QDL thus if the bootloader enables the link we need some special handling to get the core back into a state where it is safe to touch it for configuration. While there has been some special handling in the Linux kernel to do this, it was removed in 4.11 thus we need to do it properly in the bootloader and therefore without this if you enable PCI in the bootloader you will hang while booting the 4.11 kernel. This puts the PCIe controller back into a safe state for the kernel driver before launching the kernel. Signed-off-by: Tim Harvey Reviewed-by: Fabio Estevam Tested-by: Peter Senna Tschudin --- arch/arm/imx-common/cpu.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'arch') diff --git a/arch/arm/imx-common/cpu.c b/arch/arm/imx-common/cpu.c index 40fe813..74bdd24 100644 --- a/arch/arm/imx-common/cpu.c +++ b/arch/arm/imx-common/cpu.c @@ -275,6 +275,9 @@ u32 get_ahb_clk(void) void arch_preboot_os(void) { +#if defined(CONFIG_PCIE_IMX) + imx_pcie_remove(); +#endif #if defined(CONFIG_CMD_SATA) sata_stop(); #if defined(CONFIG_MX6) -- cgit v1.1 From f7c13e6a791b997e5b73f073db5f81864b882b61 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Beno=C3=AEt=20Th=C3=A9baudeau?= Date: Wed, 3 May 2017 11:59:04 +0200 Subject: mx25: Fix imx_get_perclk() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit imx_get_perclk() used the AHB clock as the clock source for all PER clocks, but the USB PLL output can also be a PER clock source if the corresponding PER CLK MUX bit is set in CCM.MCR. Signed-off-by: Benoît Thébaudeau Reviewed-by: Fabio Estevam --- arch/arm/cpu/arm926ejs/mx25/generic.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/cpu/arm926ejs/mx25/generic.c b/arch/arm/cpu/arm926ejs/mx25/generic.c index 0b1a8f4..f02cffb 100644 --- a/arch/arm/cpu/arm926ejs/mx25/generic.c +++ b/arch/arm/cpu/arm926ejs/mx25/generic.c @@ -58,6 +58,14 @@ static ulong imx_get_mpllclk(void) return imx_decode_pll(readl(&ccm->mpctl), fref); } +static ulong imx_get_upllclk(void) +{ + struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE; + ulong fref = MXC_HCLK; + + return imx_decode_pll(readl(&ccm->upctl), fref); +} + static ulong imx_get_armclk(void) { struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE; @@ -95,7 +103,8 @@ static ulong imx_get_ipgclk(void) static ulong imx_get_perclk(int clk) { struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE; - ulong fref = imx_get_ahbclk(); + ulong fref = readl(&ccm->mcr) & (1 << clk) ? imx_get_upllclk() : + imx_get_ahbclk(); ulong div; div = readl(&ccm->pcdr[CCM_PERCLK_REG(clk)]); -- cgit v1.1 From 3e3aab3379d99f4c955ecca4992ad33ae70e71e4 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Beno=C3=AEt=20Th=C3=A9baudeau?= Date: Wed, 3 May 2017 11:59:05 +0200 Subject: mx25: Add function to set PER clocks MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Introduce the imx_set_perclk() function to make it possible to set the PER clocks. Signed-off-by: Benoît Thébaudeau Reviewed-by: Fabio Estevam --- arch/arm/cpu/arm926ejs/mx25/generic.c | 19 +++++++++++++++++++ arch/arm/include/asm/arch-mx25/clock.h | 1 + 2 files changed, 20 insertions(+) (limited to 'arch') diff --git a/arch/arm/cpu/arm926ejs/mx25/generic.c b/arch/arm/cpu/arm926ejs/mx25/generic.c index f02cffb..5d9bc6c 100644 --- a/arch/arm/cpu/arm926ejs/mx25/generic.c +++ b/arch/arm/cpu/arm926ejs/mx25/generic.c @@ -113,6 +113,25 @@ static ulong imx_get_perclk(int clk) return fref / div; } +int imx_set_perclk(enum mxc_clock clk, bool from_upll, unsigned int freq) +{ + struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE; + ulong fref = from_upll ? imx_get_upllclk() : imx_get_ahbclk(); + ulong div = (fref + freq - 1) / freq; + + if (clk > MXC_UART_CLK || !div || --div > CCM_PERCLK_MASK) + return -EINVAL; + + clrsetbits_le32(&ccm->pcdr[CCM_PERCLK_REG(clk)], + CCM_PERCLK_MASK << CCM_PERCLK_SHIFT(clk), + div << CCM_PERCLK_SHIFT(clk)); + if (from_upll) + setbits_le32(&ccm->mcr, 1 << clk); + else + clrbits_le32(&ccm->mcr, 1 << clk); + return 0; +} + unsigned int mxc_get_clock(enum mxc_clock clk) { if (clk >= MXC_CLK_NUM) diff --git a/arch/arm/include/asm/arch-mx25/clock.h b/arch/arm/include/asm/arch-mx25/clock.h index 9fdaa9d..7753caf 100644 --- a/arch/arm/include/asm/arch-mx25/clock.h +++ b/arch/arm/include/asm/arch-mx25/clock.h @@ -51,6 +51,7 @@ enum mxc_clock { MXC_CLK_NUM }; +int imx_set_perclk(enum mxc_clock clk, bool from_upll, unsigned int freq); unsigned int mxc_get_clock(enum mxc_clock clk); #define imx_get_uartclk() mxc_get_clock(MXC_UART_CLK) -- cgit v1.1 From 65496a34835cb4c9547bd02dd15b018c333add9d Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Thu, 22 Jun 2017 10:50:05 -0300 Subject: mx6: soc: Fix typo in temperature unit name The correct name is 'Celsius', so fix it accordingly. Signed-off-by: Fabio Estevam --- arch/arm/cpu/armv7/mx6/soc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c index dd94797..2bedbdb 100644 --- a/arch/arm/cpu/armv7/mx6/soc.c +++ b/arch/arm/cpu/armv7/mx6/soc.c @@ -158,7 +158,7 @@ u32 get_cpu_speed_grade_hz(void) * OCOTP_MEM0[7:6] (see Fusemap Description Table offset 0x480) * defines a 2-bit Temperature Grade * - * return temperature grade and min/max temperature in celcius + * return temperature grade and min/max temperature in Celsius */ #define OCOTP_MEM0_TEMP_SHIFT 6 -- cgit v1.1