From ccea96f443e2d35cf5ecc341bb14569029eb93b8 Mon Sep 17 00:00:00 2001 From: Shiji Yang Date: Thu, 3 Aug 2023 09:47:17 +0800 Subject: treewide: unify the linker symbol reference format Now all linker symbols are declared as type char[]. Though we can reference the address via both the array name 'var' and its address '&var'. It's better to unify them to avoid confusing developers. This patch converts all '&var' linker symbol refrences to the most commonly used format 'var'. Signed-off-by: Shiji Yang Reviewed-by: Tom Rini --- arch/riscv/cpu/jh7110/spl.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/riscv') diff --git a/arch/riscv/cpu/jh7110/spl.c b/arch/riscv/cpu/jh7110/spl.c index 72adcef..7da6c26 100644 --- a/arch/riscv/cpu/jh7110/spl.c +++ b/arch/riscv/cpu/jh7110/spl.c @@ -77,8 +77,8 @@ void harts_early_init(void) * If it is not cleared, the ECC part is invalid, and an ECC error * will be reported when reading data. */ - ptr = (ulong *)&__bss_end; - len = L2_LIM_MEM_END - (ulong)&__bss_end; + ptr = (ulong *)__bss_end; + len = L2_LIM_MEM_END - (ulong)__bss_end; remain = len % sizeof(ulong); len /= sizeof(ulong); -- cgit v1.1 From f72d0d4a2f9a2d05ebeefb583992cc620f7c4c2d Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Mon, 21 Aug 2023 21:16:56 -0600 Subject: event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass --- arch/riscv/cpu/cpu.c | 4 ++-- arch/riscv/include/asm/system.h | 2 +- arch/riscv/lib/spl.c | 2 +- 3 files changed, 4 insertions(+), 4 deletions(-) (limited to 'arch/riscv') diff --git a/arch/riscv/cpu/cpu.c b/arch/riscv/cpu/cpu.c index ecfb1fb..4c05033 100644 --- a/arch/riscv/cpu/cpu.c +++ b/arch/riscv/cpu/cpu.c @@ -91,7 +91,7 @@ static void dummy_pending_ipi_clear(ulong hart, ulong arg0, ulong arg1) } #endif -int riscv_cpu_setup(void *ctx, struct event *event) +int riscv_cpu_setup(void) { int ret; @@ -145,7 +145,7 @@ int riscv_cpu_setup(void *ctx, struct event *event) return 0; } -EVENT_SPY(EVT_DM_POST_INIT_F, riscv_cpu_setup); +EVENT_SPY_SIMPLE(EVT_DM_POST_INIT_F, riscv_cpu_setup); int arch_early_init_r(void) { diff --git a/arch/riscv/include/asm/system.h b/arch/riscv/include/asm/system.h index ffa7649..87a804b 100644 --- a/arch/riscv/include/asm/system.h +++ b/arch/riscv/include/asm/system.h @@ -26,6 +26,6 @@ struct event; } while (0) /* Hook to set up the CPU (called from SPL too) */ -int riscv_cpu_setup(void *ctx, struct event *event); +int riscv_cpu_setup(void); #endif /* __ASM_RISCV_SYSTEM_H */ diff --git a/arch/riscv/lib/spl.c b/arch/riscv/lib/spl.c index f4d3b67..9b242ed 100644 --- a/arch/riscv/lib/spl.c +++ b/arch/riscv/lib/spl.c @@ -28,7 +28,7 @@ __weak void board_init_f(ulong dummy) if (ret) panic("spl_early_init() failed: %d\n", ret); - riscv_cpu_setup(NULL, NULL); + riscv_cpu_setup(); preloader_console_init(); -- cgit v1.1 From 68f446fb9b0b137dd4e288985ed674be5e544a1e Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Mon, 4 Sep 2023 15:06:34 -0400 Subject: riscv: Rework riscv_cpu_probe for current event macros MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This function should now be a EVENT_SPY_SIMPLE call, update it. Tested-by: Milan P. Stanić Reviewed-by: Heinrich Schuchardt Signed-off-by: Tom Rini --- arch/riscv/cpu/cpu.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/riscv') diff --git a/arch/riscv/cpu/cpu.c b/arch/riscv/cpu/cpu.c index d64aa33..cfe9fdc 100644 --- a/arch/riscv/cpu/cpu.c +++ b/arch/riscv/cpu/cpu.c @@ -66,7 +66,7 @@ static inline bool supports_extension(char ext) #endif /* CONFIG_CPU */ } -static int riscv_cpu_probe(void *ctx, struct event *event) +static int riscv_cpu_probe(void) { #ifdef CONFIG_CPU int ret; @@ -79,7 +79,7 @@ static int riscv_cpu_probe(void *ctx, struct event *event) return 0; } -EVENT_SPY(EVT_DM_POST_INIT_R, riscv_cpu_probe); +EVENT_SPY_SIMPLE(EVT_DM_POST_INIT_R, riscv_cpu_probe); /* * This is called on secondary harts just after the IPI is init'd. Currently -- cgit v1.1 From 59d2a7d7317b02f8224b5cd207c3318662c7fe15 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Mon, 4 Sep 2023 15:06:35 -0400 Subject: riscv: Correct event usage for riscv_cpu_probe/setup MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit With having both an EVENT_SPY_SIMPLE setup for both riscv_cpu_probe and riscv_cpu_setup we do not need the latter function to call the former function as it will already have been done in time. Fixes: 1c55d62fb9cc ("riscv: cpu: make riscv_cpu_probe to EVT_DM_POST_INIT_R callback") Tested-by: Milan P. Stanić Signed-off-by: Tom Rini --- arch/riscv/cpu/cpu.c | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) (limited to 'arch/riscv') diff --git a/arch/riscv/cpu/cpu.c b/arch/riscv/cpu/cpu.c index cfe9fdc..c1a9638 100644 --- a/arch/riscv/cpu/cpu.c +++ b/arch/riscv/cpu/cpu.c @@ -94,11 +94,7 @@ static void dummy_pending_ipi_clear(ulong hart, ulong arg0, ulong arg1) int riscv_cpu_setup(void) { - int ret; - - ret = riscv_cpu_probe(ctx, event); - if (ret) - return ret; + int __maybe_unused ret; /* Enable FPU */ if (supports_extension('d') || supports_extension('f')) { -- cgit v1.1 From c5172c10f669f935d71d5bdb4d7296eeffc717d0 Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Thu, 7 Sep 2023 13:21:28 +0200 Subject: riscv: set fdtfile on VisionFive 2 Multiple revisions of the StarFive VisionFive 2 board exist. They can be identified by reading their EEPROM. Linux uses two differently named device-tree files. To load the correct device-tree we need to set $fdtfile to the device-tree file name that matches the board revision. Signed-off-by: Heinrich Schuchardt Reviewed-by: Leo Yu-Chi Liang --- arch/riscv/Kconfig | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/riscv') diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index 6771d8d..1c62c23 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -26,6 +26,7 @@ config TARGET_SIFIVE_UNMATCHED config TARGET_STARFIVE_VISIONFIVE2 bool "Support StarFive VisionFive2 Board" + select BOARD_LATE_INIT config TARGET_TH1520_LPI4A bool "Support Sipeed's TH1520 Lichee PI 4A Board" -- cgit v1.1 From 90602e779d3ae3bd02faae0eb40b4fcefec419f7 Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Sun, 17 Sep 2023 13:47:31 +0200 Subject: riscv: dts: starfive: generate u-boot-spl.bin.normal.out MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The StarFive VisionFive 2 board cannot load spl/u-boot-spl.bin but needs a prefixed header. We have referring to a vendor tool (spl_tool) for this task. 'mkimage -T sfspl' can generate the prefixed file. Use binman to invoke mkimage for the generation of file spl/u-boot-spl.bin.normal.out. Update the documentation. Signed-off-by: Heinrich Schuchardt Tested-by: Milan P. Stanić --- arch/riscv/dts/jh7110-starfive-visionfive-2-u-boot.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'arch/riscv') diff --git a/arch/riscv/dts/jh7110-starfive-visionfive-2-u-boot.dtsi b/arch/riscv/dts/jh7110-starfive-visionfive-2-u-boot.dtsi index 13f69da..5518531 100644 --- a/arch/riscv/dts/jh7110-starfive-visionfive-2-u-boot.dtsi +++ b/arch/riscv/dts/jh7110-starfive-visionfive-2-u-boot.dtsi @@ -103,4 +103,15 @@ }; }; }; + + spl-img { + filename = "spl/u-boot-spl.bin.normal.out"; + + mkimage { + args = "-T sfspl"; + + u-boot-spl { + }; + }; +}; }; -- cgit v1.1 From 50834884a8159845475fdc28ac196a41fe4d4915 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Tue, 19 Sep 2023 21:00:15 -0600 Subject: Record the position of the SMBIOS tables Remember where these end up so that we can pass this information on to the EFI layer. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- arch/riscv/include/asm/global_data.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'arch/riscv') diff --git a/arch/riscv/include/asm/global_data.h b/arch/riscv/include/asm/global_data.h index 9d97517..937fa4d 100644 --- a/arch/riscv/include/asm/global_data.h +++ b/arch/riscv/include/asm/global_data.h @@ -32,6 +32,9 @@ struct arch_global_data { ulong available_harts; #endif #endif +#ifdef CONFIG_SMBIOS + ulong smbios_start; /* Start address of SMBIOS table */ +#endif }; #include -- cgit v1.1 From 1e94b46f73cedcebbff73799203f3266c5b28d90 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Thu, 14 Sep 2023 18:21:46 -0600 Subject: common: Drop linux/printk.h from common header This old patch was marked as deferred. Bring it back to life, to continue towards the removal of common.h Move this out of the common header and include it only where needed. Signed-off-by: Simon Glass --- arch/riscv/lib/smp.c | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/riscv') diff --git a/arch/riscv/lib/smp.c b/arch/riscv/lib/smp.c index 4f073a0..f3cd8b9 100644 --- a/arch/riscv/lib/smp.c +++ b/arch/riscv/lib/smp.c @@ -10,6 +10,7 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; -- cgit v1.1