From 806968935cee638f54e264151214349ea0d48fe6 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 14 May 2021 21:34:23 -0400 Subject: ppc: Remove MPC8568MDS board This board has not been converted to CONFIG_DM_PCI by the deadline and is also missing conversion to CONFIG_DM. Remove it. As this is the last ARCH_MPC8568 platform, remove that support as well. Cc: Priyanka Jain Signed-off-by: Tom Rini --- arch/powerpc/cpu/mpc85xx/Kconfig | 21 ++--------- arch/powerpc/cpu/mpc85xx/Makefile | 1 - arch/powerpc/cpu/mpc85xx/mpc8568_serdes.c | 58 ------------------------------- arch/powerpc/include/asm/config_mpc85xx.h | 10 ------ arch/powerpc/include/asm/immap_85xx.h | 6 +--- 5 files changed, 3 insertions(+), 93 deletions(-) delete mode 100644 arch/powerpc/cpu/mpc85xx/mpc8568_serdes.c (limited to 'arch/powerpc') diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig index 0a2921d..cd7aa95 100644 --- a/arch/powerpc/cpu/mpc85xx/Kconfig +++ b/arch/powerpc/cpu/mpc85xx/Kconfig @@ -49,10 +49,6 @@ config TARGET_MPC8548CDS select ARCH_MPC8548 select FSL_VIA -config TARGET_MPC8568MDS - bool "Support MPC8568MDS" - select ARCH_MPC8568 - config TARGET_P1010RDB_PA bool "Support P1010RDB_PA" select ARCH_P1010 @@ -378,15 +374,6 @@ config ARCH_MPC8560 select FSL_LAW select SYS_FSL_HAS_DDR1 -config ARCH_MPC8568 - bool - select FSL_LAW - select FSL_PCIE_RESET - select SYS_FSL_HAS_DDR2 - select SYS_FSL_HAS_SEC - select SYS_FSL_SEC_BE - select SYS_FSL_SEC_COMPAT_2 - config ARCH_MPC8572 bool select FSL_LAW @@ -904,7 +891,6 @@ config SYS_CCSRBAR_DEFAULT ARCH_MPC8544 || \ ARCH_MPC8548 || \ ARCH_MPC8560 || \ - ARCH_MPC8568 || \ ARCH_MPC8572 || \ ARCH_P1010 || \ ARCH_P1011 || \ @@ -1128,8 +1114,7 @@ config SYS_FSL_NUM_LAWS ARCH_P1025 || \ ARCH_P2020 default 10 if ARCH_MPC8544 || \ - ARCH_MPC8548 || \ - ARCH_MPC8568 + ARCH_MPC8548 default 8 if ARCH_MPC8540 || \ ARCH_MPC8560 help @@ -1203,8 +1188,7 @@ config SYS_FSL_LBC_CLK_DIV int "Divider of platform clock" depends on FSL_ELBC || ARCH_MPC8540 || \ ARCH_MPC8548 || \ - ARCH_MPC8560 || \ - ARCH_MPC8568 + ARCH_MPC8560 default 2 if ARCH_P2041 || \ ARCH_P3041 || \ @@ -1222,7 +1206,6 @@ config FSL_VIA source "board/emulation/qemu-ppce500/Kconfig" source "board/freescale/corenet_ds/Kconfig" source "board/freescale/mpc8548cds/Kconfig" -source "board/freescale/mpc8568mds/Kconfig" source "board/freescale/p1010rdb/Kconfig" source "board/freescale/p1_p2_rdb_pc/Kconfig" source "board/freescale/p2041rdb/Kconfig" diff --git a/arch/powerpc/cpu/mpc85xx/Makefile b/arch/powerpc/cpu/mpc85xx/Makefile index 4d9a07b..8cd4b44 100644 --- a/arch/powerpc/cpu/mpc85xx/Makefile +++ b/arch/powerpc/cpu/mpc85xx/Makefile @@ -61,7 +61,6 @@ obj-$(CONFIG_ARCH_C29X) += c29x_serdes.o obj-$(CONFIG_ARCH_MPC8536) += mpc8536_serdes.o obj-$(CONFIG_ARCH_MPC8544) += mpc8544_serdes.o obj-$(CONFIG_ARCH_MPC8548) += mpc8548_serdes.o -obj-$(CONFIG_ARCH_MPC8568) += mpc8568_serdes.o obj-$(CONFIG_ARCH_MPC8572) += mpc8572_serdes.o obj-$(CONFIG_ARCH_P1010) += p1010_serdes.o obj-$(CONFIG_ARCH_P1011) += p1021_serdes.o diff --git a/arch/powerpc/cpu/mpc85xx/mpc8568_serdes.c b/arch/powerpc/cpu/mpc85xx/mpc8568_serdes.c deleted file mode 100644 index 81b66c3..0000000 --- a/arch/powerpc/cpu/mpc85xx/mpc8568_serdes.c +++ /dev/null @@ -1,58 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright 2010 Freescale Semiconductor, Inc. - */ - -#include -#include -#include -#include -#include -#include - -#define SRDS1_MAX_LANES 8 - -static u32 serdes1_prtcl_map; - -static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = { - [0x3] = {PCIE1, PCIE1, PCIE1, PCIE1, SRIO1, SRIO1, SRIO1, SRIO1}, - [0x4] = {PCIE1, PCIE1, PCIE1, PCIE1, SRIO1, SRIO1, SRIO1, SRIO1}, - [0x5] = {NONE, NONE, NONE, NONE, SRIO1, SRIO1, SRIO1, SRIO1}, - [0x6] = {NONE, NONE, NONE, NONE, SRIO1, SRIO1, SRIO1, SRIO1}, - [0x7] = {PCIE1, PCIE1, PCIE1, PCIE1, PCIE1, PCIE1, PCIE1, PCIE1}, -}; - -int is_serdes_configured(enum srds_prtcl prtcl) -{ - if (!(serdes1_prtcl_map & (1 << NONE))) - fsl_serdes_init(); - - return (1 << prtcl) & serdes1_prtcl_map; -} - -void fsl_serdes_init(void) -{ - ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); - u32 pordevsr = in_be32(&gur->pordevsr); - u32 srds_cfg = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> - MPC85xx_PORDEVSR_IO_SEL_SHIFT; - int lane; - - if (serdes1_prtcl_map & (1 << NONE)) - return; - - debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg); - - if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) { - printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); - return; - } - - for (lane = 0; lane < SRDS1_MAX_LANES; lane++) { - enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane]; - serdes1_prtcl_map |= (1 << lane_prtcl); - } - - /* Set the first bit to indicate serdes has been initialized */ - serdes1_prtcl_map |= (1 << NONE); -} diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index a52b31e..33a3b3a 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -28,16 +28,6 @@ #define CONFIG_SYS_FSL_RMU #define CONFIG_SYS_FSL_SRIO_MSG_UNIT_NUM 2 -#elif defined(CONFIG_ARCH_MPC8568) -#define QE_MURAM_SIZE 0x10000UL -#define MAX_QE_RISC 2 -#define QE_NUM_OF_SNUM 28 -#define CONFIG_SYS_FSL_SRIO_MAX_PORTS 1 -#define CONFIG_SYS_FSL_SRIO_OB_WIN_NUM 9 -#define CONFIG_SYS_FSL_SRIO_IB_WIN_NUM 5 -#define CONFIG_SYS_FSL_RMU -#define CONFIG_SYS_FSL_SRIO_MSG_UNIT_NUM 2 - #elif defined(CONFIG_ARCH_P1010) #define CONFIG_FSL_SDHC_V2_3 #define CONFIG_TSECV2 diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h index bb6a684..900b8f4 100644 --- a/arch/powerpc/include/asm/immap_85xx.h +++ b/arch/powerpc/include/asm/immap_85xx.h @@ -2457,11 +2457,7 @@ typedef struct ccsr_gur { u32 svr; /* System version */ u8 res10[8]; u32 rstcr; /* Reset control */ -#if defined(CONFIG_ARCH_MPC8568) - u8 res11a[76]; - par_io_t qe_par_io[7]; - u8 res11b[1600]; -#elif defined(CONFIG_ARCH_P1021) || defined(CONFIG_ARCH_P1025) +#if defined(CONFIG_ARCH_P1021) || defined(CONFIG_ARCH_P1025) u8 res11a[12]; u32 iovselsr; u8 res11b[60]; -- cgit v1.1