From ee422142f454d54f0ed39a2cbf083ff12e98a3e1 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= Date: Tue, 25 Apr 2017 00:39:20 +0200 Subject: MIPS: add initial infrastructure for Broadcom MIPS SoCs MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit CFE checks CPU Thread in a different way (using register $22): mfc0 t1, C0_BCM_CONFIG, 3 # $22 li t2, CP0_CMT_TPID # (1 << 31) and t1, t2 bnez t1, 2f # if we are running on thread 1, skip init nop Signed-off-by: Álvaro Fernández Rojas Reviewed-by: Simon Glass --- arch/mips/cpu/start.S | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'arch/mips/cpu') diff --git a/arch/mips/cpu/start.S b/arch/mips/cpu/start.S index a6b7a04..d01ee9f 100644 --- a/arch/mips/cpu/start.S +++ b/arch/mips/cpu/start.S @@ -151,8 +151,13 @@ reset: mfc0 t0, CP0_GLOBALNUMBER #endif +#ifdef CONFIG_ARCH_BMIPS +1: mfc0 t0, CP0_DIAGNOSTIC, 3 + and t0, t0, (1 << 31) +#else 1: mfc0 t0, CP0_EBASE and t0, t0, EBASE_CPUNUM +#endif /* Hang if this isn't the first CPU in the system */ 2: beqz t0, 4f -- cgit v1.1