From d136eb9bfeca97131aaa6daf214018823e8a3869 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Tue, 5 Nov 2019 09:47:53 -0300 Subject: mx7ulp: scg: Remove unnused scg_a7_apll_init() scg_a7_apll_init() is not called anywhere, so remove such dead code Signed-off-by: Fabio Estevam --- arch/arm/include/asm/arch-mx7ulp/scg.h | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/arm/include') diff --git a/arch/arm/include/asm/arch-mx7ulp/scg.h b/arch/arm/include/asm/arch-mx7ulp/scg.h index 531d8f3..b79bde3 100644 --- a/arch/arm/include/asm/arch-mx7ulp/scg.h +++ b/arch/arm/include/asm/arch-mx7ulp/scg.h @@ -331,7 +331,6 @@ u32 decode_pll(enum pll_clocks pll); void scg_a7_rccr_init(void); void scg_a7_spll_init(void); void scg_a7_ddrclk_init(void); -void scg_a7_apll_init(void); void scg_a7_firc_init(void); void scg_a7_nicclk_init(void); void scg_a7_sys_clk_sel(enum scg_sys_src clk); -- cgit v1.1 From c671d8af0bb07b028d808b994b83b2ec25578a44 Mon Sep 17 00:00:00 2001 From: Igor Opaniuk Date: Tue, 3 Dec 2019 14:04:47 +0200 Subject: board: colibri_imx7: reserve DDR memory for Cortex-M4 i.MX 7's Cortex-M4 core can run from DDR and uses DDR memory for the rpmsg communication. Both use cases need a fixed location of memory reserved. For the rpmsg use case the reserved area needs to be in sync with the kernel's hardcoded vring descriptor location. Use the linux,usable-memory property to carve out 1MB of memory in case the M4 core is running. Also make sure that the i.MX 7 specific rpmsg driver does not get loaded in case we do not carve out memory. Signed-off-by: Stefan Agner Signed-off-by: Igor Opaniuk Reviewed-by: Oleksandr Suvorov --- arch/arm/include/asm/mach-imx/sys_proto.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/arm/include') diff --git a/arch/arm/include/asm/mach-imx/sys_proto.h b/arch/arm/include/asm/mach-imx/sys_proto.h index 52c83ba..c9b509e 100644 --- a/arch/arm/include/asm/mach-imx/sys_proto.h +++ b/arch/arm/include/asm/mach-imx/sys_proto.h @@ -153,6 +153,8 @@ void init_src(void); void init_snvs(void); void imx_wdog_disable_powerdown(void); +int arch_auxiliary_core_check_up(u32 core_id); + int board_mmc_get_env_dev(int devno); int nxp_board_rev(void); -- cgit v1.1 From df1b721f60027705ff0fb804c1da472ba31f978b Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Tue, 26 Nov 2019 09:35:32 +0100 Subject: ARM: mx6: pmu: Expose PMU LDO configuration interface Make the PMU LDO configuration interface available to board code, so that board code can reconfigure the internal LDOs of the SoC. Signed-off-by: Marek Vasut Cc: Eric Nelson Cc: Fabio Estevam Cc: Stefano Babic Reviewed-by: Eric Nelson --- arch/arm/include/asm/arch-mx6/sys_proto.h | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'arch/arm/include') diff --git a/arch/arm/include/asm/arch-mx6/sys_proto.h b/arch/arm/include/asm/arch-mx6/sys_proto.h index 4bf7dff..1e5fa1a 100644 --- a/arch/arm/include/asm/arch-mx6/sys_proto.h +++ b/arch/arm/include/asm/arch-mx6/sys_proto.h @@ -20,6 +20,14 @@ int imx6_pcie_toggle_power(void); int imx6_pcie_toggle_reset(void); +enum ldo_reg { + LDO_ARM, + LDO_SOC, + LDO_PU, +}; + +int set_ldo_voltage(enum ldo_reg ldo, u32 mv); + /** * iomuxc_set_rgmii_io_voltage - set voltage level of RGMII/USB pins * -- cgit v1.1