From 1fcf190e7001f0723dce7d36713e3530066a02f7 Mon Sep 17 00:00:00 2001 From: Igor Prusov Date: Mon, 25 Sep 2023 18:52:09 +0300 Subject: clk: Add clock driver for Amlogic A1 This patch adds basic clock driver for Amlogic A1 Family which supports enabling/disabling some gates, getting frequencies and setting rate with limited reparenting. Signed-off-by: Igor Prusov Reviewed-by: Simon Glass Link: https://lore.kernel.org/r/20230925155209.130671-3-ivprusov@salutedevices.com Signed-off-by: Neil Armstrong --- arch/arm/include/asm/arch-meson/clock-a1.h | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) create mode 100644 arch/arm/include/asm/arch-meson/clock-a1.h (limited to 'arch/arm/include/asm/arch-meson') diff --git a/arch/arm/include/asm/arch-meson/clock-a1.h b/arch/arm/include/asm/arch-meson/clock-a1.h new file mode 100644 index 0000000..f6795f5 --- /dev/null +++ b/arch/arm/include/asm/arch-meson/clock-a1.h @@ -0,0 +1,23 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2018 - AmLogic, Inc. + * Copyright 2023 (C) SberDevices, Inc. + */ + +#ifndef _ARCH_MESON_CLOCK_A1_H_ +#define _ARCH_MESON_CLOCK_A1_H_ + +/* + * Clock controller register offsets + */ +#define A1_SYS_OSCIN_CTRL 0x0 +#define A1_SYS_CLK_CTRL0 0x10 +#define A1_SYS_CLK_EN0 0x1c +#define A1_SAR_ADC_CLK_CTR 0xc0 +#define A1_SPIFC_CLK_CTRL 0xd8 +#define A1_USB_BUSCLK_CTRL 0xdc +#define A1_SD_EMMC_CLK_CTRL 0xe0 + +#define A1_ANACTRL_FIXPLL_CTRL0 0x0 + +#endif /* _ARCH_MESON_CLOCK_A1_H_ */ -- cgit v1.1