From a3efa53c01100fc1aa015c37a258a50142cca708 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Wed, 23 Feb 2022 16:17:39 +0100 Subject: arm64: zynqmp: Use assigned-clock-rates for setting up clock in SOM With limited low level configuration done via psu-init only IPs connected on SOM are initialized and configured. All IPs connected to carrier card are not initialized. There is a need to do proper reset, pin configuration and also clock setting. The patch targets the last part which is setting up proper clock for USBs and SDs. Also setup proper bus width for SD cards. Signed-off-by: Michal Simek Signed-off-by: Sai Krishna Potthuri Link: https://lore.kernel.org/r/d9f80b2551bd246c3d7ecb09b516806c8dc83ed9.1645629459.git.michal.simek@xilinx.com --- arch/arm/dts/zynqmp-sm-k26-revA.dts | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/dts/zynqmp-sm-k26-revA.dts') diff --git a/arch/arm/dts/zynqmp-sm-k26-revA.dts b/arch/arm/dts/zynqmp-sm-k26-revA.dts index 5f55df2..e9baf4c 100644 --- a/arch/arm/dts/zynqmp-sm-k26-revA.dts +++ b/arch/arm/dts/zynqmp-sm-k26-revA.dts @@ -189,6 +189,7 @@ disable-wp; bus-width = <8>; xlnx,mio-bank = <0>; + assigned-clock-rates = <187498123>; }; &spi1 { /* MIO6, 9-11 */ -- cgit v1.1 From 8b82a3a7feb06e25b4b731dc5485a1da315d2a93 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Wed, 23 Feb 2022 16:17:41 +0100 Subject: arm64: zynqmp: Enable DP driver for SOMs The main reason is to send pmufw cfg overlay from U-Boot to PMUFW to enable access to DP. Overlay is sent when cls command is called and for that IP has to be enabled in carrier cards. And IP needs to be also enabled in SOM dt because with DTB reselection new DT is not parsed in pre reloc U-Boot instance. It is called from board_f via embedded_dtb_select(). That's why bind function is not able to allocate memory and it ends up with error: "Video device 'display@fd4a0000' cannot allocate frame buffer memory -ensure the device is set up before relocation" To avoid this situation DP is placed also to SOM where bind function is called and frame buffer memory is allocated and just reused after DTB reselection. Result is the same. There could be a problem in Linux with different DP configurations but that's need to be solved there because console should be on from u-boot already. Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/c4f31641f917fddb09d976f56875057c658f264c.1645629459.git.michal.simek@xilinx.com --- arch/arm/dts/zynqmp-sm-k26-revA.dts | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch/arm/dts/zynqmp-sm-k26-revA.dts') diff --git a/arch/arm/dts/zynqmp-sm-k26-revA.dts b/arch/arm/dts/zynqmp-sm-k26-revA.dts index e9baf4c..d242f87 100644 --- a/arch/arm/dts/zynqmp-sm-k26-revA.dts +++ b/arch/arm/dts/zynqmp-sm-k26-revA.dts @@ -317,3 +317,7 @@ &ams_pl { status = "okay"; }; + +&zynqmp_dpsub { + status = "okay"; +}; -- cgit v1.1 From 0ac03fbab51c72fa978569a831c001c4ddad8e2a Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 14 Mar 2022 15:26:11 +0100 Subject: arm64: zynqmp: Add pinctrl emmc description to SM-K26 Production SOM has emmc on it and make sense to describe pin description to be able use EMMC if it is not configured via psu_init. (Still some regs are not handled but this is one step in that direction) Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/3545a0f08d342de98efc82b78f5725eda091555a.1647267969.git.michal.simek@xilinx.com --- arch/arm/dts/zynqmp-sm-k26-revA.dts | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) (limited to 'arch/arm/dts/zynqmp-sm-k26-revA.dts') diff --git a/arch/arm/dts/zynqmp-sm-k26-revA.dts b/arch/arm/dts/zynqmp-sm-k26-revA.dts index d242f87..14ab316 100644 --- a/arch/arm/dts/zynqmp-sm-k26-revA.dts +++ b/arch/arm/dts/zynqmp-sm-k26-revA.dts @@ -14,6 +14,7 @@ #include #include #include +#include / { model = "ZynqMP SM-K26 Rev1/B/A"; @@ -92,6 +93,23 @@ status = "okay"; }; +&pinctrl0 { + status = "okay"; + pinctrl_sdhci0_default: sdhci0-default { + conf { + groups = "sdio0_0_grp"; + slew-rate = ; + power-source = ; + bias-disable; + }; + + mux { + groups = "sdio0_0_grp"; + function = "sdio0"; + }; + }; +}; + &qspi { /* MIO 0-5 - U143 */ status = "okay"; flash@0 { /* MT25QU512A */ @@ -185,6 +203,8 @@ &sdhci0 { /* MIO13-23 - 16GB emmc MTFC16GAPALBH-IT - U133A */ status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sdhci0_default>; non-removable; disable-wp; bus-width = <8>; -- cgit v1.1