From 0dc4ab9c43ff6a235b4c0c5295a1a9747ea684c9 Mon Sep 17 00:00:00 2001 From: Aaron Williams Date: Tue, 30 Jun 2020 12:08:56 +0200 Subject: mips: octeon: Initial minimal support for the Marvell Octeon SoC This patch adds very basic support for the Octeon III SoCs. Only CFI parallel NOR flash and UART is supported for now. Please note that the basic Octeon port does not include the DDR3/4 initialization yet. This will be added in some follow-up patches later. To still use U-Boot on with this port, the L2 cache (4MiB on Octeon III CN73xx) is used as RAM. This way, U-Boot can boot to the prompt on such boards. Signed-off-by: Aaron Williams Signed-off-by: Stefan Roese --- MAINTAINERS | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index 2a281a9..bde8530 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -770,6 +770,12 @@ M: Ezequiel Garcia S: Maintained F: arch/mips/mach-jz47xx/ +MIPS Octeon +M: Aaron Williams +S: Maintained +F: arch/mips/mach-octeon/ +F: arch/mips/include/asm/arch-octeon/ + MMC M: Peng Fan S: Maintained -- cgit v1.1