From b1350636e69d4aac1e00aee5a327b5724f074420 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Tue, 19 Sep 2023 21:00:07 -0600 Subject: x86: coreboot: Look for DBG2 UART in SPL too If coreboot does not set up sysinfo for the UART, SPL currently hangs. Use the DBG2 technique there as well. This allows coreboot64 to boot from coreboot even if the console info is missing from sysinfo Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- configs/coreboot64_defconfig | 1 + drivers/serial/Kconfig | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/configs/coreboot64_defconfig b/configs/coreboot64_defconfig index 5623197..e816596 100644 --- a/configs/coreboot64_defconfig +++ b/configs/coreboot64_defconfig @@ -54,4 +54,5 @@ CONFIG_SYS_64BIT_LBA=y CONFIG_SOUND=y CONFIG_SOUND_I8254=y CONFIG_CONSOLE_SCROLL_LINES=5 +CONFIG_SPL_ACPI=y # CONFIG_GZIP is not set diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index 7ca42df..27b4b9d 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig @@ -672,7 +672,7 @@ config COREBOOT_SERIAL config COREBOOT_SERIAL_FROM_DBG2 bool "Obtain UART from ACPI tables" depends on COREBOOT_SERIAL - default y if !SPL + default y help Select this to try to find a DBG2 record in the ACPI tables, in the event that coreboot does not provide information about the UART in the -- cgit v1.1