From 9ed00b072be8fe346604eaec805359fa762fcb59 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Thu, 25 Aug 2016 16:22:10 +0200 Subject: arm: mvebu: theadorable: Configure board for PCIe 2.0 capability Use a board-specific board_sat_r_get() function to configure the board for PCIe 2.0 capability (e.g. 5GB/s link speed). Otherwise the default of 2.5GB/s will be established. Signed-off-by: Stefan Roese --- board/theadorable/theadorable.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/board/theadorable/theadorable.c b/board/theadorable/theadorable.c index c1db289..d621682 100644 --- a/board/theadorable/theadorable.c +++ b/board/theadorable/theadorable.c @@ -126,6 +126,12 @@ MV_BIN_SERDES_CFG *board_serdes_cfg_get(u8 pex_mode) return &theadorable_serdes_cfg[0]; } +u8 board_sat_r_get(u8 dev_num, u8 reg) +{ + /* Bit 0 enables PCI 2.0 link capabilities instead of PCI 1.x */ + return 0x01; +} + int board_early_init_f(void) { /* Configure MPP */ -- cgit v1.1