From 812711ce6b3a386125dcf0d6a59588e461abbb87 Mon Sep 17 00:00:00 2001 From: Haavard Skinnemoen Date: Thu, 13 Dec 2007 12:56:31 +0100 Subject: Implement __raw_{read,write}[bwl] on all architectures This adds implementations of __raw_read[bwl] and __raw_write[bwl] to m68k, ppc, nios and nios2. The m68k and ppc implementations were taken from Linux. Signed-off-by: Haavard Skinnemoen --- include/asm-m68k/io.h | 14 ++++++++++++++ include/asm-nios/io.h | 8 ++++++++ include/asm-nios2/io.h | 8 ++++++++ include/asm-ppc/io.h | 32 +++++++++++++++++++++++++++++++- 4 files changed, 61 insertions(+), 1 deletion(-) diff --git a/include/asm-m68k/io.h b/include/asm-m68k/io.h index e14a581..29b3972 100644 --- a/include/asm-m68k/io.h +++ b/include/asm-m68k/io.h @@ -28,6 +28,20 @@ #include +/* ++roman: The assignments to temp. vars avoid that gcc sometimes generates + * two accesses to memory, which may be undesirable for some devices. + */ +#define __raw_readb(addr) \ + ({ u8 __v = (*(volatile u8 *) (addr)); __v; }) +#define __raw_readw(addr) \ + ({ u16 __v = (*(volatile u16 *) (addr)); __v; }) +#define __raw_readl(addr) \ + ({ u32 __v = (*(volatile u32 *) (addr)); __v; }) + +#define __raw_writeb(addr,b) (void)((*(volatile u8 *) (addr)) = (b)) +#define __raw_writew(addr,w) (void)((*(volatile u16 *) (addr)) = (w)) +#define __raw_writel(addr,l) (void)((*(volatile u32 *) (addr)) = (l)) + #define readb(addr) in_8((volatile u8 *)(addr)) #define writeb(b,addr) out_8((volatile u8 *)(addr), (b)) #if !defined(__BIG_ENDIAN) diff --git a/include/asm-nios/io.h b/include/asm-nios/io.h index d77695a..08e46a3 100644 --- a/include/asm-nios/io.h +++ b/include/asm-nios/io.h @@ -23,6 +23,14 @@ #ifndef __ASM_NIOS_IO_H_ #define __ASM_NIOS_IO_H_ +#define __raw_writeb(v,a) (*(volatile unsigned char *)(a) = (v)) +#define __raw_writew(v,a) (*(volatile unsigned short *)(a) = (v)) +#define __raw_writel(v,a) (*(volatile unsigned int *)(a) = (v)) + +#define __raw_readb(a) (*(volatile unsigned char *)(a)) +#define __raw_readw(a) (*(volatile unsigned short *)(a)) +#define __raw_readl(a) (*(volatile unsigned int *)(a)) + #define readb(addr)\ ({unsigned char val;\ asm volatile( " pfxio 0 \n"\ diff --git a/include/asm-nios2/io.h b/include/asm-nios2/io.h index 5bb5322..54cbd57 100644 --- a/include/asm-nios2/io.h +++ b/include/asm-nios2/io.h @@ -33,6 +33,14 @@ extern unsigned char inb (unsigned char *port); extern unsigned short inw (unsigned short *port); extern unsigned inl (unsigned port); +#define __raw_writeb(v,a) (*(volatile unsigned char *)(a) = (v)) +#define __raw_writew(v,a) (*(volatile unsigned short *)(a) = (v)) +#define __raw_writel(v,a) (*(volatile unsigned int *)(a) = (v)) + +#define __raw_readb(a) (*(volatile unsigned char *)(a)) +#define __raw_readw(a) (*(volatile unsigned short *)(a)) +#define __raw_readl(a) (*(volatile unsigned int *)(a)) + #define readb(addr)\ ({unsigned char val;\ asm volatile( "ldbio %0, 0(%1)" :"=r"(val) : "r" (addr)); val;}) diff --git a/include/asm-ppc/io.h b/include/asm-ppc/io.h index 11dfa1c..86fe8dc 100644 --- a/include/asm-ppc/io.h +++ b/include/asm-ppc/io.h @@ -121,13 +121,43 @@ static inline void isync(void) #define iobarrier_w() eieio() /* + * Non ordered and non-swapping "raw" accessors + */ +#define __iomem +#define PCI_FIX_ADDR(addr) (addr) + +static inline unsigned char __raw_readb(const volatile void __iomem *addr) +{ + return *(volatile unsigned char *)PCI_FIX_ADDR(addr); +} +static inline unsigned short __raw_readw(const volatile void __iomem *addr) +{ + return *(volatile unsigned short *)PCI_FIX_ADDR(addr); +} +static inline unsigned int __raw_readl(const volatile void __iomem *addr) +{ + return *(volatile unsigned int *)PCI_FIX_ADDR(addr); +} +static inline void __raw_writeb(unsigned char v, volatile void __iomem *addr) +{ + *(volatile unsigned char *)PCI_FIX_ADDR(addr) = v; +} +static inline void __raw_writew(unsigned short v, volatile void __iomem *addr) +{ + *(volatile unsigned short *)PCI_FIX_ADDR(addr) = v; +} +static inline void __raw_writel(unsigned int v, volatile void __iomem *addr) +{ + *(volatile unsigned int *)PCI_FIX_ADDR(addr) = v; +} + +/* * 8, 16 and 32 bit, big and little endian I/O operations, with barrier. * * Read operations have additional twi & isync to make sure the read * is actually performed (i.e. the data has come back) before we start * executing any following instructions. */ -#define __iomem extern inline int in_8(const volatile unsigned char __iomem *addr) { int ret; -- cgit v1.1