From 6f96ed7e2080c305fa45e8b12d8013d8bab9ec5d Mon Sep 17 00:00:00 2001
From: Marek Vasut <marex@denx.de>
Date: Mon, 13 Aug 2018 18:42:32 +0200
Subject: ARM: dts: socfpga: Flag reset manager on A10 as pre-reloc

The Altera reset manager block must be available very early on, since
it controls ie. UART resets. Flag it as pre-reloc.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
---
 arch/arm/dts/socfpga_arria10.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/dts/socfpga_arria10.dtsi b/arch/arm/dts/socfpga_arria10.dtsi
index 2f935a2..51b31dc 100644
--- a/arch/arm/dts/socfpga_arria10.dtsi
+++ b/arch/arm/dts/socfpga_arria10.dtsi
@@ -55,6 +55,7 @@
 		device_type = "soc";
 		interrupt-parent = <&intc>;
 		ranges;
+		u-boot,dm-pre-reloc;
 
 		amba {
 			compatible = "simple-bus";
@@ -735,6 +736,7 @@
 			compatible = "altr,rst-mgr";
 			reg = <0xffd05000 0x100>;
 			altr,modrst-offset = <0x20>;
+			u-boot,dm-pre-reloc;
 		};
 
 		scu: snoop-control-unit@ffffc000 {
-- 
cgit v1.1