From 53b04c6c092ccf65734924a1e094ebebd633796a Mon Sep 17 00:00:00 2001 From: Vignesh Raghavendra Date: Tue, 7 Jul 2020 13:43:33 +0530 Subject: dma: ti: Add static PSIL endpoint information Much of PSIL endpoint configuration for a given SoC can be known at compile time, therefore pass them for platform specific data instead of DT. Add per SoC's specific PSIL endpoint data. This is to bring driver in sync with upstream DT. Signed-off-by: Vignesh Raghavendra Reviewed-by: Grygorii Strashko --- drivers/dma/ti/Kconfig | 3 ++ drivers/dma/ti/Makefile | 4 ++ drivers/dma/ti/k3-psil-am654.c | 89 ++++++++++++++++++++++++++++++++++++++++++ drivers/dma/ti/k3-psil-j721e.c | 47 ++++++++++++++++++++++ drivers/dma/ti/k3-psil-priv.h | 43 ++++++++++++++++++++ drivers/dma/ti/k3-psil.c | 42 ++++++++++++++++++++ drivers/dma/ti/k3-psil.h | 67 +++++++++++++++++++++++++++++++ 7 files changed, 295 insertions(+) create mode 100644 drivers/dma/ti/k3-psil-am654.c create mode 100644 drivers/dma/ti/k3-psil-j721e.c create mode 100644 drivers/dma/ti/k3-psil-priv.h create mode 100644 drivers/dma/ti/k3-psil.c create mode 100644 drivers/dma/ti/k3-psil.h diff --git a/drivers/dma/ti/Kconfig b/drivers/dma/ti/Kconfig index 3d54983..9d7a1ef 100644 --- a/drivers/dma/ti/Kconfig +++ b/drivers/dma/ti/Kconfig @@ -12,3 +12,6 @@ config TI_K3_NAVSS_UDMA help Support for UDMA used in K3 devices. endif + +config TI_K3_PSIL + bool diff --git a/drivers/dma/ti/Makefile b/drivers/dma/ti/Makefile index de2f9ac..4ea9c62 100644 --- a/drivers/dma/ti/Makefile +++ b/drivers/dma/ti/Makefile @@ -1,3 +1,7 @@ # SPDX-License-Identifier: GPL-2.0+ obj-$(CONFIG_TI_K3_NAVSS_UDMA) += k3-udma.o +obj-$(CONFIG_TI_K3_PSIL) += k3-psil-data.o +k3-psil-data-y += k3-psil.o +k3-psil-data-$(CONFIG_SOC_K3_AM6) += k3-psil-am654.o +k3-psil-data-$(CONFIG_SOC_K3_J721E) += k3-psil-j721e.o diff --git a/drivers/dma/ti/k3-psil-am654.c b/drivers/dma/ti/k3-psil-am654.c new file mode 100644 index 0000000..f95d99c --- /dev/null +++ b/drivers/dma/ti/k3-psil-am654.c @@ -0,0 +1,89 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com + * Author: Peter Ujfalusi + */ + +#include + +#include "k3-psil-priv.h" + +#define PSIL_ETHERNET(x) \ + { \ + .thread_id = x, \ + .ep_config = { \ + .ep_type = PSIL_EP_NATIVE, \ + .pkt_mode = 1, \ + .needs_epib = 1, \ + .psd_size = 16, \ + }, \ + } + +/* PSI-L source thread IDs, used for RX (DMA_DEV_TO_MEM) */ +static struct psil_ep am654_src_ep_map[] = { + /* PRU_ICSSG0 */ + PSIL_ETHERNET(0x4100), + PSIL_ETHERNET(0x4101), + PSIL_ETHERNET(0x4102), + PSIL_ETHERNET(0x4103), + /* PRU_ICSSG1 */ + PSIL_ETHERNET(0x4200), + PSIL_ETHERNET(0x4201), + PSIL_ETHERNET(0x4202), + PSIL_ETHERNET(0x4203), + /* PRU_ICSSG2 */ + PSIL_ETHERNET(0x4300), + PSIL_ETHERNET(0x4301), + PSIL_ETHERNET(0x4302), + PSIL_ETHERNET(0x4303), + /* CPSW0 */ + PSIL_ETHERNET(0x7000), +}; + +/* PSI-L destination thread IDs, used for TX (DMA_MEM_TO_DEV) */ +static struct psil_ep am654_dst_ep_map[] = { + /* PRU_ICSSG0 */ + PSIL_ETHERNET(0xc100), + PSIL_ETHERNET(0xc101), + PSIL_ETHERNET(0xc102), + PSIL_ETHERNET(0xc103), + PSIL_ETHERNET(0xc104), + PSIL_ETHERNET(0xc105), + PSIL_ETHERNET(0xc106), + PSIL_ETHERNET(0xc107), + /* PRU_ICSSG1 */ + PSIL_ETHERNET(0xc200), + PSIL_ETHERNET(0xc201), + PSIL_ETHERNET(0xc202), + PSIL_ETHERNET(0xc203), + PSIL_ETHERNET(0xc204), + PSIL_ETHERNET(0xc205), + PSIL_ETHERNET(0xc206), + PSIL_ETHERNET(0xc207), + /* PRU_ICSSG2 */ + PSIL_ETHERNET(0xc300), + PSIL_ETHERNET(0xc301), + PSIL_ETHERNET(0xc302), + PSIL_ETHERNET(0xc303), + PSIL_ETHERNET(0xc304), + PSIL_ETHERNET(0xc305), + PSIL_ETHERNET(0xc306), + PSIL_ETHERNET(0xc307), + /* CPSW0 */ + PSIL_ETHERNET(0xf000), + PSIL_ETHERNET(0xf001), + PSIL_ETHERNET(0xf002), + PSIL_ETHERNET(0xf003), + PSIL_ETHERNET(0xf004), + PSIL_ETHERNET(0xf005), + PSIL_ETHERNET(0xf006), + PSIL_ETHERNET(0xf007), +}; + +struct psil_ep_map am654_ep_map = { + .name = "am654", + .src = am654_src_ep_map, + .src_count = ARRAY_SIZE(am654_src_ep_map), + .dst = am654_dst_ep_map, + .dst_count = ARRAY_SIZE(am654_dst_ep_map), +}; diff --git a/drivers/dma/ti/k3-psil-j721e.c b/drivers/dma/ti/k3-psil-j721e.c new file mode 100644 index 0000000..105ffd9 --- /dev/null +++ b/drivers/dma/ti/k3-psil-j721e.c @@ -0,0 +1,47 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com + * Author: Peter Ujfalusi + */ + +#include + +#include "k3-psil-priv.h" + +#define PSIL_ETHERNET(x) \ + { \ + .thread_id = x, \ + .ep_config = { \ + .ep_type = PSIL_EP_NATIVE, \ + .pkt_mode = 1, \ + .needs_epib = 1, \ + .psd_size = 16, \ + }, \ + } + +/* PSI-L source thread IDs, used for RX (DMA_DEV_TO_MEM) */ +static struct psil_ep j721e_src_ep_map[] = { + /* CPSW0 */ + PSIL_ETHERNET(0x7000), +}; + +/* PSI-L destination thread IDs, used for TX (DMA_MEM_TO_DEV) */ +static struct psil_ep j721e_dst_ep_map[] = { + /* CPSW0 */ + PSIL_ETHERNET(0xf000), + PSIL_ETHERNET(0xf001), + PSIL_ETHERNET(0xf002), + PSIL_ETHERNET(0xf003), + PSIL_ETHERNET(0xf004), + PSIL_ETHERNET(0xf005), + PSIL_ETHERNET(0xf006), + PSIL_ETHERNET(0xf007), +}; + +struct psil_ep_map j721e_ep_map = { + .name = "j721e", + .src = j721e_src_ep_map, + .src_count = ARRAY_SIZE(j721e_src_ep_map), + .dst = j721e_dst_ep_map, + .dst_count = ARRAY_SIZE(j721e_dst_ep_map), +}; diff --git a/drivers/dma/ti/k3-psil-priv.h b/drivers/dma/ti/k3-psil-priv.h new file mode 100644 index 0000000..d3a3832 --- /dev/null +++ b/drivers/dma/ti/k3-psil-priv.h @@ -0,0 +1,43 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com + */ + +#ifndef K3_PSIL_PRIV_H_ +#define K3_PSIL_PRIV_H_ + +#include "k3-psil.h" + +struct psil_ep { + u32 thread_id; + struct psil_endpoint_config ep_config; +}; + +/** + * struct psil_ep_map - PSI-L thread ID configuration maps + * @name: Name of the map, set it to the name of the SoC + * @src: Array of source PSI-L thread configurations + * @src_count: Number of entries in the src array + * @dst: Array of destination PSI-L thread configurations + * @dst_count: Number of entries in the dst array + * + * In case of symmetric configuration for a matching src/dst thread (for example + * 0x4400 and 0xc400) only the src configuration can be present. If no dst + * configuration found the code will look for (dst_thread_id & ~0x8000) to find + * the symmetric match. + */ +struct psil_ep_map { + char *name; + struct psil_ep *src; + int src_count; + struct psil_ep *dst; + int dst_count; +}; + +struct psil_endpoint_config *psil_get_ep_config(u32 thread_id); + +/* SoC PSI-L endpoint maps */ +extern struct psil_ep_map am654_ep_map; +extern struct psil_ep_map j721e_ep_map; + +#endif /* K3_PSIL_PRIV_H_ */ diff --git a/drivers/dma/ti/k3-psil.c b/drivers/dma/ti/k3-psil.c new file mode 100644 index 0000000..b5c92b2 --- /dev/null +++ b/drivers/dma/ti/k3-psil.c @@ -0,0 +1,42 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com + * Author: Peter Ujfalusi + */ + +#include +#include + +#include "k3-psil-priv.h" + +static const struct psil_ep_map *soc_ep_map; + +struct psil_endpoint_config *psil_get_ep_config(u32 thread_id) +{ + int i; + + if (!soc_ep_map) { + if (IS_ENABLED(CONFIG_SOC_K3_AM6)) + soc_ep_map = &am654_ep_map; + else if (IS_ENABLED(CONFIG_SOC_K3_J721E)) + soc_ep_map = &j721e_ep_map; + } + + if (thread_id & K3_PSIL_DST_THREAD_ID_OFFSET && soc_ep_map->dst) { + /* check in destination thread map */ + for (i = 0; i < soc_ep_map->dst_count; i++) { + if (soc_ep_map->dst[i].thread_id == thread_id) + return &soc_ep_map->dst[i].ep_config; + } + } + + thread_id &= ~K3_PSIL_DST_THREAD_ID_OFFSET; + if (soc_ep_map->src) { + for (i = 0; i < soc_ep_map->src_count; i++) { + if (soc_ep_map->src[i].thread_id == thread_id) + return &soc_ep_map->src[i].ep_config; + } + } + + return ERR_PTR(-ENOENT); +} diff --git a/drivers/dma/ti/k3-psil.h b/drivers/dma/ti/k3-psil.h new file mode 100644 index 0000000..53c61b4 --- /dev/null +++ b/drivers/dma/ti/k3-psil.h @@ -0,0 +1,67 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com + */ + +#ifndef K3_PSIL_H_ +#define K3_PSIL_H_ + +#include + +#define K3_PSIL_DST_THREAD_ID_OFFSET 0x8000 + +struct device; + +/** + * enum udma_tp_level - Channel Throughput Levels + * @UDMA_TP_NORMAL: Normal channel + * @UDMA_TP_HIGH: High Throughput channel + * @UDMA_TP_ULTRAHIGH: Ultra High Throughput channel + */ +enum udma_tp_level { + UDMA_TP_NORMAL = 0, + UDMA_TP_HIGH, + UDMA_TP_ULTRAHIGH, + UDMA_TP_LAST, +}; + +/** + * enum psil_endpoint_type - PSI-L Endpoint type + * @PSIL_EP_NATIVE: Normal channel + * @PSIL_EP_PDMA_XY: XY mode PDMA + * @PSIL_EP_PDMA_MCAN: MCAN mode PDMA + * @PSIL_EP_PDMA_AASRC: AASRC mode PDMA + */ +enum psil_endpoint_type { + PSIL_EP_NATIVE = 0, + PSIL_EP_PDMA_XY, + PSIL_EP_PDMA_MCAN, + PSIL_EP_PDMA_AASRC, +}; + +/** + * struct psil_endpoint_config - PSI-L Endpoint configuration + * @ep_type: PSI-L endpoint type + * @pkt_mode: If set, the channel must be in Packet mode, otherwise in + * TR mode + * @notdpkt: TDCM must be suppressed on the TX channel + * @needs_epib: Endpoint needs EPIB + * @psd_size: If set, PSdata is used by the endpoint + * @channel_tpl: Desired throughput level for the channel + * @pdma_acc32: ACC32 must be enabled on the PDMA side + * @pdma_burst: BURST must be enabled on the PDMA side + */ +struct psil_endpoint_config { + enum psil_endpoint_type ep_type; + + unsigned pkt_mode:1; + unsigned notdpkt:1; + unsigned needs_epib:1; + u32 psd_size; + enum udma_tp_level channel_tpl; + + /* PDMA properties, valid for PSIL_EP_PDMA_* */ + unsigned pdma_acc32:1; + unsigned pdma_burst:1; +}; +#endif /* K3_PSIL_H_ */ -- cgit v1.1 From 5c92fffab233457505006da2eae727265f71f316 Mon Sep 17 00:00:00 2001 From: Vignesh Raghavendra Date: Tue, 7 Jul 2020 13:43:34 +0530 Subject: dma: ti: k3-udma: Update driver to use static endpoint Data Update driver to use static PSIL endpoint Data instead of DT. This will allow DT bindings to be in sync with kernel's DT. Note that this patch breaks networking and OSPI boot as driver changes are not backward compatible with existing DT. Subsequent commit will update the DT to make it compatible with updated driver. Signed-off-by: Vignesh Raghavendra Reviewed-by: Grygorii Strashko --- drivers/dma/ti/Kconfig | 1 + drivers/dma/ti/k3-udma.c | 145 +++++++++++++++++++++++++++++++++-------------- 2 files changed, 103 insertions(+), 43 deletions(-) diff --git a/drivers/dma/ti/Kconfig b/drivers/dma/ti/Kconfig index 9d7a1ef..9cbd5f3 100644 --- a/drivers/dma/ti/Kconfig +++ b/drivers/dma/ti/Kconfig @@ -8,6 +8,7 @@ config TI_K3_NAVSS_UDMA select DMA select TI_K3_NAVSS_RINGACC select TI_K3_NAVSS_PSILCFG + select TI_K3_PSIL default n help Support for UDMA used in K3 devices. diff --git a/drivers/dma/ti/k3-udma.c b/drivers/dma/ti/k3-udma.c index 2ce16c8..5fc8692 100644 --- a/drivers/dma/ti/k3-udma.c +++ b/drivers/dma/ti/k3-udma.c @@ -22,7 +22,6 @@ #include #include #include -#include #include #include #include @@ -31,6 +30,7 @@ #include #include "k3-udma-hwdef.h" +#include "k3-psil-priv.h" #if BITS_PER_LONG == 64 #define RINGACC_RING_USE_PROXY (0) @@ -69,6 +69,21 @@ struct udma_rchan { struct k3_nav_ring *r_ring; /* Receive ring*/ }; +#define UDMA_FLAG_PDMA_ACC32 BIT(0) +#define UDMA_FLAG_PDMA_BURST BIT(1) +#define UDMA_FLAG_TDTYPE BIT(2) + +struct udma_match_data { + u32 psil_base; + bool enable_memcpy_support; + u32 flags; + u32 statictr_z_mask; + u32 rchan_oes_offset; + + u8 tpl_levels; + u32 level_start_idx[]; +}; + struct udma_rflow { int id; }; @@ -114,6 +129,8 @@ struct udma_dev { struct udma_rchan *rchans; struct udma_rflow *rflows; + struct udma_match_data *match_data; + struct udma_chan *channels; u32 psil_base; @@ -1293,12 +1310,8 @@ static int udma_probe(struct udevice *dev) if (IS_ERR(ud->ringacc)) return PTR_ERR(ud->ringacc); - ud->psil_base = dev_read_u32_default(dev, "ti,psil-base", 0); - if (!ud->psil_base) { - dev_info(dev, - "Missing ti,psil-base property, using %d.\n", ret); - return -EINVAL; - } + ud->match_data = (void *)dev_get_driver_data(dev); + ud->psil_base = ud->match_data->psil_base; ret = uclass_get_device_by_phandle(UCLASS_FIRMWARE, dev, "ti,sci", &tisci_dev); @@ -1723,8 +1736,7 @@ static int udma_of_xlate(struct dma *dma, struct ofnode_phandle_args *args) { struct udma_dev *ud = dev_get_priv(dma->dev); struct udma_chan *uc = &ud->channels[0]; - ofnode chconf_node, slave_node; - char prop[50]; + struct psil_endpoint_config *ep_config; u32 val; for (val = 0; val < ud->ch_count; val++) { @@ -1736,42 +1748,26 @@ static int udma_of_xlate(struct dma *dma, struct ofnode_phandle_args *args) if (val == ud->ch_count) return -EBUSY; - uc->dir = DMA_DEV_TO_MEM; - if (args->args[2] == UDMA_DIR_TX) + uc->slave_thread_id = args->args[0]; + if (uc->slave_thread_id & K3_PSIL_DST_THREAD_ID_OFFSET) uc->dir = DMA_MEM_TO_DEV; + else + uc->dir = DMA_DEV_TO_MEM; - slave_node = ofnode_get_by_phandle(args->args[0]); - if (!ofnode_valid(slave_node)) { - dev_err(ud->dev, "slave node is missing\n"); - return -EINVAL; - } - - snprintf(prop, sizeof(prop), "ti,psil-config%u", args->args[1]); - chconf_node = ofnode_find_subnode(slave_node, prop); - if (!ofnode_valid(chconf_node)) { - dev_err(ud->dev, "Channel configuration node is missing\n"); - return -EINVAL; - } - - if (!ofnode_read_u32(chconf_node, "linux,udma-mode", &val)) { - if (val == UDMA_PKT_MODE) - uc->pkt_mode = true; + ep_config = psil_get_ep_config(uc->slave_thread_id); + if (IS_ERR(ep_config)) { + dev_err(ud->dev, "No configuration for psi-l thread 0x%04x\n", + uc->slave_thread_id); + uc->dir = DMA_MEM_TO_MEM; + uc->slave_thread_id = -1; + return false; } - if (!ofnode_read_u32(chconf_node, "statictr-type", &val)) - uc->static_tr_type = val; + uc->pkt_mode = ep_config->pkt_mode; - uc->needs_epib = ofnode_read_bool(chconf_node, "ti,needs-epib"); - if (!ofnode_read_u32(chconf_node, "ti,psd-size", &val)) - uc->psd_size = val; - uc->metadata_size = (uc->needs_epib ? 16 : 0) + uc->psd_size; - - if (ofnode_read_u32(slave_node, "ti,psil-base", &val)) { - dev_err(ud->dev, "ti,psil-base is missing\n"); - return -EINVAL; - } - - uc->slave_thread_id = val + args->args[1]; + uc->needs_epib = ep_config->needs_epib; + uc->psd_size = ep_config->psd_size; + uc->metadata_size = (uc->needs_epib ? CPPI5_INFO0_HDESC_EPIB_SIZE : 0) + uc->psd_size; dma->id = uc->id; pr_debug("Allocated dma chn:%lu epib:%d psdata:%u meta:%u thread_id:%x\n", @@ -1859,10 +1855,73 @@ static const struct dma_ops udma_ops = { .get_cfg = udma_get_cfg, }; +static struct udma_match_data am654_main_data = { + .psil_base = 0x1000, + .enable_memcpy_support = true, + .statictr_z_mask = GENMASK(11, 0), + .rchan_oes_offset = 0x200, + .tpl_levels = 2, + .level_start_idx = { + [0] = 8, /* Normal channels */ + [1] = 0, /* High Throughput channels */ + }, +}; + +static struct udma_match_data am654_mcu_data = { + .psil_base = 0x6000, + .enable_memcpy_support = true, + .statictr_z_mask = GENMASK(11, 0), + .rchan_oes_offset = 0x200, + .tpl_levels = 2, + .level_start_idx = { + [0] = 2, /* Normal channels */ + [1] = 0, /* High Throughput channels */ + }, +}; + +static struct udma_match_data j721e_main_data = { + .psil_base = 0x1000, + .enable_memcpy_support = true, + .flags = UDMA_FLAG_PDMA_ACC32 | UDMA_FLAG_PDMA_BURST | UDMA_FLAG_TDTYPE, + .statictr_z_mask = GENMASK(23, 0), + .rchan_oes_offset = 0x400, + .tpl_levels = 3, + .level_start_idx = { + [0] = 16, /* Normal channels */ + [1] = 4, /* High Throughput channels */ + [2] = 0, /* Ultra High Throughput channels */ + }, +}; + +static struct udma_match_data j721e_mcu_data = { + .psil_base = 0x6000, + .enable_memcpy_support = true, + .flags = UDMA_FLAG_PDMA_ACC32 | UDMA_FLAG_PDMA_BURST | UDMA_FLAG_TDTYPE, + .statictr_z_mask = GENMASK(23, 0), + .rchan_oes_offset = 0x400, + .tpl_levels = 2, + .level_start_idx = { + [0] = 2, /* Normal channels */ + [1] = 0, /* High Throughput channels */ + }, +}; + static const struct udevice_id udma_ids[] = { - { .compatible = "ti,k3-navss-udmap" }, - { .compatible = "ti,j721e-navss-mcu-udmap" }, - { } + { + .compatible = "ti,am654-navss-main-udmap", + .data = (ulong)&am654_main_data, + }, + { + .compatible = "ti,am654-navss-mcu-udmap", + .data = (ulong)&am654_mcu_data, + }, { + .compatible = "ti,j721e-navss-main-udmap", + .data = (ulong)&j721e_main_data, + }, { + .compatible = "ti,j721e-navss-mcu-udmap", + .data = (ulong)&j721e_mcu_data, + }, + { /* Sentinel */ }, }; U_BOOT_DRIVER(ti_edma3) = { -- cgit v1.1 From 99faf0df0479f818530d4e995d59917e0c10dafd Mon Sep 17 00:00:00 2001 From: Vignesh Raghavendra Date: Tue, 7 Jul 2020 13:43:35 +0530 Subject: arm: dts: k3-am65/j721e: Sync DMA DT bindings from Kernel DT Sync DT bindings from kernel DT and move them to out of -u-boot.dtsi files. Signed-off-by: Vignesh Raghavendra Reviewed-by: Grygorii Strashko --- arch/arm/dts/k3-am65-mcu.dtsi | 44 ++++++++ arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 121 +++------------------ .../arm/dts/k3-j721e-common-proc-board-u-boot.dtsi | 118 ++------------------ arch/arm/dts/k3-j721e-mcu-wakeup.dtsi | 43 ++++++++ include/dt-bindings/dma/k3-udma.h | 31 ------ 5 files changed, 112 insertions(+), 245 deletions(-) delete mode 100644 include/dt-bindings/dma/k3-udma.h diff --git a/arch/arm/dts/k3-am65-mcu.dtsi b/arch/arm/dts/k3-am65-mcu.dtsi index bc9a872..d1a9fb5 100644 --- a/arch/arm/dts/k3-am65-mcu.dtsi +++ b/arch/arm/dts/k3-am65-mcu.dtsi @@ -102,4 +102,48 @@ #size-cells = <0>; }; }; + + mcu_navss { + compatible = "simple-mfd"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + dma-coherent; + dma-ranges; + + ti,sci-dev-id = <119>; + + mcu_ringacc: ringacc@2b800000 { + compatible = "ti,am654-navss-ringacc"; + reg = <0x0 0x2b800000 0x0 0x400000>, + <0x0 0x2b000000 0x0 0x400000>, + <0x0 0x28590000 0x0 0x100>, + <0x0 0x2a500000 0x0 0x40000>; + reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target"; + ti,num-rings = <286>; + ti,sci-rm-range-gp-rings = <0x2>; /* GP ring range */ + ti,dma-ring-reset-quirk; + ti,sci = <&dmsc>; + ti,sci-dev-id = <195>; + }; + + mcu_udmap: dma-controller@285c0000 { + compatible = "ti,am654-navss-mcu-udmap"; + reg = <0x0 0x285c0000 0x0 0x100>, + <0x0 0x2a800000 0x0 0x40000>, + <0x0 0x2aa00000 0x0 0x40000>; + reg-names = "gcfg", "rchanrt", "tchanrt"; + #dma-cells = <1>; + + ti,sci = <&dmsc>; + ti,sci-dev-id = <194>; + ti,ringacc = <&mcu_ringacc>; + + ti,sci-rm-range-tchan = <0x1>, /* TX_HCHAN */ + <0x2>; /* TX_CHAN */ + ti,sci-rm-range-rchan = <0x3>, /* RX_HCHAN */ + <0x4>; /* RX_CHAN */ + ti,sci-rm-range-rflow = <0x5>; /* GP RFLOW */ + }; + }; }; diff --git a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi index a7e5eb0..1a40fa1 100644 --- a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi +++ b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi @@ -4,7 +4,6 @@ */ #include -#include #include / { @@ -47,51 +46,14 @@ &cbass_mcu { u-boot,dm-spl; - navss_mcu: navss-mcu { - compatible = "simple-bus"; - #address-cells = <2>; - #size-cells = <2>; - ranges; + mcu_navss { u-boot,dm-spl; - ti,sci-dev-id = <119>; - - mcu_ringacc: ringacc@2b800000 { - compatible = "ti,am654-navss-ringacc"; - reg = <0x0 0x2b800000 0x0 0x400000>, - <0x0 0x2b000000 0x0 0x400000>, - <0x0 0x28590000 0x0 0x100>, - <0x0 0x2a500000 0x0 0x40000>; - reg-names = "rt", "fifos", - "proxy_gcfg", "proxy_target"; - ti,num-rings = <286>; - ti,sci-rm-range-gp-rings = <0x2>; /* GP ring range */ - ti,dma-ring-reset-quirk; - ti,sci = <&dmsc>; - ti,sci-dev-id = <195>; + ringacc@2b800000 { u-boot,dm-spl; }; - mcu_udmap: udmap@285c0000 { - compatible = "ti,k3-navss-udmap"; - reg = <0x0 0x285c0000 0x0 0x100>, - <0x0 0x2a800000 0x0 0x40000>, - <0x0 0x2aa00000 0x0 0x40000>; - reg-names = "gcfg", "rchanrt", "tchanrt"; - #dma-cells = <3>; - - ti,ringacc = <&mcu_ringacc>; - ti,psil-base = <0x6000>; - - ti,sci = <&dmsc>; - ti,sci-dev-id = <194>; - - ti,sci-rm-range-tchan = <0x1>, /* TX_HCHAN */ - <0x2>; /* TX_CHAN */ - ti,sci-rm-range-rchan = <0x3>, /* RX_HCHAN */ - <0x4>; /* RX_CHAN */ - ti,sci-rm-range-rflow = <0x5>; /* GP RFLOW */ - dma-coherent; + dma-controller@285c0000 { u-boot,dm-spl; }; }; @@ -112,17 +74,16 @@ clocks = <&k3_clks 5 10>; clock-names = "fck"; power-domains = <&k3_pds 5 TI_SCI_PD_EXCLUSIVE>; - ti,psil-base = <0x7000>; - - dmas = <&mcu_udmap &mcu_cpsw 0 UDMA_DIR_TX>, - <&mcu_udmap &mcu_cpsw 1 UDMA_DIR_TX>, - <&mcu_udmap &mcu_cpsw 2 UDMA_DIR_TX>, - <&mcu_udmap &mcu_cpsw 3 UDMA_DIR_TX>, - <&mcu_udmap &mcu_cpsw 4 UDMA_DIR_TX>, - <&mcu_udmap &mcu_cpsw 5 UDMA_DIR_TX>, - <&mcu_udmap &mcu_cpsw 6 UDMA_DIR_TX>, - <&mcu_udmap &mcu_cpsw 7 UDMA_DIR_TX>, - <&mcu_udmap &mcu_cpsw 0 UDMA_DIR_RX>; + + dmas = <&mcu_udmap 0xf000>, + <&mcu_udmap 0xf001>, + <&mcu_udmap 0xf002>, + <&mcu_udmap 0xf003>, + <&mcu_udmap 0xf004>, + <&mcu_udmap 0xf005>, + <&mcu_udmap 0xf006>, + <&mcu_udmap 0xf007>, + <&mcu_udmap 0x7000>; dma-names = "tx0", "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7", "rx"; @@ -148,62 +109,6 @@ #size-cells = <0>; bus_freq = <1000000>; }; - - ti,psil-config0 { - linux,udma-mode = ; - statictr-type = ; - ti,needs-epib; - ti,psd-size = <16>; - }; - - ti,psil-config1 { - linux,udma-mode = ; - statictr-type = ; - ti,needs-epib; - ti,psd-size = <16>; - }; - - ti,psil-config2 { - linux,udma-mode = ; - statictr-type = ; - ti,needs-epib; - ti,psd-size = <16>; - }; - - ti,psil-config3 { - linux,udma-mode = ; - statictr-type = ; - ti,needs-epib; - ti,psd-size = <16>; - }; - - ti,psil-config4 { - linux,udma-mode = ; - statictr-type = ; - ti,needs-epib; - ti,psd-size = <16>; - }; - - ti,psil-config5 { - linux,udma-mode = ; - statictr-type = ; - ti,needs-epib; - ti,psd-size = <16>; - }; - - ti,psil-config6 { - linux,udma-mode = ; - statictr-type = ; - ti,needs-epib; - ti,psd-size = <16>; - }; - - ti,psil-config7 { - linux,udma-mode = ; - statictr-type = ; - ti,needs-epib; - ti,psd-size = <16>; - }; }; }; diff --git a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi index 7b01e42..6273133 100644 --- a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi +++ b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi @@ -3,7 +3,6 @@ * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ */ -#include #include / { @@ -46,50 +45,14 @@ }; }; - cbass_mcu_navss: mcu_navss { - compatible = "simple-bus"; - #address-cells = <2>; - #size-cells = <2>; - dma-coherent; - dma-ranges; - ranges; - - ti,sci-dev-id = <232>; + mcu_navss { u-boot,dm-spl; - mcu_ringacc: ringacc@2b800000 { - compatible = "ti,am654-navss-ringacc"; - reg = <0x0 0x2b800000 0x0 0x400000>, - <0x0 0x2b000000 0x0 0x400000>, - <0x0 0x28590000 0x0 0x100>, - <0x0 0x2a500000 0x0 0x40000>; - reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target"; - ti,num-rings = <286>; - ti,sci-rm-range-gp-rings = <0x1>; /* GP ring range */ - ti,sci = <&dmsc>; - ti,sci-dev-id = <235>; + ringacc@2b800000 { u-boot,dm-spl; }; - mcu_udmap: udmap@31150000 { - compatible = "ti,j721e-navss-mcu-udmap"; - reg = <0x0 0x285c0000 0x0 0x100>, - <0x0 0x2a800000 0x0 0x40000>, - <0x0 0x2aa00000 0x0 0x40000>; - reg-names = "gcfg", "rchanrt", "tchanrt"; - #dma-cells = <3>; - - ti,ringacc = <&mcu_ringacc>; - ti,psil-base = <0x6000>; - - ti,sci = <&dmsc>; - ti,sci-dev-id = <236>; - - ti,sci-rm-range-tchan = <0x0d>, /* TX_CHAN */ - <0x0f>; /* TX_HCHAN */ - ti,sci-rm-range-rchan = <0x0a>, /* RX_CHAN */ - <0x0b>; /* RX_HCHAN */ - ti,sci-rm-range-rflow = <0x00>; /* GP RFLOW */ + dma-controller@285c0000 { u-boot,dm-spl; }; }; @@ -105,18 +68,17 @@ clocks = <&k3_clks 18 22>; clock-names = "fck"; power-domains = <&k3_pds 18 TI_SCI_PD_EXCLUSIVE>; - ti,psil-base = <0x7000>; cpsw-phy-sel = <&phy_sel>; - dmas = <&mcu_udmap &mcu_cpsw 0 UDMA_DIR_TX>, - <&mcu_udmap &mcu_cpsw 1 UDMA_DIR_TX>, - <&mcu_udmap &mcu_cpsw 2 UDMA_DIR_TX>, - <&mcu_udmap &mcu_cpsw 3 UDMA_DIR_TX>, - <&mcu_udmap &mcu_cpsw 4 UDMA_DIR_TX>, - <&mcu_udmap &mcu_cpsw 5 UDMA_DIR_TX>, - <&mcu_udmap &mcu_cpsw 6 UDMA_DIR_TX>, - <&mcu_udmap &mcu_cpsw 7 UDMA_DIR_TX>, - <&mcu_udmap &mcu_cpsw 0 UDMA_DIR_RX>; + dmas = <&mcu_udmap 0xf000>, + <&mcu_udmap 0xf001>, + <&mcu_udmap 0xf002>, + <&mcu_udmap 0xf003>, + <&mcu_udmap 0xf004>, + <&mcu_udmap 0xf005>, + <&mcu_udmap 0xf006>, + <&mcu_udmap 0xf007>, + <&mcu_udmap 0x7000>; dma-names = "tx0", "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7", "rx"; @@ -152,62 +114,6 @@ ti,cpts-ext-ts-inputs = <4>; ti,cpts-periodic-outputs = <2>; }; - - ti,psil-config0 { - linux,udma-mode = ; - statictr-type = ; - ti,needs-epib; - ti,psd-size = <16>; - }; - - ti,psil-config1 { - linux,udma-mode = ; - statictr-type = ; - ti,needs-epib; - ti,psd-size = <16>; - }; - - ti,psil-config2 { - linux,udma-mode = ; - statictr-type = ; - ti,needs-epib; - ti,psd-size = <16>; - }; - - ti,psil-config3 { - linux,udma-mode = ; - statictr-type = ; - ti,needs-epib; - ti,psd-size = <16>; - }; - - ti,psil-config4 { - linux,udma-mode = ; - statictr-type = ; - ti,needs-epib; - ti,psd-size = <16>; - }; - - ti,psil-config5 { - linux,udma-mode = ; - statictr-type = ; - ti,needs-epib; - ti,psd-size = <16>; - }; - - ti,psil-config6 { - linux,udma-mode = ; - statictr-type = ; - ti,needs-epib; - ti,psd-size = <16>; - }; - - ti,psil-config7 { - linux,udma-mode = ; - statictr-type = ; - ti,needs-epib; - ti,psd-size = <16>; - }; }; }; diff --git a/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi b/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi index 2eed50a..70d5bca 100644 --- a/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi +++ b/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi @@ -199,4 +199,47 @@ clocks = <&k3_clks 195 0>; power-domains = <&k3_pds 195 TI_SCI_PD_EXCLUSIVE>; }; + + mcu_navss { + compatible = "simple-mfd"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + dma-coherent; + dma-ranges; + + ti,sci-dev-id = <232>; + + mcu_ringacc: ringacc@2b800000 { + compatible = "ti,am654-navss-ringacc"; + reg = <0x0 0x2b800000 0x0 0x400000>, + <0x0 0x2b000000 0x0 0x400000>, + <0x0 0x28590000 0x0 0x100>, + <0x0 0x2a500000 0x0 0x40000>; + reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target"; + ti,num-rings = <286>; + ti,sci-rm-range-gp-rings = <0x1>; /* GP ring range */ + ti,sci = <&dmsc>; + ti,sci-dev-id = <235>; + }; + + mcu_udmap: dma-controller@285c0000 { + compatible = "ti,j721e-navss-mcu-udmap"; + reg = <0x0 0x285c0000 0x0 0x100>, + <0x0 0x2a800000 0x0 0x40000>, + <0x0 0x2aa00000 0x0 0x40000>; + reg-names = "gcfg", "rchanrt", "tchanrt"; + #dma-cells = <1>; + + ti,sci = <&dmsc>; + ti,sci-dev-id = <236>; + ti,ringacc = <&mcu_ringacc>; + + ti,sci-rm-range-tchan = <0x0d>, /* TX_CHAN */ + <0x0f>; /* TX_HCHAN */ + ti,sci-rm-range-rchan = <0x0a>, /* RX_CHAN */ + <0x0b>; /* RX_HCHAN */ + ti,sci-rm-range-rflow = <0x00>; /* GP RFLOW */ + }; + }; }; diff --git a/include/dt-bindings/dma/k3-udma.h b/include/dt-bindings/dma/k3-udma.h deleted file mode 100644 index 670e123..0000000 --- a/include/dt-bindings/dma/k3-udma.h +++ /dev/null @@ -1,31 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com - */ - -#ifndef __DT_TI_UDMA_H -#define __DT_TI_UDMA_H - -#define UDMA_TR_MODE 0 -#define UDMA_PKT_MODE 1 - -#define UDMA_DIR_TX 0 -#define UDMA_DIR_RX 1 - -#define PSIL_STATIC_TR_NONE 0 -#define PSIL_STATIC_TR_XY 1 -#define PSIL_STATIC_TR_MCAN 2 - -#define UDMA_PDMA_TR_XY(id) \ - ti,psil-config##id { \ - linux,udma-mode = ; \ - statictr-type = ; \ - } - -#define UDMA_PDMA_PKT_XY(id) \ - ti,psil-config##id { \ - linux,udma-mode = ; \ - statictr-type = ; \ - } - -#endif /* __DT_TI_UDMA_H */ -- cgit v1.1 From db08a1df430d5a4f87cc72901b7581b86eb89742 Mon Sep 17 00:00:00 2001 From: Vignesh Raghavendra Date: Mon, 6 Jul 2020 13:26:22 +0530 Subject: soc: ti: k3-ringacc: Move state tracking variables under a struct Move the free, occ, windex and rinfex under a struct. We can use memset to zero them and it will allow a cleaner way to extend the variables for duplex rings. Signed-off-by: Vignesh Raghavendra --- drivers/soc/ti/k3-navss-ringacc.c | 89 ++++++++++++++++++++------------------- 1 file changed, 46 insertions(+), 43 deletions(-) diff --git a/drivers/soc/ti/k3-navss-ringacc.c b/drivers/soc/ti/k3-navss-ringacc.c index ecc4b8b..f31ffaf 100644 --- a/drivers/soc/ti/k3-navss-ringacc.c +++ b/drivers/soc/ti/k3-navss-ringacc.c @@ -127,6 +127,22 @@ struct k3_nav_ring_ops { }; /** + * struct k3_nav_ring_state - Internal state tracking structure + * + * @free: Number of free entries + * @occ: Occupancy + * @windex: Write index + * @rindex: Read index + */ +struct k3_nav_ring_state { + u32 free; + u32 occ; + u32 windex; + u32 rindex; + u32 tdown_complete:1; +}; + +/** * struct k3_nav_ring - RA Ring descriptor * * @rt - Ring control/status registers @@ -139,10 +155,6 @@ struct k3_nav_ring_ops { * @elm_size - Size of the ring element * @mode - Ring mode * @flags - flags - * @free - Number of free elements - * @occ - Ring occupancy - * @windex - Write index (only for @K3_NAV_RINGACC_RING_MODE_RING) - * @rindex - Read index (only for @K3_NAV_RINGACC_RING_MODE_RING) * @ring_id - Ring Id * @parent - Pointer on struct @k3_nav_ringacc * @use_count - Use count for shared rings @@ -161,10 +173,7 @@ struct k3_nav_ring { u32 flags; #define KNAV_RING_FLAG_BUSY BIT(1) #define K3_NAV_RING_FLAG_SHARED BIT(2) - u32 free; - u32 occ; - u32 windex; - u32 rindex; + struct k3_nav_ring_state state; u32 ring_id; struct k3_nav_ringacc *parent; u32 use_count; @@ -338,10 +347,7 @@ void k3_nav_ringacc_ring_reset(struct k3_nav_ring *ring) if (!ring || !(ring->flags & KNAV_RING_FLAG_BUSY)) return; - ring->occ = 0; - ring->free = 0; - ring->rindex = 0; - ring->windex = 0; + memset(&ring->state, 0, sizeof(ring->state)); k3_ringacc_ring_reset_sci(ring); } @@ -546,10 +552,7 @@ int k3_nav_ringacc_ring_cfg(struct k3_nav_ring *ring, ring->size = cfg->size; ring->elm_size = cfg->elm_size; ring->mode = cfg->mode; - ring->occ = 0; - ring->free = 0; - ring->rindex = 0; - ring->windex = 0; + memset(&ring->state, 0, sizeof(ring->state)); if (ring->proxy_id != K3_RINGACC_PROXY_NOT_USED) ring->proxy = ringacc->proxy_target_base + @@ -625,10 +628,10 @@ u32 k3_nav_ringacc_ring_get_free(struct k3_nav_ring *ring) if (!ring || !(ring->flags & KNAV_RING_FLAG_BUSY)) return -EINVAL; - if (!ring->free) - ring->free = ring->size - ringacc_readl(&ring->rt->occ); + if (!ring->state.free) + ring->state.free = ring->size - ringacc_readl(&ring->rt->occ); - return ring->free; + return ring->state.free; } u32 k3_nav_ringacc_ring_get_occ(struct k3_nav_ring *ring) @@ -694,21 +697,21 @@ static int k3_nav_ringacc_ring_access_proxy( pr_debug("proxy:memcpy_fromio(x): --> ptr(%p), mode:%d\n", ptr, access_mode); memcpy_fromio(elem, ptr, (4 << ring->elm_size)); - ring->occ--; + ring->state.occ--; break; case K3_RINGACC_ACCESS_MODE_PUSH_TAIL: case K3_RINGACC_ACCESS_MODE_PUSH_HEAD: pr_debug("proxy:memcpy_toio(x): --> ptr(%p), mode:%d\n", ptr, access_mode); memcpy_toio(ptr, elem, (4 << ring->elm_size)); - ring->free--; + ring->state.free--; break; default: return -EINVAL; } pr_debug("proxy: free%d occ%d\n", - ring->free, ring->occ); + ring->state.free, ring->state.occ); return 0; } @@ -763,21 +766,21 @@ static int k3_nav_ringacc_ring_access_io( pr_debug("memcpy_fromio(x): --> ptr(%p), mode:%d\n", ptr, access_mode); memcpy_fromio(elem, ptr, (4 << ring->elm_size)); - ring->occ--; + ring->state.occ--; break; case K3_RINGACC_ACCESS_MODE_PUSH_TAIL: case K3_RINGACC_ACCESS_MODE_PUSH_HEAD: pr_debug("memcpy_toio(x): --> ptr(%p), mode:%d\n", ptr, access_mode); memcpy_toio(ptr, elem, (4 << ring->elm_size)); - ring->free--; + ring->state.free--; break; default: return -EINVAL; } pr_debug("free%d index%d occ%d index%d\n", - ring->free, ring->windex, ring->occ, ring->rindex); + ring->state.free, ring->state.windex, ring->state.occ, ring->state.rindex); return 0; } @@ -810,7 +813,7 @@ static int k3_nav_ringacc_ring_push_mem(struct k3_nav_ring *ring, void *elem) { void *elem_ptr; - elem_ptr = k3_nav_ringacc_get_elm_addr(ring, ring->windex); + elem_ptr = k3_nav_ringacc_get_elm_addr(ring, ring->state.windex); memcpy(elem_ptr, elem, (4 << ring->elm_size)); @@ -819,12 +822,12 @@ static int k3_nav_ringacc_ring_push_mem(struct k3_nav_ring *ring, void *elem) ring->size * (4 << ring->elm_size), ARCH_DMA_MINALIGN)); - ring->windex = (ring->windex + 1) % ring->size; - ring->free--; + ring->state.windex = (ring->state.windex + 1) % ring->size; + ring->state.free--; ringacc_writel(1, &ring->rt->db); pr_debug("ring_push_mem: free%d index%d\n", - ring->free, ring->windex); + ring->state.free, ring->state.windex); return 0; } @@ -833,7 +836,7 @@ static int k3_nav_ringacc_ring_pop_mem(struct k3_nav_ring *ring, void *elem) { void *elem_ptr; - elem_ptr = k3_nav_ringacc_get_elm_addr(ring, ring->rindex); + elem_ptr = k3_nav_ringacc_get_elm_addr(ring, ring->state.rindex); invalidate_dcache_range((unsigned long)ring->ring_mem_virt, ALIGN((unsigned long)ring->ring_mem_virt + @@ -842,12 +845,12 @@ static int k3_nav_ringacc_ring_pop_mem(struct k3_nav_ring *ring, void *elem) memcpy(elem, elem_ptr, (4 << ring->elm_size)); - ring->rindex = (ring->rindex + 1) % ring->size; - ring->occ--; + ring->state.rindex = (ring->state.rindex + 1) % ring->size; + ring->state.occ--; ringacc_writel(-1, &ring->rt->db); pr_debug("ring_pop_mem: occ%d index%d pos_ptr%p\n", - ring->occ, ring->rindex, elem_ptr); + ring->state.occ, ring->state.rindex, elem_ptr); return 0; } @@ -859,7 +862,7 @@ int k3_nav_ringacc_ring_push(struct k3_nav_ring *ring, void *elem) return -EINVAL; pr_debug("ring_push%d: free%d index%d\n", - ring->ring_id, ring->free, ring->windex); + ring->ring_id, ring->state.free, ring->state.windex); if (k3_nav_ringacc_ring_is_full(ring)) return -ENOMEM; @@ -878,7 +881,7 @@ int k3_nav_ringacc_ring_push_head(struct k3_nav_ring *ring, void *elem) return -EINVAL; pr_debug("ring_push_head: free%d index%d\n", - ring->free, ring->windex); + ring->state.free, ring->state.windex); if (k3_nav_ringacc_ring_is_full(ring)) return -ENOMEM; @@ -896,13 +899,13 @@ int k3_nav_ringacc_ring_pop(struct k3_nav_ring *ring, void *elem) if (!ring || !(ring->flags & KNAV_RING_FLAG_BUSY)) return -EINVAL; - if (!ring->occ) - ring->occ = k3_nav_ringacc_ring_get_occ(ring); + if (!ring->state.occ) + ring->state.occ = k3_nav_ringacc_ring_get_occ(ring); pr_debug("ring_pop%d: occ%d index%d\n", - ring->ring_id, ring->occ, ring->rindex); + ring->ring_id, ring->state.occ, ring->state.rindex); - if (!ring->occ) + if (!ring->state.occ && !ring->state.tdown_complete) return -ENODATA; if (ring->ops && ring->ops->pop_head) @@ -918,13 +921,13 @@ int k3_nav_ringacc_ring_pop_tail(struct k3_nav_ring *ring, void *elem) if (!ring || !(ring->flags & KNAV_RING_FLAG_BUSY)) return -EINVAL; - if (!ring->occ) - ring->occ = k3_nav_ringacc_ring_get_occ(ring); + if (!ring->state.occ) + ring->state.occ = k3_nav_ringacc_ring_get_occ(ring); pr_debug("ring_pop_tail: occ%d index%d\n", - ring->occ, ring->rindex); + ring->state.occ, ring->state.rindex); - if (!ring->occ) + if (!ring->state.occ) return -ENODATA; if (ring->ops && ring->ops->pop_tail) -- cgit v1.1 From 5d257849987fbeab96bf8cd953cab7c825a9b359 Mon Sep 17 00:00:00 2001 From: Vignesh Raghavendra Date: Mon, 6 Jul 2020 13:26:23 +0530 Subject: soc: ti: k3-ringacc: Add an API to request pair of rings Add new API k3_ringacc_request_rings_pair() to request pair of rings at once, as in the most case Rings are used with DMA channels which required to request pair of rings - one to feed DMA with descriptors (TX/RX FDQ) and one to receive completions (RX/TX CQ). This will allow to simplify Ringacc API users. Signed-off-by: Vignesh Raghavendra --- drivers/soc/ti/k3-navss-ringacc.c | 23 +++++++++++++++++++++++ include/linux/soc/ti/k3-navss-ringacc.h | 4 ++++ 2 files changed, 27 insertions(+) diff --git a/drivers/soc/ti/k3-navss-ringacc.c b/drivers/soc/ti/k3-navss-ringacc.c index f31ffaf..81de75a 100644 --- a/drivers/soc/ti/k3-navss-ringacc.c +++ b/drivers/soc/ti/k3-navss-ringacc.c @@ -321,6 +321,29 @@ error: return NULL; } +int k3_nav_ringacc_request_rings_pair(struct k3_nav_ringacc *ringacc, + int fwd_id, int compl_id, + struct k3_nav_ring **fwd_ring, + struct k3_nav_ring **compl_ring) +{ + int ret = 0; + + if (!fwd_ring || !compl_ring) + return -EINVAL; + + *fwd_ring = k3_nav_ringacc_request_ring(ringacc, fwd_id, 0); + if (!(*fwd_ring)) + return -ENODEV; + + *compl_ring = k3_nav_ringacc_request_ring(ringacc, compl_id, 0); + if (!(*compl_ring)) { + k3_nav_ringacc_ring_free(*fwd_ring); + ret = -ENODEV; + } + + return ret; +} + static void k3_ringacc_ring_reset_sci(struct k3_nav_ring *ring) { struct k3_nav_ringacc *ringacc = ring->parent; diff --git a/include/linux/soc/ti/k3-navss-ringacc.h b/include/linux/soc/ti/k3-navss-ringacc.h index 7b027f8..9176277 100644 --- a/include/linux/soc/ti/k3-navss-ringacc.h +++ b/include/linux/soc/ti/k3-navss-ringacc.h @@ -100,6 +100,10 @@ struct k3_nav_ring_cfg { struct k3_nav_ring *k3_nav_ringacc_request_ring(struct k3_nav_ringacc *ringacc, int id, u32 flags); +int k3_nav_ringacc_request_rings_pair(struct k3_nav_ringacc *ringacc, + int fwd_id, int compl_id, + struct k3_nav_ring **fwd_ring, + struct k3_nav_ring **compl_ring); /** * k3_nav_ringacc_get_dev - get pointer on RA device * @ringacc: pointer on RA -- cgit v1.1 From b3f95997cefbfd53dcb02df95dcb03462430bcb6 Mon Sep 17 00:00:00 2001 From: Vignesh Raghavendra Date: Mon, 6 Jul 2020 13:26:24 +0530 Subject: soc: ti: k3-ringacc: Separate soc specific initialization In preparation of adding more K3 SoCs, separate soc specific initialization add a SoC specific initialization hook. Signed-off-by: Vignesh Raghavendra --- drivers/soc/ti/k3-navss-ringacc.c | 49 ++++++++++++++++++++++++++++++++------- 1 file changed, 40 insertions(+), 9 deletions(-) diff --git a/drivers/soc/ti/k3-navss-ringacc.c b/drivers/soc/ti/k3-navss-ringacc.c index 81de75a..c48e9be 100644 --- a/drivers/soc/ti/k3-navss-ringacc.c +++ b/drivers/soc/ti/k3-navss-ringacc.c @@ -180,6 +180,10 @@ struct k3_nav_ring { int proxy_id; }; +struct k3_nav_ringacc_ops { + int (*init)(struct udevice *dev, struct k3_nav_ringacc *ringacc); +}; + /** * struct k3_nav_ringacc - Rings accelerator descriptor * @@ -195,6 +199,7 @@ struct k3_nav_ring { * @tisci - pointer ti-sci handle * @tisci_ring_ops - ti-sci rings ops * @tisci_dev_id - ti-sci device id + * @ops: SoC specific ringacc operation */ struct k3_nav_ringacc { struct udevice *dev; @@ -213,6 +218,8 @@ struct k3_nav_ringacc { const struct ti_sci_handle *tisci; const struct ti_sci_rm_ringacc_ops *tisci_ring_ops; u32 tisci_dev_id; + + const struct k3_nav_ringacc_ops *ops; }; static long k3_nav_ringacc_ring_get_fifo_pos(struct k3_nav_ring *ring) @@ -1008,18 +1015,11 @@ static int k3_nav_ringacc_probe_dt(struct k3_nav_ringacc *ringacc) return 0; } -static int k3_nav_ringacc_probe(struct udevice *dev) +static int k3_nav_ringacc_init(struct udevice *dev, struct k3_nav_ringacc *ringacc) { - struct k3_nav_ringacc *ringacc; void __iomem *base_fifo, *base_rt; int ret, i; - ringacc = dev_get_priv(dev); - if (!ringacc) - return -ENOMEM; - - ringacc->dev = dev; - ret = k3_nav_ringacc_probe_dt(ringacc); if (ret) return ret; @@ -1089,11 +1089,42 @@ static int k3_nav_ringacc_probe(struct udevice *dev) return 0; } +struct ringacc_match_data { + struct k3_nav_ringacc_ops ops; +}; + +static struct ringacc_match_data k3_nav_ringacc_data = { + .ops = { + .init = k3_nav_ringacc_init, + }, +}; + static const struct udevice_id knav_ringacc_ids[] = { - { .compatible = "ti,am654-navss-ringacc" }, + { .compatible = "ti,am654-navss-ringacc", .data = (ulong)&k3_nav_ringacc_data, }, {}, }; +static int k3_nav_ringacc_probe(struct udevice *dev) +{ + struct k3_nav_ringacc *ringacc; + int ret; + const struct ringacc_match_data *match_data; + + match_data = (struct ringacc_match_data *)dev_get_driver_data(dev); + + ringacc = dev_get_priv(dev); + if (!ringacc) + return -ENOMEM; + + ringacc->dev = dev; + ringacc->ops = &match_data->ops; + ret = ringacc->ops->init(dev, ringacc); + if (ret) + return ret; + + return 0; +} + U_BOOT_DRIVER(k3_navss_ringacc) = { .name = "k3-navss-ringacc", .id = UCLASS_MISC, -- cgit v1.1 From af374c24d94b96e524fe7184d24f223bf7dc2677 Mon Sep 17 00:00:00 2001 From: Vignesh Raghavendra Date: Mon, 6 Jul 2020 13:26:25 +0530 Subject: dma: ti: k3-udma: Introduce udma_chan_config struct Encapsulate channel configuration in a separate struct so as to ease resetting of these fields with memset() and also to increase readability of the code. Signed-off-by: Vignesh Raghavendra --- drivers/dma/ti/k3-udma.c | 197 ++++++++++++++++++++++++++--------------------- 1 file changed, 108 insertions(+), 89 deletions(-) diff --git a/drivers/dma/ti/k3-udma.c b/drivers/dma/ti/k3-udma.c index 5fc8692..375e904 100644 --- a/drivers/dma/ti/k3-udma.c +++ b/drivers/dma/ti/k3-udma.c @@ -137,6 +137,26 @@ struct udma_dev { u32 ch_count; }; +struct udma_chan_config { + u32 psd_size; /* size of Protocol Specific Data */ + u32 metadata_size; /* (needs_epib ? 16:0) + psd_size */ + u32 hdesc_size; /* Size of a packet descriptor in packet mode */ + int remote_thread_id; + u32 atype; + u32 src_thread; + u32 dst_thread; + enum psil_endpoint_type ep_type; + enum udma_tp_level channel_tpl; /* Channel Throughput Level */ + + enum dma_direction dir; + + unsigned int pkt_mode:1; /* TR or packet */ + unsigned int needs_epib:1; /* EPIB is needed for the communication or not */ + unsigned int enable_acc32:1; + unsigned int enable_burst:1; + unsigned int notdpkt:1; /* Suppress sending TDC packet */ +}; + struct udma_chan { struct udma_dev *ud; char name[20]; @@ -149,20 +169,11 @@ struct udma_chan { u32 bcnt; /* number of bytes completed since the start of the channel */ - bool pkt_mode; /* TR or packet */ - bool needs_epib; /* EPIB is needed for the communication or not */ - u32 psd_size; /* size of Protocol Specific Data */ - u32 metadata_size; /* (needs_epib ? 16:0) + psd_size */ - int slave_thread_id; - u32 src_thread; - u32 dst_thread; - u32 static_tr_type; + struct udma_chan_config config; u32 id; - enum dma_direction dir; struct cppi5_host_desc_t *desc_tx; - u32 hdesc_size; bool in_use; void *desc_rx; u32 num_rx_bufs; @@ -288,7 +299,7 @@ static inline bool udma_is_chan_running(struct udma_chan *uc) u32 trt_ctl = 0; u32 rrt_ctl = 0; - switch (uc->dir) { + switch (uc->config.dir) { case DMA_DEV_TO_MEM: rrt_ctl = udma_rchanrt_read(uc->rchan, UDMA_RCHAN_RT_CTL_REG); pr_debug("%s: rrt_ctl: 0x%08x (peer: 0x%08x)\n", @@ -322,7 +333,7 @@ static int udma_pop_from_ring(struct udma_chan *uc, dma_addr_t *addr) struct k3_nav_ring *ring = NULL; int ret = -ENOENT; - switch (uc->dir) { + switch (uc->config.dir) { case DMA_DEV_TO_MEM: ring = uc->rchan->r_ring; break; @@ -347,7 +358,7 @@ static void udma_reset_rings(struct udma_chan *uc) struct k3_nav_ring *ring1 = NULL; struct k3_nav_ring *ring2 = NULL; - switch (uc->dir) { + switch (uc->config.dir) { case DMA_DEV_TO_MEM: ring1 = uc->rchan->fd_ring; ring2 = uc->rchan->r_ring; @@ -409,7 +420,7 @@ static inline int udma_stop_hard(struct udma_chan *uc) { pr_debug("%s: ENTER (chan%d)\n", __func__, uc->id); - switch (uc->dir) { + switch (uc->config.dir) { case DMA_DEV_TO_MEM: udma_rchanrt_write(uc->rchan, UDMA_RCHAN_RT_PEER_RT_EN_REG, 0); udma_rchanrt_write(uc->rchan, UDMA_RCHAN_RT_CTL_REG, 0); @@ -435,9 +446,8 @@ static int udma_start(struct udma_chan *uc) if (udma_is_chan_running(uc)) goto out; - pr_debug("%s: chan:%d dir:%s (static_tr_type: %d)\n", - __func__, uc->id, udma_get_dir_text(uc->dir), - uc->static_tr_type); + pr_debug("%s: chan:%d dir:%s\n", + __func__, uc->id, udma_get_dir_text(uc->config.dir)); /* Make sure that we clear the teardown bit, if it is set */ udma_stop_hard(uc); @@ -445,7 +455,7 @@ static int udma_start(struct udma_chan *uc) /* Reset all counters */ udma_reset_counters(uc); - switch (uc->dir) { + switch (uc->config.dir) { case DMA_DEV_TO_MEM: udma_rchanrt_write(uc->rchan, UDMA_RCHAN_RT_CTL_REG, UDMA_CHAN_RT_CTL_EN); @@ -547,10 +557,10 @@ static inline void udma_stop_dev2mem(struct udma_chan *uc, bool sync) static inline int udma_stop(struct udma_chan *uc) { pr_debug("%s: chan:%d dir:%s\n", - __func__, uc->id, udma_get_dir_text(uc->dir)); + __func__, uc->id, udma_get_dir_text(uc->config.dir)); udma_reset_counters(uc); - switch (uc->dir) { + switch (uc->config.dir) { case DMA_DEV_TO_MEM: udma_stop_dev2mem(uc, true); break; @@ -851,7 +861,7 @@ static int udma_alloc_rx_resources(struct udma_chan *uc) return ret; /* For MEM_TO_MEM we don't need rflow or rings */ - if (uc->dir == DMA_MEM_TO_MEM) + if (uc->config.dir == DMA_MEM_TO_MEM) return 0; ret = udma_get_rflow(uc, uc->rchan->id); @@ -913,7 +923,7 @@ static int udma_alloc_tchan_sci_req(struct udma_chan *uc) u32 mode; int ret; - if (uc->pkt_mode) + if (uc->config.pkt_mode) mode = TI_SCI_RM_UDMAP_CHAN_TYPE_PKT_PBRR; else mode = TI_SCI_RM_UDMAP_CHAN_TYPE_3RDP_BCOPY_PBRR; @@ -924,11 +934,11 @@ static int udma_alloc_tchan_sci_req(struct udma_chan *uc) req.nav_id = tisci_rm->tisci_dev_id; req.index = uc->tchan->id; req.tx_chan_type = mode; - if (uc->dir == DMA_MEM_TO_MEM) + if (uc->config.dir == DMA_MEM_TO_MEM) req.tx_fetch_size = sizeof(struct cppi5_desc_hdr_t) >> 2; else - req.tx_fetch_size = cppi5_hdesc_calc_size(uc->needs_epib, - uc->psd_size, + req.tx_fetch_size = cppi5_hdesc_calc_size(uc->config.needs_epib, + uc->config.psd_size, 0) >> 2; req.txcq_qnum = tc_ring; @@ -951,7 +961,7 @@ static int udma_alloc_rchan_sci_req(struct udma_chan *uc) u32 mode; int ret; - if (uc->pkt_mode) + if (uc->config.pkt_mode) mode = TI_SCI_RM_UDMAP_CHAN_TYPE_PKT_PBRR; else mode = TI_SCI_RM_UDMAP_CHAN_TYPE_3RDP_BCOPY_PBRR; @@ -964,16 +974,16 @@ static int udma_alloc_rchan_sci_req(struct udma_chan *uc) req.nav_id = tisci_rm->tisci_dev_id; req.index = uc->rchan->id; req.rx_chan_type = mode; - if (uc->dir == DMA_MEM_TO_MEM) { + if (uc->config.dir == DMA_MEM_TO_MEM) { req.rx_fetch_size = sizeof(struct cppi5_desc_hdr_t) >> 2; req.rxcq_qnum = tc_ring; } else { - req.rx_fetch_size = cppi5_hdesc_calc_size(uc->needs_epib, - uc->psd_size, + req.rx_fetch_size = cppi5_hdesc_calc_size(uc->config.needs_epib, + uc->config.psd_size, 0) >> 2; req.rxcq_qnum = rx_ring; } - if (uc->rflow->id != uc->rchan->id && uc->dir != DMA_MEM_TO_MEM) { + if (uc->rflow->id != uc->rchan->id && uc->config.dir != DMA_MEM_TO_MEM) { req.flowid_start = uc->rflow->id; req.flowid_cnt = 1; } @@ -984,7 +994,7 @@ static int udma_alloc_rchan_sci_req(struct udma_chan *uc) uc->rchan->id, ret); return ret; } - if (uc->dir == DMA_MEM_TO_MEM) + if (uc->config.dir == DMA_MEM_TO_MEM) return ret; flow_req.valid_params = @@ -1006,12 +1016,12 @@ static int udma_alloc_rchan_sci_req(struct udma_chan *uc) flow_req.nav_id = tisci_rm->tisci_dev_id; flow_req.flow_index = uc->rflow->id; - if (uc->needs_epib) + if (uc->config.needs_epib) flow_req.rx_einfo_present = 1; else flow_req.rx_einfo_present = 0; - if (uc->psd_size) + if (uc->config.psd_size) flow_req.rx_psinfo_present = 1; else flow_req.rx_psinfo_present = 0; @@ -1044,11 +1054,12 @@ static int udma_alloc_chan_resources(struct udma_chan *uc) int ret; pr_debug("%s: chan:%d as %s\n", - __func__, uc->id, udma_get_dir_text(uc->dir)); + __func__, uc->id, udma_get_dir_text(uc->config.dir)); - switch (uc->dir) { + switch (uc->config.dir) { case DMA_MEM_TO_MEM: /* Non synchronized - mem to mem type of transfer */ + uc->config.pkt_mode = false; ret = udma_get_chan_pair(uc); if (ret) return ret; @@ -1061,8 +1072,8 @@ static int udma_alloc_chan_resources(struct udma_chan *uc) if (ret) goto err_free_res; - uc->src_thread = ud->psil_base + uc->tchan->id; - uc->dst_thread = (ud->psil_base + uc->rchan->id) | 0x8000; + uc->config.src_thread = ud->psil_base + uc->tchan->id; + uc->config.dst_thread = (ud->psil_base + uc->rchan->id) | 0x8000; break; case DMA_MEM_TO_DEV: /* Slave transfer synchronized - mem to dev (TX) trasnfer */ @@ -1070,10 +1081,9 @@ static int udma_alloc_chan_resources(struct udma_chan *uc) if (ret) goto err_free_res; - uc->src_thread = ud->psil_base + uc->tchan->id; - uc->dst_thread = uc->slave_thread_id; - if (!(uc->dst_thread & 0x8000)) - uc->dst_thread |= 0x8000; + uc->config.src_thread = ud->psil_base + uc->tchan->id; + uc->config.dst_thread = uc->config.remote_thread_id; + uc->config.dst_thread |= 0x8000; break; case DMA_DEV_TO_MEM: @@ -1082,19 +1092,19 @@ static int udma_alloc_chan_resources(struct udma_chan *uc) if (ret) goto err_free_res; - uc->src_thread = uc->slave_thread_id; - uc->dst_thread = (ud->psil_base + uc->rchan->id) | 0x8000; + uc->config.src_thread = uc->config.remote_thread_id; + uc->config.dst_thread = (ud->psil_base + uc->rchan->id) | 0x8000; break; default: /* Can not happen */ pr_debug("%s: chan:%d invalid direction (%u)\n", - __func__, uc->id, uc->dir); + __func__, uc->id, uc->config.dir); return -EINVAL; } /* We have channel indexes and rings */ - if (uc->dir == DMA_MEM_TO_MEM) { + if (uc->config.dir == DMA_MEM_TO_MEM) { ret = udma_alloc_tchan_sci_req(uc); if (ret) goto err_free_res; @@ -1104,7 +1114,7 @@ static int udma_alloc_chan_resources(struct udma_chan *uc) goto err_free_res; } else { /* Slave transfer */ - if (uc->dir == DMA_MEM_TO_DEV) { + if (uc->config.dir == DMA_MEM_TO_DEV) { ret = udma_alloc_tchan_sci_req(uc); if (ret) goto err_free_res; @@ -1125,7 +1135,7 @@ static int udma_alloc_chan_resources(struct udma_chan *uc) } /* PSI-L pairing */ - ret = udma_navss_psil_pair(ud, uc->src_thread, uc->dst_thread); + ret = udma_navss_psil_pair(ud, uc->config.src_thread, uc->config.dst_thread); if (ret) { dev_err(ud->dev, "k3_nav_psil_request_link fail\n"); goto err_free_res; @@ -1136,7 +1146,7 @@ static int udma_alloc_chan_resources(struct udma_chan *uc) err_free_res: udma_free_tx_resources(uc); udma_free_rx_resources(uc); - uc->slave_thread_id = -1; + uc->config.remote_thread_id = -1; return ret; } @@ -1145,15 +1155,15 @@ static void udma_free_chan_resources(struct udma_chan *uc) /* Some configuration to UDMA-P channel: disable, reset, whatever */ /* Release PSI-L pairing */ - udma_navss_psil_unpair(uc->ud, uc->src_thread, uc->dst_thread); + udma_navss_psil_unpair(uc->ud, uc->config.src_thread, uc->config.dst_thread); /* Reset the rings for a new start */ udma_reset_rings(uc); udma_free_tx_resources(uc); udma_free_rx_resources(uc); - uc->slave_thread_id = -1; - uc->dir = DMA_MEM_TO_MEM; + uc->config.remote_thread_id = -1; + uc->config.dir = DMA_MEM_TO_MEM; } static int udma_get_mmrs(struct udevice *dev) @@ -1377,10 +1387,10 @@ static int udma_probe(struct udevice *dev) uc->ud = ud; uc->id = i; - uc->slave_thread_id = -1; + uc->config.remote_thread_id = -1; uc->tchan = NULL; uc->rchan = NULL; - uc->dir = DMA_MEM_TO_MEM; + uc->config.dir = DMA_MEM_TO_MEM; sprintf(uc->name, "UDMA chan%d\n", i); if (!i) uc->in_use = true; @@ -1527,6 +1537,7 @@ static int udma_transfer(struct udevice *dev, int direction, static int udma_request(struct dma *dma) { struct udma_dev *ud = dev_get_priv(dma->dev); + struct udma_chan_config *ucc; struct udma_chan *uc; unsigned long dummy; int ret; @@ -1537,30 +1548,27 @@ static int udma_request(struct dma *dma) } uc = &ud->channels[dma->id]; + ucc = &uc->config; ret = udma_alloc_chan_resources(uc); if (ret) { dev_err(dma->dev, "alloc dma res failed %d\n", ret); return -EINVAL; } - uc->hdesc_size = cppi5_hdesc_calc_size(uc->needs_epib, - uc->psd_size, 0); - uc->hdesc_size = ALIGN(uc->hdesc_size, ARCH_DMA_MINALIGN); - - if (uc->dir == DMA_MEM_TO_DEV) { - uc->desc_tx = dma_alloc_coherent(uc->hdesc_size, &dummy); - memset(uc->desc_tx, 0, uc->hdesc_size); + if (uc->config.dir == DMA_MEM_TO_DEV) { + uc->desc_tx = dma_alloc_coherent(ucc->hdesc_size, &dummy); + memset(uc->desc_tx, 0, ucc->hdesc_size); } else { uc->desc_rx = dma_alloc_coherent( - uc->hdesc_size * UDMA_RX_DESC_NUM, &dummy); - memset(uc->desc_rx, 0, uc->hdesc_size * UDMA_RX_DESC_NUM); + ucc->hdesc_size * UDMA_RX_DESC_NUM, &dummy); + memset(uc->desc_rx, 0, ucc->hdesc_size * UDMA_RX_DESC_NUM); } uc->in_use = true; uc->desc_rx_cur = 0; uc->num_rx_bufs = 0; - if (uc->dir == DMA_DEV_TO_MEM) { + if (uc->config.dir == DMA_DEV_TO_MEM) { uc->cfg_data.flow_id_base = uc->rflow->id; uc->cfg_data.flow_id_cnt = 1; } @@ -1645,7 +1653,7 @@ static int udma_send(struct dma *dma, void *src, size_t len, void *metadata) } uc = &ud->channels[dma->id]; - if (uc->dir != DMA_MEM_TO_DEV) + if (uc->config.dir != DMA_MEM_TO_DEV) return -EINVAL; tc_ring_id = k3_nav_ringacc_get_ring_id(uc->tchan->tc_ring); @@ -1655,8 +1663,8 @@ static int udma_send(struct dma *dma, void *src, size_t len, void *metadata) cppi5_hdesc_reset_hbdesc(desc_tx); cppi5_hdesc_init(desc_tx, - uc->needs_epib ? CPPI5_INFO0_HDESC_EPIB_PRESENT : 0, - uc->psd_size); + uc->config.needs_epib ? CPPI5_INFO0_HDESC_EPIB_PRESENT : 0, + uc->config.psd_size); cppi5_hdesc_set_pktlen(desc_tx, len); cppi5_hdesc_attach_buf(desc_tx, dma_src, len, dma_src, len); cppi5_desc_set_pktids(&desc_tx->hdr, uc->id, 0x3fff); @@ -1669,7 +1677,7 @@ static int udma_send(struct dma *dma, void *src, size_t len, void *metadata) ALIGN((unsigned long)dma_src + len, ARCH_DMA_MINALIGN)); flush_dcache_range((unsigned long)desc_tx, - ALIGN((unsigned long)desc_tx + uc->hdesc_size, + ALIGN((unsigned long)desc_tx + uc->config.hdesc_size, ARCH_DMA_MINALIGN)); ret = udma_push_to_ring(uc->tchan->t_ring, uc->desc_tx); @@ -1687,6 +1695,7 @@ static int udma_send(struct dma *dma, void *src, size_t len, void *metadata) static int udma_receive(struct dma *dma, void **dst, void *metadata) { struct udma_dev *ud = dev_get_priv(dma->dev); + struct udma_chan_config *ucc; struct cppi5_host_desc_t *desc_rx; dma_addr_t buf_dma; struct udma_chan *uc; @@ -1699,8 +1708,9 @@ static int udma_receive(struct dma *dma, void **dst, void *metadata) return -EINVAL; } uc = &ud->channels[dma->id]; + ucc = &uc->config; - if (uc->dir != DMA_DEV_TO_MEM) + if (uc->config.dir != DMA_DEV_TO_MEM) return -EINVAL; if (!uc->num_rx_bufs) return -EINVAL; @@ -1715,7 +1725,7 @@ static int udma_receive(struct dma *dma, void **dst, void *metadata) /* invalidate cache data */ invalidate_dcache_range((ulong)desc_rx, - (ulong)(desc_rx + uc->hdesc_size)); + (ulong)(desc_rx + ucc->hdesc_size)); cppi5_hdesc_get_obuf(desc_rx, &buf_dma, &buf_dma_len); pkt_len = cppi5_hdesc_get_pktlen(desc_rx); @@ -1734,6 +1744,7 @@ static int udma_receive(struct dma *dma, void **dst, void *metadata) static int udma_of_xlate(struct dma *dma, struct ofnode_phandle_args *args) { + struct udma_chan_config *ucc; struct udma_dev *ud = dev_get_priv(dma->dev); struct udma_chan *uc = &ud->channels[0]; struct psil_endpoint_config *ep_config; @@ -1748,32 +1759,40 @@ static int udma_of_xlate(struct dma *dma, struct ofnode_phandle_args *args) if (val == ud->ch_count) return -EBUSY; - uc->slave_thread_id = args->args[0]; - if (uc->slave_thread_id & K3_PSIL_DST_THREAD_ID_OFFSET) - uc->dir = DMA_MEM_TO_DEV; + ucc = &uc->config; + ucc->remote_thread_id = args->args[0]; + if (ucc->remote_thread_id & K3_PSIL_DST_THREAD_ID_OFFSET) + ucc->dir = DMA_MEM_TO_DEV; else - uc->dir = DMA_DEV_TO_MEM; + ucc->dir = DMA_DEV_TO_MEM; - ep_config = psil_get_ep_config(uc->slave_thread_id); + ep_config = psil_get_ep_config(ucc->remote_thread_id); if (IS_ERR(ep_config)) { dev_err(ud->dev, "No configuration for psi-l thread 0x%04x\n", - uc->slave_thread_id); - uc->dir = DMA_MEM_TO_MEM; - uc->slave_thread_id = -1; + uc->config.remote_thread_id); + ucc->dir = DMA_MEM_TO_MEM; + ucc->remote_thread_id = -1; return false; } - uc->pkt_mode = ep_config->pkt_mode; + ucc->pkt_mode = ep_config->pkt_mode; + ucc->channel_tpl = ep_config->channel_tpl; + ucc->notdpkt = ep_config->notdpkt; + ucc->ep_type = ep_config->ep_type; + + ucc->needs_epib = ep_config->needs_epib; + ucc->psd_size = ep_config->psd_size; + ucc->metadata_size = (ucc->needs_epib ? CPPI5_INFO0_HDESC_EPIB_SIZE : 0) + ucc->psd_size; - uc->needs_epib = ep_config->needs_epib; - uc->psd_size = ep_config->psd_size; - uc->metadata_size = (uc->needs_epib ? CPPI5_INFO0_HDESC_EPIB_SIZE : 0) + uc->psd_size; + ucc->hdesc_size = cppi5_hdesc_calc_size(ucc->needs_epib, + ucc->psd_size, 0); + ucc->hdesc_size = ALIGN(ucc->hdesc_size, ARCH_DMA_MINALIGN); dma->id = uc->id; pr_debug("Allocated dma chn:%lu epib:%d psdata:%u meta:%u thread_id:%x\n", - dma->id, uc->needs_epib, - uc->psd_size, uc->metadata_size, - uc->slave_thread_id); + dma->id, ucc->needs_epib, + ucc->psd_size, ucc->metadata_size, + ucc->remote_thread_id); return 0; } @@ -1792,26 +1811,26 @@ int udma_prepare_rcv_buf(struct dma *dma, void *dst, size_t size) } uc = &ud->channels[dma->id]; - if (uc->dir != DMA_DEV_TO_MEM) + if (uc->config.dir != DMA_DEV_TO_MEM) return -EINVAL; if (uc->num_rx_bufs >= UDMA_RX_DESC_NUM) return -EINVAL; desc_num = uc->desc_rx_cur % UDMA_RX_DESC_NUM; - desc_rx = uc->desc_rx + (desc_num * uc->hdesc_size); + desc_rx = uc->desc_rx + (desc_num * uc->config.hdesc_size); dma_dst = (dma_addr_t)dst; cppi5_hdesc_reset_hbdesc(desc_rx); cppi5_hdesc_init(desc_rx, - uc->needs_epib ? CPPI5_INFO0_HDESC_EPIB_PRESENT : 0, - uc->psd_size); + uc->config.needs_epib ? CPPI5_INFO0_HDESC_EPIB_PRESENT : 0, + uc->config.psd_size); cppi5_hdesc_set_pktlen(desc_rx, size); cppi5_hdesc_attach_buf(desc_rx, dma_dst, size, dma_dst, size); flush_dcache_range((unsigned long)desc_rx, - ALIGN((unsigned long)desc_rx + uc->hdesc_size, + ALIGN((unsigned long)desc_rx + uc->config.hdesc_size, ARCH_DMA_MINALIGN)); udma_push_to_ring(uc->rchan->fd_ring, desc_rx); -- cgit v1.1 From 7be5121719c3e7384591c3c7f9e21f034031064c Mon Sep 17 00:00:00 2001 From: Vignesh Raghavendra Date: Mon, 6 Jul 2020 13:26:26 +0530 Subject: dma: ti: k3-udma: Move RX descriptor ring entries to rflow struct In K3 UDMA architecture, RX rings are associated with RX flows rather than RX channels, therefore move the ring pointers to udma_rflow struct Signed-off-by: Vignesh Raghavendra --- drivers/dma/ti/k3-udma.c | 52 ++++++++++++++++++++++++++---------------------- 1 file changed, 28 insertions(+), 24 deletions(-) diff --git a/drivers/dma/ti/k3-udma.c b/drivers/dma/ti/k3-udma.c index 375e904..77790b6 100644 --- a/drivers/dma/ti/k3-udma.c +++ b/drivers/dma/ti/k3-udma.c @@ -65,8 +65,6 @@ struct udma_rchan { void __iomem *reg_rt; int id; - struct k3_nav_ring *fd_ring; /* Free Descriptor ring */ - struct k3_nav_ring *r_ring; /* Receive ring*/ }; #define UDMA_FLAG_PDMA_ACC32 BIT(0) @@ -86,6 +84,9 @@ struct udma_match_data { struct udma_rflow { int id; + + struct k3_nav_ring *fd_ring; /* Free Descriptor ring */ + struct k3_nav_ring *r_ring; /* Receive ring*/ }; enum udma_rm_range { @@ -335,7 +336,7 @@ static int udma_pop_from_ring(struct udma_chan *uc, dma_addr_t *addr) switch (uc->config.dir) { case DMA_DEV_TO_MEM: - ring = uc->rchan->r_ring; + ring = uc->rflow->r_ring; break; case DMA_MEM_TO_DEV: ring = uc->tchan->tc_ring; @@ -360,8 +361,8 @@ static void udma_reset_rings(struct udma_chan *uc) switch (uc->config.dir) { case DMA_DEV_TO_MEM: - ring1 = uc->rchan->fd_ring; - ring2 = uc->rchan->r_ring; + ring1 = uc->rflow->fd_ring; + ring2 = uc->rflow->r_ring; break; case DMA_MEM_TO_DEV: ring1 = uc->tchan->t_ring; @@ -840,12 +841,15 @@ static void udma_free_rx_resources(struct udma_chan *uc) if (!uc->rchan) return; - k3_nav_ringacc_ring_free(uc->rchan->fd_ring); - k3_nav_ringacc_ring_free(uc->rchan->r_ring); - uc->rchan->fd_ring = NULL; - uc->rchan->r_ring = NULL; + if (uc->rflow) { + k3_nav_ringacc_ring_free(uc->rflow->fd_ring); + k3_nav_ringacc_ring_free(uc->rflow->r_ring); + uc->rflow->fd_ring = NULL; + uc->rflow->r_ring = NULL; + + udma_put_rflow(uc); + } - udma_put_rflow(uc); udma_put_rchan(uc); } @@ -872,17 +876,17 @@ static int udma_alloc_rx_resources(struct udma_chan *uc) fd_ring_id = ud->tchan_cnt + ud->echan_cnt + uc->rchan->id; - uc->rchan->fd_ring = k3_nav_ringacc_request_ring( + uc->rflow->fd_ring = k3_nav_ringacc_request_ring( ud->ringacc, fd_ring_id, RINGACC_RING_USE_PROXY); - if (!uc->rchan->fd_ring) { + if (!uc->rflow->fd_ring) { ret = -EBUSY; goto err_rx_ring; } - uc->rchan->r_ring = k3_nav_ringacc_request_ring( + uc->rflow->r_ring = k3_nav_ringacc_request_ring( ud->ringacc, -1, RINGACC_RING_USE_PROXY); - if (!uc->rchan->r_ring) { + if (!uc->rflow->r_ring) { ret = -EBUSY; goto err_rxc_ring; } @@ -892,8 +896,8 @@ static int udma_alloc_rx_resources(struct udma_chan *uc) ring_cfg.elm_size = K3_NAV_RINGACC_RING_ELSIZE_8; ring_cfg.mode = K3_NAV_RINGACC_RING_MODE_RING; - ret = k3_nav_ringacc_ring_cfg(uc->rchan->fd_ring, &ring_cfg); - ret |= k3_nav_ringacc_ring_cfg(uc->rchan->r_ring, &ring_cfg); + ret = k3_nav_ringacc_ring_cfg(uc->rflow->fd_ring, &ring_cfg); + ret |= k3_nav_ringacc_ring_cfg(uc->rflow->r_ring, &ring_cfg); if (ret) goto err_ringcfg; @@ -901,11 +905,11 @@ static int udma_alloc_rx_resources(struct udma_chan *uc) return 0; err_ringcfg: - k3_nav_ringacc_ring_free(uc->rchan->r_ring); - uc->rchan->r_ring = NULL; + k3_nav_ringacc_ring_free(uc->rflow->r_ring); + uc->rflow->r_ring = NULL; err_rxc_ring: - k3_nav_ringacc_ring_free(uc->rchan->fd_ring); - uc->rchan->fd_ring = NULL; + k3_nav_ringacc_ring_free(uc->rflow->fd_ring); + uc->rflow->fd_ring = NULL; err_rx_ring: udma_put_rflow(uc); err_rflow: @@ -952,8 +956,8 @@ static int udma_alloc_tchan_sci_req(struct udma_chan *uc) static int udma_alloc_rchan_sci_req(struct udma_chan *uc) { struct udma_dev *ud = uc->ud; - int fd_ring = k3_nav_ringacc_get_ring_id(uc->rchan->fd_ring); - int rx_ring = k3_nav_ringacc_get_ring_id(uc->rchan->r_ring); + int fd_ring = k3_nav_ringacc_get_ring_id(uc->rflow->fd_ring); + int rx_ring = k3_nav_ringacc_get_ring_id(uc->rflow->r_ring); int tc_ring = k3_nav_ringacc_get_ring_id(uc->tchan->tc_ring); struct ti_sci_msg_rm_udmap_rx_ch_cfg req = { 0 }; struct ti_sci_msg_rm_udmap_flow_cfg flow_req = { 0 }; @@ -1715,7 +1719,7 @@ static int udma_receive(struct dma *dma, void **dst, void *metadata) if (!uc->num_rx_bufs) return -EINVAL; - ret = k3_nav_ringacc_ring_pop(uc->rchan->r_ring, &desc_rx); + ret = k3_nav_ringacc_ring_pop(uc->rflow->r_ring, &desc_rx); if (ret && ret != -ENODATA) { dev_err(dma->dev, "rx dma fail ch_id:%lu %d\n", dma->id, ret); return ret; @@ -1833,7 +1837,7 @@ int udma_prepare_rcv_buf(struct dma *dma, void *dst, size_t size) ALIGN((unsigned long)desc_rx + uc->config.hdesc_size, ARCH_DMA_MINALIGN)); - udma_push_to_ring(uc->rchan->fd_ring, desc_rx); + udma_push_to_ring(uc->rflow->fd_ring, desc_rx); uc->num_rx_bufs++; uc->desc_rx_cur++; -- cgit v1.1 From ddcf5318af45a90d60be96e16b3653de5fa26965 Mon Sep 17 00:00:00 2001 From: Vignesh Raghavendra Date: Mon, 6 Jul 2020 13:26:27 +0530 Subject: dma: ti: k3-udma: Switch to k3_ringacc_request_rings_pair We only request ring pairs via K3 DMA driver, switch to use the new k3_ringacc_request_rings_pair() to simplify the code. As a good side effect, all boot stages now use exposed RING mode which avoid maintaining proxy mode for 32 bit R5 core. Signed-off-by: Vignesh Raghavendra --- drivers/dma/ti/k3-udma.c | 52 ++++++++++++++---------------------------------- 1 file changed, 15 insertions(+), 37 deletions(-) diff --git a/drivers/dma/ti/k3-udma.c b/drivers/dma/ti/k3-udma.c index 77790b6..57d9fbf 100644 --- a/drivers/dma/ti/k3-udma.c +++ b/drivers/dma/ti/k3-udma.c @@ -32,12 +32,6 @@ #include "k3-udma-hwdef.h" #include "k3-psil-priv.h" -#if BITS_PER_LONG == 64 -#define RINGACC_RING_USE_PROXY (0) -#else -#define RINGACC_RING_USE_PROXY (1) -#endif - #define K3_UDMA_MAX_RFLOWS 1024 struct udma_chan; @@ -796,21 +790,14 @@ static int udma_alloc_tx_resources(struct udma_chan *uc) if (ret) return ret; - uc->tchan->t_ring = k3_nav_ringacc_request_ring( - ud->ringacc, uc->tchan->id, - RINGACC_RING_USE_PROXY); - if (!uc->tchan->t_ring) { + ret = k3_nav_ringacc_request_rings_pair(ud->ringacc, uc->tchan->id, -1, + &uc->tchan->t_ring, + &uc->tchan->tc_ring); + if (ret) { ret = -EBUSY; goto err_tx_ring; } - uc->tchan->tc_ring = k3_nav_ringacc_request_ring( - ud->ringacc, -1, RINGACC_RING_USE_PROXY); - if (!uc->tchan->tc_ring) { - ret = -EBUSY; - goto err_txc_ring; - } - memset(&ring_cfg, 0, sizeof(ring_cfg)); ring_cfg.size = 16; ring_cfg.elm_size = K3_NAV_RINGACC_RING_ELSIZE_8; @@ -827,7 +814,6 @@ static int udma_alloc_tx_resources(struct udma_chan *uc) err_ringcfg: k3_nav_ringacc_ring_free(uc->tchan->tc_ring); uc->tchan->tc_ring = NULL; -err_txc_ring: k3_nav_ringacc_ring_free(uc->tchan->t_ring); uc->tchan->t_ring = NULL; err_tx_ring: @@ -857,6 +843,7 @@ static int udma_alloc_rx_resources(struct udma_chan *uc) { struct k3_nav_ring_cfg ring_cfg; struct udma_dev *ud = uc->ud; + struct udma_rflow *rflow; int fd_ring_id; int ret; @@ -876,40 +863,31 @@ static int udma_alloc_rx_resources(struct udma_chan *uc) fd_ring_id = ud->tchan_cnt + ud->echan_cnt + uc->rchan->id; - uc->rflow->fd_ring = k3_nav_ringacc_request_ring( - ud->ringacc, fd_ring_id, - RINGACC_RING_USE_PROXY); - if (!uc->rflow->fd_ring) { + rflow = uc->rflow; + ret = k3_nav_ringacc_request_rings_pair(ud->ringacc, fd_ring_id, -1, + &rflow->fd_ring, &rflow->r_ring); + if (ret) { ret = -EBUSY; goto err_rx_ring; } - uc->rflow->r_ring = k3_nav_ringacc_request_ring( - ud->ringacc, -1, RINGACC_RING_USE_PROXY); - if (!uc->rflow->r_ring) { - ret = -EBUSY; - goto err_rxc_ring; - } - memset(&ring_cfg, 0, sizeof(ring_cfg)); ring_cfg.size = 16; ring_cfg.elm_size = K3_NAV_RINGACC_RING_ELSIZE_8; ring_cfg.mode = K3_NAV_RINGACC_RING_MODE_RING; - ret = k3_nav_ringacc_ring_cfg(uc->rflow->fd_ring, &ring_cfg); - ret |= k3_nav_ringacc_ring_cfg(uc->rflow->r_ring, &ring_cfg); - + ret = k3_nav_ringacc_ring_cfg(rflow->fd_ring, &ring_cfg); + ret |= k3_nav_ringacc_ring_cfg(rflow->r_ring, &ring_cfg); if (ret) goto err_ringcfg; return 0; err_ringcfg: - k3_nav_ringacc_ring_free(uc->rflow->r_ring); - uc->rflow->r_ring = NULL; -err_rxc_ring: - k3_nav_ringacc_ring_free(uc->rflow->fd_ring); - uc->rflow->fd_ring = NULL; + k3_nav_ringacc_ring_free(rflow->r_ring); + rflow->r_ring = NULL; + k3_nav_ringacc_ring_free(rflow->fd_ring); + rflow->fd_ring = NULL; err_rx_ring: udma_put_rflow(uc); err_rflow: -- cgit v1.1 From cf9b9942bf3af9e00381f9d51bf60585ef820f97 Mon Sep 17 00:00:00 2001 From: Vignesh Raghavendra Date: Mon, 6 Jul 2020 13:36:52 +0530 Subject: net: ti: am65-cpsw-nuss: Remove dead code MDIO node is not referenced further, therefore drop the dead code. Signed-off-by: Vignesh Raghavendra --- drivers/net/ti/am65-cpsw-nuss.c | 7 ------- 1 file changed, 7 deletions(-) diff --git a/drivers/net/ti/am65-cpsw-nuss.c b/drivers/net/ti/am65-cpsw-nuss.c index 85f3e49..e8fe875 100644 --- a/drivers/net/ti/am65-cpsw-nuss.c +++ b/drivers/net/ti/am65-cpsw-nuss.c @@ -746,13 +746,6 @@ static int am65_cpsw_probe_cpsw(struct udevice *dev) goto out; } - node = dev_read_subnode(dev, "mdio"); - if (!ofnode_valid(node)) { - dev_err(dev, "can't find mdio\n"); - ret = -ENOENT; - goto out; - } - cpsw_common->bus_freq = dev_read_u32_default(dev, "bus_freq", AM65_CPSW_MDIO_BUS_FREQ_DEF); -- cgit v1.1 From 9eab6fd526c510e8fee4660733a10b756ceddd44 Mon Sep 17 00:00:00 2001 From: Vignesh Raghavendra Date: Mon, 6 Jul 2020 13:36:53 +0530 Subject: net: ti: am65-cpsw-nuss: Set ALE default thread enable Force default thread to be used for RX as ALE is anyways set to Bypass mode. Signed-off-by: Vignesh Raghavendra --- drivers/net/ti/am65-cpsw-nuss.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/net/ti/am65-cpsw-nuss.c b/drivers/net/ti/am65-cpsw-nuss.c index e8fe875..753a117 100644 --- a/drivers/net/ti/am65-cpsw-nuss.c +++ b/drivers/net/ti/am65-cpsw-nuss.c @@ -61,6 +61,9 @@ #define AM65_CPSW_ALE_PN_CTL_REG_MODE_FORWARD 0x3 #define AM65_CPSW_ALE_PN_CTL_REG_MAC_ONLY BIT(11) +#define AM65_CPSW_ALE_THREADMAPDEF_REG 0x134 +#define AM65_CPSW_ALE_DEFTHREAD_EN BIT(15) + #define AM65_CPSW_MACSL_CTL_REG 0x0 #define AM65_CPSW_MACSL_CTL_REG_IFCTL_A BIT(15) #define AM65_CPSW_MACSL_CTL_EXT_EN BIT(18) @@ -364,6 +367,9 @@ static int am65_cpsw_start(struct udevice *dev) writel(AM65_CPSW_ALE_PN_CTL_REG_MODE_FORWARD, common->ale_base + AM65_CPSW_ALE_PN_CTL_REG(0)); + writel(AM65_CPSW_ALE_DEFTHREAD_EN, + common->ale_base + AM65_CPSW_ALE_THREADMAPDEF_REG); + /* PORT x configuration */ /* Port x Max length register */ -- cgit v1.1 From 84228940c397e48dfed46c98f7e31de2a5b39dc7 Mon Sep 17 00:00:00 2001 From: Vignesh Raghavendra Date: Mon, 6 Jul 2020 13:36:54 +0530 Subject: net: ti: am65-cpsw-nuss: Update driver to use kernel DT Kernel DT has CPSW ports under ethernet-ports subnode. Update the driver to look for the same. Signed-off-by: Vignesh Raghavendra --- drivers/net/ti/am65-cpsw-nuss.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ti/am65-cpsw-nuss.c b/drivers/net/ti/am65-cpsw-nuss.c index 753a117..971bdcd 100644 --- a/drivers/net/ti/am65-cpsw-nuss.c +++ b/drivers/net/ti/am65-cpsw-nuss.c @@ -686,7 +686,7 @@ static int am65_cpsw_probe_cpsw(struct udevice *dev) AM65_CPSW_CPSW_NU_ALE_BASE; cpsw_common->mdio_base = cpsw_common->ss_base + AM65_CPSW_MDIO_BASE; - ports_np = dev_read_subnode(dev, "ports"); + ports_np = dev_read_subnode(dev, "ethernet-ports"); if (!ofnode_valid(ports_np)) { ret = -ENOENT; goto out; -- cgit v1.1 From aeeca07a802bf287745c0d53f480eaa15b3c9e14 Mon Sep 17 00:00:00 2001 From: Vignesh Raghavendra Date: Mon, 6 Jul 2020 13:36:55 +0530 Subject: arm: dts: k3-j721e: Sync CPSW DT node from kernel Sync CPSW DT node from Kernel and move it out of -u-boot.dtsi file. Signed-off-by: Vignesh Raghavendra --- .../arm/dts/k3-j721e-common-proc-board-u-boot.dtsi | 74 +--------------------- arch/arm/dts/k3-j721e-mcu-wakeup.dtsi | 74 ++++++++++++++++++++++ 2 files changed, 75 insertions(+), 73 deletions(-) diff --git a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi index 6273133..6e748bf 100644 --- a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi +++ b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi @@ -31,20 +31,6 @@ u-boot,dm-spl; }; - mcu_conf: scm_conf@40f00000 { - compatible = "syscon", "simple-mfd"; - reg = <0x0 0x40f00000 0x0 0x20000>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x0 0x40f00000 0x20000>; - - phy_sel: cpsw-phy-sel@4040 { - compatible = "ti,am654-cpsw-phy-sel"; - reg = <0x4040 0x4>; - reg-names = "gmii-sel"; - }; - }; - mcu_navss { u-boot,dm-spl; @@ -56,65 +42,6 @@ u-boot,dm-spl; }; }; - - mcu_cpsw: ethernet@046000000 { - compatible = "ti,j721e-cpsw-nuss"; - #address-cells = <2>; - #size-cells = <2>; - reg = <0x0 0x46000000 0x0 0x200000>; - reg-names = "cpsw_nuss"; - ranges; - dma-coherent; - clocks = <&k3_clks 18 22>; - clock-names = "fck"; - power-domains = <&k3_pds 18 TI_SCI_PD_EXCLUSIVE>; - cpsw-phy-sel = <&phy_sel>; - - dmas = <&mcu_udmap 0xf000>, - <&mcu_udmap 0xf001>, - <&mcu_udmap 0xf002>, - <&mcu_udmap 0xf003>, - <&mcu_udmap 0xf004>, - <&mcu_udmap 0xf005>, - <&mcu_udmap 0xf006>, - <&mcu_udmap 0xf007>, - <&mcu_udmap 0x7000>; - dma-names = "tx0", "tx1", "tx2", "tx3", - "tx4", "tx5", "tx6", "tx7", - "rx"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - host: host@0 { - reg = <0>; - ti,label = "host"; - }; - - cpsw_port1: port@1 { - reg = <1>; - ti,mac-only; - ti,label = "port1"; - ti,syscon-efuse = <&mcu_conf 0x200>; - }; - }; - - davinci_mdio: mdio { - #address-cells = <1>; - #size-cells = <0>; - bus_freq = <1000000>; - }; - - cpts { - clocks = <&k3_clks 18 2>; - clock-names = "cpts"; - interrupts-extended = <&gic500 GIC_SPI 858 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "cpts"; - ti,cpts-ext-ts-inputs = <4>; - ti,cpts-periodic-outputs = <2>; - }; - }; }; &secure_proxy_main { @@ -224,6 +151,7 @@ reg = <0x0 0x46000000 0x0 0x200000>, <0x0 0x40f00200 0x0 0x2>; reg-names = "cpsw_nuss", "mac_efuse"; + /delete-property/ ranges; cpsw-phy-sel@40f04040 { compatible = "ti,am654-cpsw-phy-sel"; diff --git a/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi b/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi index 70d5bca..e6c99ab 100644 --- a/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi +++ b/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi @@ -35,6 +35,20 @@ }; }; + mcu_conf: syscon@40f00000 { + compatible = "syscon", "simple-mfd"; + reg = <0x0 0x40f00000 0x0 0x20000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x0 0x40f00000 0x20000>; + + phy_gmii_sel: phy@4040 { + compatible = "ti,am654-phy-gmii-sel"; + reg = <0x4040 0x4>; + #phy-cells = <1>; + }; + }; + wkup_pmx0: pinmux@4301c000 { compatible = "pinctrl-single"; /* Proxy 0 addressing */ @@ -242,4 +256,64 @@ ti,sci-rm-range-rflow = <0x00>; /* GP RFLOW */ }; }; + + mcu_cpsw: ethernet@46000000 { + compatible = "ti,j721e-cpsw-nuss"; + #address-cells = <2>; + #size-cells = <2>; + reg = <0x0 0x46000000 0x0 0x200000>; + reg-names = "cpsw_nuss"; + ranges = <0x0 0x0 0x0 0x46000000 0x0 0x200000>; + dma-coherent; + clocks = <&k3_clks 18 22>; + clock-names = "fck"; + power-domains = <&k3_pds 18 TI_SCI_PD_EXCLUSIVE>; + + dmas = <&mcu_udmap 0xf000>, + <&mcu_udmap 0xf001>, + <&mcu_udmap 0xf002>, + <&mcu_udmap 0xf003>, + <&mcu_udmap 0xf004>, + <&mcu_udmap 0xf005>, + <&mcu_udmap 0xf006>, + <&mcu_udmap 0xf007>, + <&mcu_udmap 0x7000>; + dma-names = "tx0", "tx1", "tx2", "tx3", + "tx4", "tx5", "tx6", "tx7", + "rx"; + + ethernet-ports { + #address-cells = <1>; + #size-cells = <0>; + + cpsw_port1: port@1 { + reg = <1>; + ti,mac-only; + label = "port1"; + ti,syscon-efuse = <&mcu_conf 0x200>; + phys = <&phy_gmii_sel 1>; + }; + }; + + davinci_mdio: mdio@f00 { + compatible = "ti,cpsw-mdio","ti,davinci_mdio"; + reg = <0x0 0xf00 0x0 0x100>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&k3_clks 18 22>; + clock-names = "fck"; + bus_freq = <1000000>; + }; + + cpts@3d000 { + compatible = "ti,am65-cpts"; + reg = <0x0 0x3d000 0x0 0x400>; + clocks = <&k3_clks 18 2>; + clock-names = "cpts"; + interrupts-extended = <&gic500 GIC_SPI 858 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "cpts"; + ti,cpts-ext-ts-inputs = <4>; + ti,cpts-periodic-outputs = <2>; + }; + }; }; -- cgit v1.1 From 3f09ebfbde2284f8ee001222177ec56c1de61c0b Mon Sep 17 00:00:00 2001 From: Vignesh Raghavendra Date: Mon, 6 Jul 2020 13:36:56 +0530 Subject: arm: dts: k3-am65: Sync CPSW DT node from kernel Sync CPSW DT node from kernel and move it out of -u-boot.dtsi file. Signed-off-by: Vignesh Raghavendra --- arch/arm/dts/k3-am65-mcu.dtsi | 84 ++++++++++++++++++++++++++++ arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 54 +----------------- 2 files changed, 85 insertions(+), 53 deletions(-) diff --git a/arch/arm/dts/k3-am65-mcu.dtsi b/arch/arm/dts/k3-am65-mcu.dtsi index d1a9fb5..1355685 100644 --- a/arch/arm/dts/k3-am65-mcu.dtsi +++ b/arch/arm/dts/k3-am65-mcu.dtsi @@ -6,6 +6,20 @@ */ &cbass_mcu { + mcu_conf: scm_conf@40f00000 { + compatible = "syscon", "simple-mfd"; + reg = <0x0 0x40f00000 0x0 0x20000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x0 0x40f00000 0x20000>; + + phy_gmii_sel: phy@4040 { + compatible = "ti,am654-phy-gmii-sel"; + reg = <0x4040 0x4>; + #phy-cells = <1>; + }; + }; + mcu_uart0: serial@40a00000 { compatible = "ti,am654-uart"; reg = <0x00 0x40a00000 0x00 0x100>; @@ -146,4 +160,74 @@ ti,sci-rm-range-rflow = <0x5>; /* GP RFLOW */ }; }; + + mcu_cpsw: ethernet@46000000 { + compatible = "ti,am654-cpsw-nuss"; + #address-cells = <2>; + #size-cells = <2>; + reg = <0x0 0x46000000 0x0 0x200000>; + reg-names = "cpsw_nuss"; + ranges = <0x0 0x0 0x0 0x46000000 0x0 0x200000>; + dma-coherent; + clocks = <&k3_clks 5 10>; + clock-names = "fck"; + power-domains = <&k3_pds 5 TI_SCI_PD_EXCLUSIVE>; + + dmas = <&mcu_udmap 0xf000>, + <&mcu_udmap 0xf001>, + <&mcu_udmap 0xf002>, + <&mcu_udmap 0xf003>, + <&mcu_udmap 0xf004>, + <&mcu_udmap 0xf005>, + <&mcu_udmap 0xf006>, + <&mcu_udmap 0xf007>, + <&mcu_udmap 0x7000>; + dma-names = "tx0", "tx1", "tx2", "tx3", + "tx4", "tx5", "tx6", "tx7", + "rx"; + + ethernet-ports { + #address-cells = <1>; + #size-cells = <0>; + + cpsw_port1: port@1 { + reg = <1>; + ti,mac-only; + label = "port1"; + ti,syscon-efuse = <&mcu_conf 0x200>; + phys = <&phy_gmii_sel 1>; + }; + }; + + davinci_mdio: mdio@f00 { + compatible = "ti,cpsw-mdio","ti,davinci_mdio"; + reg = <0x0 0xf00 0x0 0x100>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&k3_clks 5 10>; + clock-names = "fck"; + bus_freq = <1000000>; + }; + + cpts@3d000 { + compatible = "ti,am65-cpts"; + reg = <0x0 0x3d000 0x0 0x400>; + clocks = <&mcu_cpsw_cpts_mux>; + clock-names = "cpts"; + interrupts-extended = <&gic500 GIC_SPI 570 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "cpts"; + ti,cpts-ext-ts-inputs = <4>; + ti,cpts-periodic-outputs = <2>; + + mcu_cpsw_cpts_mux: refclk-mux { + #clock-cells = <0>; + clocks = <&k3_clks 118 5>, <&k3_clks 118 11>, + <&k3_clks 118 6>, <&k3_clks 118 3>, + <&k3_clks 118 8>, <&k3_clks 118 14>, + <&k3_clks 120 3>, <&k3_clks 121 3>; + assigned-clocks = <&mcu_cpsw_cpts_mux>; + assigned-clock-parents = <&k3_clks 118 5>; + }; + }; + }; }; diff --git a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi index 1a40fa1..d9ff3ed4 100644 --- a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi +++ b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi @@ -57,59 +57,6 @@ u-boot,dm-spl; }; }; - - mcu_conf: scm_conf@40f00000 { - compatible = "syscon"; - reg = <0x0 0x40f00000 0x0 0x20000>; - }; - - mcu_cpsw: cpsw_nuss@046000000 { - compatible = "ti,am654-cpsw-nuss"; - #address-cells = <2>; - #size-cells = <2>; - reg = <0x0 0x46000000 0x0 0x200000>; - reg-names = "cpsw_nuss"; - ranges; - dma-coherent; - clocks = <&k3_clks 5 10>; - clock-names = "fck"; - power-domains = <&k3_pds 5 TI_SCI_PD_EXCLUSIVE>; - - dmas = <&mcu_udmap 0xf000>, - <&mcu_udmap 0xf001>, - <&mcu_udmap 0xf002>, - <&mcu_udmap 0xf003>, - <&mcu_udmap 0xf004>, - <&mcu_udmap 0xf005>, - <&mcu_udmap 0xf006>, - <&mcu_udmap 0xf007>, - <&mcu_udmap 0x7000>; - dma-names = "tx0", "tx1", "tx2", "tx3", - "tx4", "tx5", "tx6", "tx7", - "rx"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - host: host@0 { - reg = <0>; - ti,label = "host"; - }; - - cpsw_port1: port@1 { - reg = <1>; - ti,mac-only; - ti,label = "port1"; - ti,syscon-efuse = <&mcu_conf 0x200>; - }; - }; - - davinci_mdio: mdio { - #address-cells = <1>; - #size-cells = <0>; - bus_freq = <1000000>; - }; - }; }; &cbass_wakeup { @@ -271,6 +218,7 @@ reg = <0x0 0x46000000 0x0 0x200000>, <0x0 0x40f00200 0x0 0x2>; reg-names = "cpsw_nuss", "mac_efuse"; + /delete-property/ ranges; cpsw-phy-sel@40f04040 { compatible = "ti,am654-cpsw-phy-sel"; -- cgit v1.1 From 5f1600e03e7dd29f010fc0867a0bbea64d1520d0 Mon Sep 17 00:00:00 2001 From: Adam Ford Date: Mon, 29 Jun 2020 18:32:02 -0500 Subject: README: davinci: Clarify when SPL is used and the target devices. The documentation states that SPL is enabled in all config options for the da850. This incorrect, because devices booting from NOR do not need the SPL to do the low level initializion because when booting from NOR, the board is able to execute in place (XIP) This also clarifies that SPL isn't only used for booting from SPI, because it is also used for booting from MMC and NAND for those devices supporting those boot options. Signed-off-by: Adam Ford --- doc/README.davinci | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/doc/README.davinci b/doc/README.davinci index 6522c24..607531a 100644 --- a/doc/README.davinci +++ b/doc/README.davinci @@ -37,11 +37,15 @@ Bootloaders =============== For DA850 an SPL (secondary program loader, see doc/README.SPL) is provided -to load U-Boot directly from SPI flash. The SPL takes care of the low level +to load U-Boot from SPI flash, MMC or NAND. The SPL takes care of the low level initialization. -The SPL is built as u-boot.ais for all DA850 defconfigs. The resulting -image file can be programmed to the SPI flash of the DA850 EVM/LCDK. +The SPL is built as u-boot.ais for all DA850 defconfigs except those booting +from NOR flash. The resulting image file can be programmed to the SPI flash +of the DA850 EVM/LCDK. + +Devices that support booting from NOR utilize execute in place (XIP) and do +not require SPL to perform low level initialization. Environment Variables ===================== -- cgit v1.1 From 7bb33e4684aaee9e4e36dc673d32f4539f96d91a Mon Sep 17 00:00:00 2001 From: Adam Ford Date: Mon, 29 Jun 2020 18:49:41 -0500 Subject: ARM: da850-evm: Unify config options with Kconfig There are two options that are currently whitelisted, but they are redundant, because there are not necessary since Kconfig options exist to basically state the same thing. CONFIG_DIRECT_NOR_BOOT and CONFIG_USE_NOR are both set together and only used by the da850 when booting from NOR, however the only time CONFIG_MTD_NOR_FLASH is configured is when booting from NOR. Since NOR doesn't need SPL, the options for SPL can be moved to a check for building SPL instead of checking for NOR. This patch removes the checks for these two config options and unifies the checks around the Kconfig option of CONFIG_MTD_NOR_FLASH. Since this board is the only board that uses these two config options, they can be removed from the whitelist table. Signed-off-by: Adam Ford --- board/davinci/da8xxevm/da850evm.c | 6 +++--- configs/da850evm_direct_nor_defconfig | 1 - include/configs/da850evm.h | 23 +++++------------------ scripts/config_whitelist.txt | 2 -- 4 files changed, 8 insertions(+), 24 deletions(-) diff --git a/board/davinci/da8xxevm/da850evm.c b/board/davinci/da8xxevm/da850evm.c index a3b0f8b..c91aeb8 100644 --- a/board/davinci/da8xxevm/da850evm.c +++ b/board/davinci/da8xxevm/da850evm.c @@ -205,7 +205,7 @@ int misc_init_r(void) } static const struct pinmux_config gpio_pins[] = { -#ifdef CONFIG_USE_NOR +#ifdef CONFIG_MTD_NOR_FLASH /* GP0[11] is required for NOR to work on Rev 3 EVMs */ { pinmux(0), 8, 4 }, /* GP0[11] */ #endif @@ -235,7 +235,7 @@ const struct pinmux_resource pinmuxes[] = { PINMUX_ITEM(emifa_pins_cs3), PINMUX_ITEM(emifa_pins_cs4), PINMUX_ITEM(emifa_pins_nand), -#elif defined(CONFIG_USE_NOR) +#elif defined(CONFIG_MTD_NOR_FLASH) PINMUX_ITEM(emifa_pins_cs2), PINMUX_ITEM(emifa_pins_nor), #endif @@ -341,7 +341,7 @@ int board_init(void) DAVINCI_SYSCFG_SUSPSRC_UART2), &davinci_syscfg_regs->suspsrc); -#ifdef CONFIG_USE_NOR +#ifdef CONFIG_MTD_NOR_FLASH /* Set the GPIO direction as output */ clrbits_le32((u32 *)GPIO_BANK0_REG_DIR_ADDR, (0x01 << 11)); diff --git a/configs/da850evm_direct_nor_defconfig b/configs/da850evm_direct_nor_defconfig index 36ef122..3924895 100644 --- a/configs/da850evm_direct_nor_defconfig +++ b/configs/da850evm_direct_nor_defconfig @@ -10,7 +10,6 @@ CONFIG_ENV_SIZE=0x2800 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_EXTRA_OPTIONS="USE_NOR,DIRECT_NOR_BOOT" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="mem=32M console=ttyS2,115200n8 root=/dev/mtdblock2 rw noinitrd ip=dhcp" diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index 2bb4e47..11aca4a 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -13,10 +13,6 @@ /* * Board */ -/* check if direct NOR boot config is used */ -#ifndef CONFIG_DIRECT_NOR_BOOT -#define CONFIG_USE_SPIFLASH -#endif /* * SoC Configuration @@ -28,7 +24,7 @@ #define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID) #define CONFIG_SKIP_LOWLEVEL_INIT_ONLY -#ifdef CONFIG_DIRECT_NOR_BOOT +#ifdef CONFIG_MTD_NOR_FLASH #define CONFIG_SYS_DV_NOR_BOOT_CFG (0x11) #endif @@ -107,10 +103,6 @@ #define CONFIG_SYS_SPI_CLK clk_get(DAVINCI_SPI1_CLKID) -#ifdef CONFIG_USE_SPIFLASH -#define CONFIG_SYS_SPI_U_BOOT_SIZE 0x40000 -#endif - /* * I2C Configuration */ @@ -170,7 +162,7 @@ #define CONFIG_NET_RETRY_COUNT 10 #endif -#ifdef CONFIG_USE_NOR +#ifdef CONFIG_MTD_NOR_FLASH #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of flash banks */ #define CONFIG_SYS_FLASH_SECT_SZ (128 << 10) /* 128KB */ #define CONFIG_SYS_FLASH_BASE DAVINCI_ASYNC_EMIF_DATA_CE2_BASE @@ -223,16 +215,11 @@ #define CONFIG_CLOCKS #endif -#if !defined(CONFIG_MTD_RAW_NAND) && \ - !defined(CONFIG_USE_NOR) && \ - !defined(CONFIG_USE_SPIFLASH) -#endif - /* USB Configs */ #define CONFIG_USB_OHCI_NEW #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15 -#ifndef CONFIG_DIRECT_NOR_BOOT +#ifdef CONFIG_SPL_BUILD /* defines for SPL */ #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE - \ CONFIG_SYS_MALLOC_LEN) @@ -247,12 +234,12 @@ /* additions for new relocation code, must added to all boards */ #define CONFIG_SYS_SDRAM_BASE 0xc0000000 -#ifdef CONFIG_DIRECT_NOR_BOOT +#ifdef CONFIG_MTD_NOR_FLASH #define CONFIG_SYS_INIT_SP_ADDR 0x8001ff00 #else #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - /* Fix this */ \ GENERATED_GBL_DATA_SIZE) -#endif /* CONFIG_DIRECT_NOR_BOOT */ +#endif /* CONFIG_MTD_NOR_FLASH */ #include diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index ca40b9b..e3bebe9 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -312,7 +312,6 @@ CONFIG_DFU_ENV_SETTINGS CONFIG_DHCP_MIN_EXT_LEN CONFIG_DIALOG_POWER CONFIG_DIMM_SLOTS_PER_CTLR -CONFIG_DIRECT_NOR_BOOT CONFIG_DISCONTIGMEM CONFIG_DISCOVER_PHY CONFIG_DISPLAY_AER_xxxx @@ -4150,7 +4149,6 @@ CONFIG_USB_XHCI_EXYNOS CONFIG_USB_XHCI_OMAP CONFIG_USER_LOWLEVEL_INIT CONFIG_USE_INTERRUPT -CONFIG_USE_NOR CONFIG_USE_ONENAND_BOARD_INIT CONFIG_USE_SPIFLASH CONFIG_UTBIPAR_INIT_TBIPA -- cgit v1.1 From 58ad372c4995398fd1c0c4c848d8e300648da1ca Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Tue, 30 Jun 2020 15:02:27 -0400 Subject: omap3_beagle: Finish current outstanding DM migrations At this point in time we can now remove our legacy code and switch to enabling DM for USB and Ethernet. Cc: Derald D. Woods Cc: Adam Ford Signed-off-by: Tom Rini Tested-by: Derald D. Woods --- board/ti/beagle/beagle.c | 70 ------------------------------------------ configs/omap3_beagle_defconfig | 3 ++ 2 files changed, 3 insertions(+), 70 deletions(-) diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c index 9139ad8..9ccd566 100644 --- a/board/ti/beagle/beagle.c +++ b/board/ti/beagle/beagle.c @@ -40,11 +40,6 @@ #include "beagle.h" #include -#ifdef CONFIG_USB_EHCI_HCD -#include -#include -#endif - #define TWL4030_I2C_BUS 0 #define EXPANSION_EEPROM_I2C_BUS 1 #define EXPANSION_EEPROM_I2C_ADDRESS 0x50 @@ -297,33 +292,6 @@ static void beagle_dvi_pup(void) } #endif -#ifdef CONFIG_USB_MUSB_OMAP2PLUS -static struct musb_hdrc_config musb_config = { - .multipoint = 1, - .dyn_fifo = 1, - .num_eps = 16, - .ram_bits = 12, -}; - -static struct omap_musb_board_data musb_board_data = { - .interface_type = MUSB_INTERFACE_ULPI, -}; - -static struct musb_hdrc_platform_data musb_plat = { -#if defined(CONFIG_USB_MUSB_HOST) - .mode = MUSB_HOST, -#elif defined(CONFIG_USB_MUSB_GADGET) - .mode = MUSB_PERIPHERAL, -#else -#error "Please define either CONFIG_USB_MUSB_HOST or CONFIG_USB_MUSB_GADGET" -#endif - .config = &musb_config, - .power = 100, - .platform_ops = &omap2430_ops, - .board_data = &musb_board_data, -}; -#endif - /* * Routine: misc_init_r * Description: Configure board specific parts @@ -506,10 +474,6 @@ int misc_init_r(void) omap3_dss_enable(); #endif -#ifdef CONFIG_USB_MUSB_OMAP2PLUS - musb_register(&musb_plat, &musb_board_data, (void *)MUSB_BASE); -#endif - if (generate_fake_mac) omap_die_id_usbethaddr(); @@ -548,37 +512,3 @@ void board_mmc_power_init(void) twl4030_power_mmc_init(0); } #endif - -#if defined(CONFIG_USB_EHCI_HCD) && !defined(CONFIG_SPL_BUILD) -/* Call usb_stop() before starting the kernel */ -void show_boot_progress(int val) -{ - if (val == BOOTSTAGE_ID_RUN_OS) - usb_stop(); -} - -static struct omap_usbhs_board_data usbhs_bdata = { - .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY, - .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY, - .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED -}; - -int ehci_hcd_init(int index, enum usb_init_type init, - struct ehci_hccr **hccr, struct ehci_hcor **hcor) -{ - return omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor); -} - -int ehci_hcd_stop(int index) -{ - return omap_ehci_hcd_stop(); -} - -#endif /* CONFIG_USB_EHCI_HCD */ - -#if defined(CONFIG_USB_ETHER) && defined(CONFIG_USB_MUSB_GADGET) -int board_eth_init(bd_t *bis) -{ - return usb_eth_initialize(bis); -} -#endif diff --git a/configs/omap3_beagle_defconfig b/configs/omap3_beagle_defconfig index af5b8ea..b08ffc0 100644 --- a/configs/omap3_beagle_defconfig +++ b/configs/omap3_beagle_defconfig @@ -73,10 +73,13 @@ CONFIG_SYS_NAND_BUSWIDTH_16BIT=y CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000 CONFIG_SPL_NAND_SIMPLE=y +CONFIG_DM_ETH=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_OMAP3_SPI=y CONFIG_USB=y +CONFIG_DM_USB=y +# CONFIG_SPL_DM_USB is not set CONFIG_USB_EHCI_HCD=y CONFIG_USB_OMAP3=y CONFIG_USB_MUSB_GADGET=y -- cgit v1.1 From dde9da82d65c23e9bdc0d0293c762f86db9b63af Mon Sep 17 00:00:00 2001 From: Jan Kiszka Date: Wed, 1 Jul 2020 20:09:40 +0200 Subject: arm: k3: Consolidate and silence k3_fit_atf.sh call Buiding u-boot-spl-k3[_HS].its is currently unconditionally verbose about what it does. Change that by wrapping the call to k3_fit_atf.sh into a cmd, also using that chance to reduce duplicate lines of makefile code - only IS_HS=1 is different when CONFIG_TI_SECURE_DEVICE is on. Signed-off-by: Jan Kiszka Acked-by: Lokesh Vutla --- arch/arm/mach-k3/config.mk | 17 +++++++++-------- 1 file changed, 9 insertions(+), 8 deletions(-) diff --git a/arch/arm/mach-k3/config.mk b/arch/arm/mach-k3/config.mk index f6b63db..f7afef6 100644 --- a/arch/arm/mach-k3/config.mk +++ b/arch/arm/mach-k3/config.mk @@ -48,22 +48,23 @@ ALL-y += tiboot3.bin endif ifdef CONFIG_ARM64 + ifeq ($(CONFIG_TI_SECURE_DEVICE),y) SPL_ITS := u-boot-spl-k3_HS.its -$(SPL_ITS): FORCE - IS_HS=1 \ - $(srctree)/tools/k3_fit_atf.sh \ - $(patsubst %,$(obj)/dts/%.dtb,$(subst ",,$(CONFIG_SPL_OF_LIST))) > $@ - +$(SPL_ITS): export IS_HS=1 ALL-y += tispl.bin_HS else SPL_ITS := u-boot-spl-k3.its -$(SPL_ITS): FORCE +ALL-y += tispl.bin +endif + +quiet_cmd_k3_mkits = MKITS $@ +cmd_k3_mkits = \ $(srctree)/tools/k3_fit_atf.sh \ $(patsubst %,$(obj)/dts/%.dtb,$(subst ",,$(CONFIG_SPL_OF_LIST))) > $@ -ALL-y += tispl.bin -endif +$(SPL_ITS): FORCE + $(call cmd,k3_mkits) endif else -- cgit v1.1 From 82c829d476f6239ccedc0474bd01850022175125 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pali=20Roh=C3=A1r?= Date: Fri, 3 Jul 2020 22:58:23 +0200 Subject: mmc: omap_hsmmc: Set 3.3V for IO voltage on all places MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit In commit commit d2c05f50e12f ("mmc: omap_hsmmc: Set 3.3V for IO voltage") was changed 3.0V IO voltage to 3.3V but it was not done on all places in omap_hsmmc driver. That commit broke eMMC support on Nokia N900. This patch fixes that problematic commit and changes 3.0V to 3.3V on all remaining places in omap_hsmmc driver. Fixes: d2c05f50e12f ("mmc: omap_hsmmc: Set 3.3V for IO voltage") Signed-off-by: Pali Rohár Acked-by: Pavel Machek Reviewed-by: Faiz Abbas --- drivers/mmc/omap_hsmmc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mmc/omap_hsmmc.c b/drivers/mmc/omap_hsmmc.c index 0e05fe4..db1f851 100644 --- a/drivers/mmc/omap_hsmmc.c +++ b/drivers/mmc/omap_hsmmc.c @@ -843,7 +843,7 @@ static int omap_hsmmc_init_setup(struct mmc *mmc) omap_hsmmc_conf_bus_power(mmc, (reg_val & VS33_3V3SUP) ? MMC_SIGNAL_VOLTAGE_330 : MMC_SIGNAL_VOLTAGE_180); #else - writel(DTW_1_BITMODE | SDBP_PWROFF | SDVS_3V0, &mmc_base->hctl); + writel(DTW_1_BITMODE | SDBP_PWROFF | SDVS_3V3, &mmc_base->hctl); writel(readl(&mmc_base->capa) | VS33_3V3SUP | VS18_1V8SUP, &mmc_base->capa); #endif -- cgit v1.1 From 865fdfddce467f446b64f2aa7ba77f9dd0a48a6b Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Tue, 7 Jul 2020 14:25:15 +0200 Subject: arm: k3: use correct weak function name spl_board_prepare_for_linux Replace the function spl_board_prepare_for_boot_linux by the correct name of the weak function spl_board_prepare_for_linux defined in spl.h. Signed-off-by: Patrick Delaunay --- arch/arm/mach-k3/common.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-k3/common.c b/arch/arm/mach-k3/common.c index 9695b22..63bf060 100644 --- a/arch/arm/mach-k3/common.c +++ b/arch/arm/mach-k3/common.c @@ -440,7 +440,7 @@ void spl_board_prepare_for_boot(void) dcache_disable(); } -void spl_board_prepare_for_boot_linux(void) +void spl_board_prepare_for_linux(void) { dcache_disable(); } -- cgit v1.1