From 1c84cc6e3badb31e55bdf05ff2d3f8f058a5da47 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Fri, 4 Dec 2015 00:54:16 +0100 Subject: usb: s3c-otg: Rename regs-otg.h to s3c_udc_otg_regs.h Rename the header file, so it's obvious which driver it's part of. No functional change. Signed-off-by: Marek Vasut --- drivers/usb/gadget/regs-otg.h | 273 ---------------------------------- drivers/usb/gadget/s3c_udc_otg.c | 2 +- drivers/usb/gadget/s3c_udc_otg_phy.c | 2 +- drivers/usb/gadget/s3c_udc_otg_regs.h | 273 ++++++++++++++++++++++++++++++++++ 4 files changed, 275 insertions(+), 275 deletions(-) delete mode 100644 drivers/usb/gadget/regs-otg.h create mode 100644 drivers/usb/gadget/s3c_udc_otg_regs.h diff --git a/drivers/usb/gadget/regs-otg.h b/drivers/usb/gadget/regs-otg.h deleted file mode 100644 index ac5d112..0000000 --- a/drivers/usb/gadget/regs-otg.h +++ /dev/null @@ -1,273 +0,0 @@ -/* linux/arch/arm/plat-s3c/include/plat/regs-otg.h - * - * Copyright (C) 2004 Herbert Poetzl - * - * Registers remapping: - * Lukasz Majewski - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __ASM_ARCH_REGS_USB_OTG_HS_H -#define __ASM_ARCH_REGS_USB_OTG_HS_H - -/* USB2.0 OTG Controller register */ -struct s3c_usbotg_phy { - u32 phypwr; - u32 phyclk; - u32 rstcon; -}; - -/* Device Logical IN Endpoint-Specific Registers */ -struct s3c_dev_in_endp { - u32 diepctl; - u8 res1[4]; - u32 diepint; - u8 res2[4]; - u32 dieptsiz; - u32 diepdma; - u8 res3[4]; - u32 diepdmab; -}; - -/* Device Logical OUT Endpoint-Specific Registers */ -struct s3c_dev_out_endp { - u32 doepctl; - u8 res1[4]; - u32 doepint; - u8 res2[4]; - u32 doeptsiz; - u32 doepdma; - u8 res3[4]; - u32 doepdmab; -}; - -struct ep_fifo { - u32 fifo; - u8 res[4092]; -}; - -/* USB2.0 OTG Controller register */ -struct s3c_usbotg_reg { - /* Core Global Registers */ - u32 gotgctl; /* OTG Control & Status */ - u32 gotgint; /* OTG Interrupt */ - u32 gahbcfg; /* Core AHB Configuration */ - u32 gusbcfg; /* Core USB Configuration */ - u32 grstctl; /* Core Reset */ - u32 gintsts; /* Core Interrupt */ - u32 gintmsk; /* Core Interrupt Mask */ - u32 grxstsr; /* Receive Status Debug Read/Status Read */ - u32 grxstsp; /* Receive Status Debug Pop/Status Pop */ - u32 grxfsiz; /* Receive FIFO Size */ - u32 gnptxfsiz; /* Non-Periodic Transmit FIFO Size */ - u8 res1[216]; - u32 dieptxf[15]; /* Device Periodic Transmit FIFO size register */ - u8 res2[1728]; - /* Device Configuration */ - u32 dcfg; /* Device Configuration Register */ - u32 dctl; /* Device Control */ - u32 dsts; /* Device Status */ - u8 res3[4]; - u32 diepmsk; /* Device IN Endpoint Common Interrupt Mask */ - u32 doepmsk; /* Device OUT Endpoint Common Interrupt Mask */ - u32 daint; /* Device All Endpoints Interrupt */ - u32 daintmsk; /* Device All Endpoints Interrupt Mask */ - u8 res4[224]; - struct s3c_dev_in_endp in_endp[16]; - struct s3c_dev_out_endp out_endp[16]; - u8 res5[768]; - struct ep_fifo ep[16]; -}; - -/*===================================================================== */ -/*definitions related to CSR setting */ - -/* S3C_UDC_OTG_GOTGCTL */ -#define B_SESSION_VALID (0x1<<19) -#define A_SESSION_VALID (0x1<<18) - -/* S3C_UDC_OTG_GAHBCFG */ -#define PTXFE_HALF (0<<8) -#define PTXFE_ZERO (1<<8) -#define NPTXFE_HALF (0<<7) -#define NPTXFE_ZERO (1<<7) -#define MODE_SLAVE (0<<5) -#define MODE_DMA (1<<5) -#define BURST_SINGLE (0<<1) -#define BURST_INCR (1<<1) -#define BURST_INCR4 (3<<1) -#define BURST_INCR8 (5<<1) -#define BURST_INCR16 (7<<1) -#define GBL_INT_UNMASK (1<<0) -#define GBL_INT_MASK (0<<0) - -/* S3C_UDC_OTG_GRSTCTL */ -#define AHB_MASTER_IDLE (1u<<31) -#define CORE_SOFT_RESET (0x1<<0) - -/* S3C_UDC_OTG_GINTSTS/S3C_UDC_OTG_GINTMSK core interrupt register */ -#define INT_RESUME (1u<<31) -#define INT_DISCONN (0x1<<29) -#define INT_CONN_ID_STS_CNG (0x1<<28) -#define INT_OUT_EP (0x1<<19) -#define INT_IN_EP (0x1<<18) -#define INT_ENUMDONE (0x1<<13) -#define INT_RESET (0x1<<12) -#define INT_SUSPEND (0x1<<11) -#define INT_EARLY_SUSPEND (0x1<<10) -#define INT_NP_TX_FIFO_EMPTY (0x1<<5) -#define INT_RX_FIFO_NOT_EMPTY (0x1<<4) -#define INT_SOF (0x1<<3) -#define INT_DEV_MODE (0x0<<0) -#define INT_HOST_MODE (0x1<<1) -#define INT_GOUTNakEff (0x01<<7) -#define INT_GINNakEff (0x01<<6) - -#define FULL_SPEED_CONTROL_PKT_SIZE 8 -#define FULL_SPEED_BULK_PKT_SIZE 64 - -#define HIGH_SPEED_CONTROL_PKT_SIZE 64 -#define HIGH_SPEED_BULK_PKT_SIZE 512 - -#define RX_FIFO_SIZE (1024*4) -#define NPTX_FIFO_SIZE (1024*4) -#define PTX_FIFO_SIZE (1536*1) - -#define DEPCTL_TXFNUM_0 (0x0<<22) -#define DEPCTL_TXFNUM_1 (0x1<<22) -#define DEPCTL_TXFNUM_2 (0x2<<22) -#define DEPCTL_TXFNUM_3 (0x3<<22) -#define DEPCTL_TXFNUM_4 (0x4<<22) - -/* Enumeration speed */ -#define USB_HIGH_30_60MHZ (0x0<<1) -#define USB_FULL_30_60MHZ (0x1<<1) -#define USB_LOW_6MHZ (0x2<<1) -#define USB_FULL_48MHZ (0x3<<1) - -/* S3C_UDC_OTG_GRXSTSP STATUS */ -#define OUT_PKT_RECEIVED (0x2<<17) -#define OUT_TRANSFER_COMPLELTED (0x3<<17) -#define SETUP_TRANSACTION_COMPLETED (0x4<<17) -#define SETUP_PKT_RECEIVED (0x6<<17) -#define GLOBAL_OUT_NAK (0x1<<17) - -/* S3C_UDC_OTG_DCTL device control register */ -#define NORMAL_OPERATION (0x1<<0) -#define SOFT_DISCONNECT (0x1<<1) - -/* S3C_UDC_OTG_DAINT device all endpoint interrupt register */ -#define DAINT_OUT_BIT (16) -#define DAINT_MASK (0xFFFF) - -/* S3C_UDC_OTG_DIEPCTL0/DOEPCTL0 device - control IN/OUT endpoint 0 control register */ -#define DEPCTL_EPENA (0x1<<31) -#define DEPCTL_EPDIS (0x1<<30) -#define DEPCTL_SETD1PID (0x1<<29) -#define DEPCTL_SETD0PID (0x1<<28) -#define DEPCTL_SNAK (0x1<<27) -#define DEPCTL_CNAK (0x1<<26) -#define DEPCTL_STALL (0x1<<21) -#define DEPCTL_TYPE_BIT (18) -#define DEPCTL_TYPE_MASK (0x3<<18) -#define DEPCTL_CTRL_TYPE (0x0<<18) -#define DEPCTL_ISO_TYPE (0x1<<18) -#define DEPCTL_BULK_TYPE (0x2<<18) -#define DEPCTL_INTR_TYPE (0x3<<18) -#define DEPCTL_USBACTEP (0x1<<15) -#define DEPCTL_NEXT_EP_BIT (11) -#define DEPCTL_MPS_BIT (0) -#define DEPCTL_MPS_MASK (0x7FF) - -#define DEPCTL0_MPS_64 (0x0<<0) -#define DEPCTL0_MPS_32 (0x1<<0) -#define DEPCTL0_MPS_16 (0x2<<0) -#define DEPCTL0_MPS_8 (0x3<<0) -#define DEPCTL_MPS_BULK_512 (512<<0) -#define DEPCTL_MPS_INT_MPS_16 (16<<0) - -#define DIEPCTL0_NEXT_EP_BIT (11) - - -/* S3C_UDC_OTG_DIEPMSK/DOEPMSK device IN/OUT endpoint - common interrupt mask register */ -/* S3C_UDC_OTG_DIEPINTn/DOEPINTn device IN/OUT endpoint interrupt register */ -#define BACK2BACK_SETUP_RECEIVED (0x1<<6) -#define INTKNEPMIS (0x1<<5) -#define INTKN_TXFEMP (0x1<<4) -#define NON_ISO_IN_EP_TIMEOUT (0x1<<3) -#define CTRL_OUT_EP_SETUP_PHASE_DONE (0x1<<3) -#define AHB_ERROR (0x1<<2) -#define EPDISBLD (0x1<<1) -#define TRANSFER_DONE (0x1<<0) - -#define USB_PHY_CTRL_EN0 (0x1 << 0) - -/* OPHYPWR */ -#define PHY_0_SLEEP (0x1 << 5) -#define OTG_DISABLE_0 (0x1 << 4) -#define ANALOG_PWRDOWN (0x1 << 3) -#define FORCE_SUSPEND_0 (0x1 << 0) - -/* URSTCON */ -#define HOST_SW_RST (0x1 << 4) -#define PHY_SW_RST1 (0x1 << 3) -#define PHYLNK_SW_RST (0x1 << 2) -#define LINK_SW_RST (0x1 << 1) -#define PHY_SW_RST0 (0x1 << 0) - -/* OPHYCLK */ -#define COMMON_ON_N1 (0x1 << 7) -#define COMMON_ON_N0 (0x1 << 4) -#define ID_PULLUP0 (0x1 << 2) -#define CLK_SEL_24MHZ (0x3 << 0) -#define CLK_SEL_12MHZ (0x2 << 0) -#define CLK_SEL_48MHZ (0x0 << 0) - -#define EXYNOS4X12_ID_PULLUP0 (0x01 << 3) -#define EXYNOS4X12_COMMON_ON_N0 (0x01 << 4) -#define EXYNOS4X12_CLK_SEL_12MHZ (0x02 << 0) -#define EXYNOS4X12_CLK_SEL_24MHZ (0x05 << 0) - -/* Device Configuration Register DCFG */ -#define DEV_SPEED_HIGH_SPEED_20 (0x0 << 0) -#define DEV_SPEED_FULL_SPEED_20 (0x1 << 0) -#define DEV_SPEED_LOW_SPEED_11 (0x2 << 0) -#define DEV_SPEED_FULL_SPEED_11 (0x3 << 0) -#define EP_MISS_CNT(x) (x << 18) -#define DEVICE_ADDRESS(x) (x << 4) - -/* Core Reset Register (GRSTCTL) */ -#define TX_FIFO_FLUSH (0x1 << 5) -#define RX_FIFO_FLUSH (0x1 << 4) -#define TX_FIFO_NUMBER(x) (x << 6) -#define TX_FIFO_FLUSH_ALL TX_FIFO_NUMBER(0x10) - -/* Masks definitions */ -#define GINTMSK_INIT (INT_OUT_EP | INT_IN_EP | INT_RESUME | INT_ENUMDONE\ - | INT_RESET | INT_SUSPEND) -#define DOEPMSK_INIT (CTRL_OUT_EP_SETUP_PHASE_DONE | AHB_ERROR|TRANSFER_DONE) -#define DIEPMSK_INIT (NON_ISO_IN_EP_TIMEOUT|AHB_ERROR|TRANSFER_DONE) -#define GAHBCFG_INIT (PTXFE_HALF | NPTXFE_HALF | MODE_DMA | BURST_INCR4\ - | GBL_INT_UNMASK) - -/* Device Endpoint X Transfer Size Register (DIEPTSIZX) */ -#define DIEPT_SIZ_PKT_CNT(x) (x << 19) -#define DIEPT_SIZ_XFER_SIZE(x) (x << 0) - -/* Device OUT Endpoint X Transfer Size Register (DOEPTSIZX) */ -#define DOEPT_SIZ_PKT_CNT(x) (x << 19) -#define DOEPT_SIZ_XFER_SIZE(x) (x << 0) -#define DOEPT_SIZ_XFER_SIZE_MAX_EP0 (0x7F << 0) -#define DOEPT_SIZ_XFER_SIZE_MAX_EP (0x7FFF << 0) - -/* Device Endpoint-N Control Register (DIEPCTLn/DOEPCTLn) */ -#define DIEPCTL_TX_FIFO_NUM(x) (x << 22) -#define DIEPCTL_TX_FIFO_NUM_MASK (~DIEPCTL_TX_FIFO_NUM(0xF)) - -/* Device ALL Endpoints Interrupt Register (DAINT) */ -#define DAINT_IN_EP_INT(x) (x << 0) -#define DAINT_OUT_EP_INT(x) (x << 16) -#endif diff --git a/drivers/usb/gadget/s3c_udc_otg.c b/drivers/usb/gadget/s3c_udc_otg.c index 7a2d1e7..184ff4e 100644 --- a/drivers/usb/gadget/s3c_udc_otg.c +++ b/drivers/usb/gadget/s3c_udc_otg.c @@ -32,7 +32,7 @@ #include -#include "regs-otg.h" +#include "s3c_udc_otg_regs.h" #include /***********************************************************/ diff --git a/drivers/usb/gadget/s3c_udc_otg_phy.c b/drivers/usb/gadget/s3c_udc_otg_phy.c index f13cb89..963b617 100644 --- a/drivers/usb/gadget/s3c_udc_otg_phy.c +++ b/drivers/usb/gadget/s3c_udc_otg_phy.c @@ -32,7 +32,7 @@ #include -#include "regs-otg.h" +#include "s3c_udc_otg_regs.h" #include #include diff --git a/drivers/usb/gadget/s3c_udc_otg_regs.h b/drivers/usb/gadget/s3c_udc_otg_regs.h new file mode 100644 index 0000000..ac5d112 --- /dev/null +++ b/drivers/usb/gadget/s3c_udc_otg_regs.h @@ -0,0 +1,273 @@ +/* linux/arch/arm/plat-s3c/include/plat/regs-otg.h + * + * Copyright (C) 2004 Herbert Poetzl + * + * Registers remapping: + * Lukasz Majewski + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __ASM_ARCH_REGS_USB_OTG_HS_H +#define __ASM_ARCH_REGS_USB_OTG_HS_H + +/* USB2.0 OTG Controller register */ +struct s3c_usbotg_phy { + u32 phypwr; + u32 phyclk; + u32 rstcon; +}; + +/* Device Logical IN Endpoint-Specific Registers */ +struct s3c_dev_in_endp { + u32 diepctl; + u8 res1[4]; + u32 diepint; + u8 res2[4]; + u32 dieptsiz; + u32 diepdma; + u8 res3[4]; + u32 diepdmab; +}; + +/* Device Logical OUT Endpoint-Specific Registers */ +struct s3c_dev_out_endp { + u32 doepctl; + u8 res1[4]; + u32 doepint; + u8 res2[4]; + u32 doeptsiz; + u32 doepdma; + u8 res3[4]; + u32 doepdmab; +}; + +struct ep_fifo { + u32 fifo; + u8 res[4092]; +}; + +/* USB2.0 OTG Controller register */ +struct s3c_usbotg_reg { + /* Core Global Registers */ + u32 gotgctl; /* OTG Control & Status */ + u32 gotgint; /* OTG Interrupt */ + u32 gahbcfg; /* Core AHB Configuration */ + u32 gusbcfg; /* Core USB Configuration */ + u32 grstctl; /* Core Reset */ + u32 gintsts; /* Core Interrupt */ + u32 gintmsk; /* Core Interrupt Mask */ + u32 grxstsr; /* Receive Status Debug Read/Status Read */ + u32 grxstsp; /* Receive Status Debug Pop/Status Pop */ + u32 grxfsiz; /* Receive FIFO Size */ + u32 gnptxfsiz; /* Non-Periodic Transmit FIFO Size */ + u8 res1[216]; + u32 dieptxf[15]; /* Device Periodic Transmit FIFO size register */ + u8 res2[1728]; + /* Device Configuration */ + u32 dcfg; /* Device Configuration Register */ + u32 dctl; /* Device Control */ + u32 dsts; /* Device Status */ + u8 res3[4]; + u32 diepmsk; /* Device IN Endpoint Common Interrupt Mask */ + u32 doepmsk; /* Device OUT Endpoint Common Interrupt Mask */ + u32 daint; /* Device All Endpoints Interrupt */ + u32 daintmsk; /* Device All Endpoints Interrupt Mask */ + u8 res4[224]; + struct s3c_dev_in_endp in_endp[16]; + struct s3c_dev_out_endp out_endp[16]; + u8 res5[768]; + struct ep_fifo ep[16]; +}; + +/*===================================================================== */ +/*definitions related to CSR setting */ + +/* S3C_UDC_OTG_GOTGCTL */ +#define B_SESSION_VALID (0x1<<19) +#define A_SESSION_VALID (0x1<<18) + +/* S3C_UDC_OTG_GAHBCFG */ +#define PTXFE_HALF (0<<8) +#define PTXFE_ZERO (1<<8) +#define NPTXFE_HALF (0<<7) +#define NPTXFE_ZERO (1<<7) +#define MODE_SLAVE (0<<5) +#define MODE_DMA (1<<5) +#define BURST_SINGLE (0<<1) +#define BURST_INCR (1<<1) +#define BURST_INCR4 (3<<1) +#define BURST_INCR8 (5<<1) +#define BURST_INCR16 (7<<1) +#define GBL_INT_UNMASK (1<<0) +#define GBL_INT_MASK (0<<0) + +/* S3C_UDC_OTG_GRSTCTL */ +#define AHB_MASTER_IDLE (1u<<31) +#define CORE_SOFT_RESET (0x1<<0) + +/* S3C_UDC_OTG_GINTSTS/S3C_UDC_OTG_GINTMSK core interrupt register */ +#define INT_RESUME (1u<<31) +#define INT_DISCONN (0x1<<29) +#define INT_CONN_ID_STS_CNG (0x1<<28) +#define INT_OUT_EP (0x1<<19) +#define INT_IN_EP (0x1<<18) +#define INT_ENUMDONE (0x1<<13) +#define INT_RESET (0x1<<12) +#define INT_SUSPEND (0x1<<11) +#define INT_EARLY_SUSPEND (0x1<<10) +#define INT_NP_TX_FIFO_EMPTY (0x1<<5) +#define INT_RX_FIFO_NOT_EMPTY (0x1<<4) +#define INT_SOF (0x1<<3) +#define INT_DEV_MODE (0x0<<0) +#define INT_HOST_MODE (0x1<<1) +#define INT_GOUTNakEff (0x01<<7) +#define INT_GINNakEff (0x01<<6) + +#define FULL_SPEED_CONTROL_PKT_SIZE 8 +#define FULL_SPEED_BULK_PKT_SIZE 64 + +#define HIGH_SPEED_CONTROL_PKT_SIZE 64 +#define HIGH_SPEED_BULK_PKT_SIZE 512 + +#define RX_FIFO_SIZE (1024*4) +#define NPTX_FIFO_SIZE (1024*4) +#define PTX_FIFO_SIZE (1536*1) + +#define DEPCTL_TXFNUM_0 (0x0<<22) +#define DEPCTL_TXFNUM_1 (0x1<<22) +#define DEPCTL_TXFNUM_2 (0x2<<22) +#define DEPCTL_TXFNUM_3 (0x3<<22) +#define DEPCTL_TXFNUM_4 (0x4<<22) + +/* Enumeration speed */ +#define USB_HIGH_30_60MHZ (0x0<<1) +#define USB_FULL_30_60MHZ (0x1<<1) +#define USB_LOW_6MHZ (0x2<<1) +#define USB_FULL_48MHZ (0x3<<1) + +/* S3C_UDC_OTG_GRXSTSP STATUS */ +#define OUT_PKT_RECEIVED (0x2<<17) +#define OUT_TRANSFER_COMPLELTED (0x3<<17) +#define SETUP_TRANSACTION_COMPLETED (0x4<<17) +#define SETUP_PKT_RECEIVED (0x6<<17) +#define GLOBAL_OUT_NAK (0x1<<17) + +/* S3C_UDC_OTG_DCTL device control register */ +#define NORMAL_OPERATION (0x1<<0) +#define SOFT_DISCONNECT (0x1<<1) + +/* S3C_UDC_OTG_DAINT device all endpoint interrupt register */ +#define DAINT_OUT_BIT (16) +#define DAINT_MASK (0xFFFF) + +/* S3C_UDC_OTG_DIEPCTL0/DOEPCTL0 device + control IN/OUT endpoint 0 control register */ +#define DEPCTL_EPENA (0x1<<31) +#define DEPCTL_EPDIS (0x1<<30) +#define DEPCTL_SETD1PID (0x1<<29) +#define DEPCTL_SETD0PID (0x1<<28) +#define DEPCTL_SNAK (0x1<<27) +#define DEPCTL_CNAK (0x1<<26) +#define DEPCTL_STALL (0x1<<21) +#define DEPCTL_TYPE_BIT (18) +#define DEPCTL_TYPE_MASK (0x3<<18) +#define DEPCTL_CTRL_TYPE (0x0<<18) +#define DEPCTL_ISO_TYPE (0x1<<18) +#define DEPCTL_BULK_TYPE (0x2<<18) +#define DEPCTL_INTR_TYPE (0x3<<18) +#define DEPCTL_USBACTEP (0x1<<15) +#define DEPCTL_NEXT_EP_BIT (11) +#define DEPCTL_MPS_BIT (0) +#define DEPCTL_MPS_MASK (0x7FF) + +#define DEPCTL0_MPS_64 (0x0<<0) +#define DEPCTL0_MPS_32 (0x1<<0) +#define DEPCTL0_MPS_16 (0x2<<0) +#define DEPCTL0_MPS_8 (0x3<<0) +#define DEPCTL_MPS_BULK_512 (512<<0) +#define DEPCTL_MPS_INT_MPS_16 (16<<0) + +#define DIEPCTL0_NEXT_EP_BIT (11) + + +/* S3C_UDC_OTG_DIEPMSK/DOEPMSK device IN/OUT endpoint + common interrupt mask register */ +/* S3C_UDC_OTG_DIEPINTn/DOEPINTn device IN/OUT endpoint interrupt register */ +#define BACK2BACK_SETUP_RECEIVED (0x1<<6) +#define INTKNEPMIS (0x1<<5) +#define INTKN_TXFEMP (0x1<<4) +#define NON_ISO_IN_EP_TIMEOUT (0x1<<3) +#define CTRL_OUT_EP_SETUP_PHASE_DONE (0x1<<3) +#define AHB_ERROR (0x1<<2) +#define EPDISBLD (0x1<<1) +#define TRANSFER_DONE (0x1<<0) + +#define USB_PHY_CTRL_EN0 (0x1 << 0) + +/* OPHYPWR */ +#define PHY_0_SLEEP (0x1 << 5) +#define OTG_DISABLE_0 (0x1 << 4) +#define ANALOG_PWRDOWN (0x1 << 3) +#define FORCE_SUSPEND_0 (0x1 << 0) + +/* URSTCON */ +#define HOST_SW_RST (0x1 << 4) +#define PHY_SW_RST1 (0x1 << 3) +#define PHYLNK_SW_RST (0x1 << 2) +#define LINK_SW_RST (0x1 << 1) +#define PHY_SW_RST0 (0x1 << 0) + +/* OPHYCLK */ +#define COMMON_ON_N1 (0x1 << 7) +#define COMMON_ON_N0 (0x1 << 4) +#define ID_PULLUP0 (0x1 << 2) +#define CLK_SEL_24MHZ (0x3 << 0) +#define CLK_SEL_12MHZ (0x2 << 0) +#define CLK_SEL_48MHZ (0x0 << 0) + +#define EXYNOS4X12_ID_PULLUP0 (0x01 << 3) +#define EXYNOS4X12_COMMON_ON_N0 (0x01 << 4) +#define EXYNOS4X12_CLK_SEL_12MHZ (0x02 << 0) +#define EXYNOS4X12_CLK_SEL_24MHZ (0x05 << 0) + +/* Device Configuration Register DCFG */ +#define DEV_SPEED_HIGH_SPEED_20 (0x0 << 0) +#define DEV_SPEED_FULL_SPEED_20 (0x1 << 0) +#define DEV_SPEED_LOW_SPEED_11 (0x2 << 0) +#define DEV_SPEED_FULL_SPEED_11 (0x3 << 0) +#define EP_MISS_CNT(x) (x << 18) +#define DEVICE_ADDRESS(x) (x << 4) + +/* Core Reset Register (GRSTCTL) */ +#define TX_FIFO_FLUSH (0x1 << 5) +#define RX_FIFO_FLUSH (0x1 << 4) +#define TX_FIFO_NUMBER(x) (x << 6) +#define TX_FIFO_FLUSH_ALL TX_FIFO_NUMBER(0x10) + +/* Masks definitions */ +#define GINTMSK_INIT (INT_OUT_EP | INT_IN_EP | INT_RESUME | INT_ENUMDONE\ + | INT_RESET | INT_SUSPEND) +#define DOEPMSK_INIT (CTRL_OUT_EP_SETUP_PHASE_DONE | AHB_ERROR|TRANSFER_DONE) +#define DIEPMSK_INIT (NON_ISO_IN_EP_TIMEOUT|AHB_ERROR|TRANSFER_DONE) +#define GAHBCFG_INIT (PTXFE_HALF | NPTXFE_HALF | MODE_DMA | BURST_INCR4\ + | GBL_INT_UNMASK) + +/* Device Endpoint X Transfer Size Register (DIEPTSIZX) */ +#define DIEPT_SIZ_PKT_CNT(x) (x << 19) +#define DIEPT_SIZ_XFER_SIZE(x) (x << 0) + +/* Device OUT Endpoint X Transfer Size Register (DOEPTSIZX) */ +#define DOEPT_SIZ_PKT_CNT(x) (x << 19) +#define DOEPT_SIZ_XFER_SIZE(x) (x << 0) +#define DOEPT_SIZ_XFER_SIZE_MAX_EP0 (0x7F << 0) +#define DOEPT_SIZ_XFER_SIZE_MAX_EP (0x7FFF << 0) + +/* Device Endpoint-N Control Register (DIEPCTLn/DOEPCTLn) */ +#define DIEPCTL_TX_FIFO_NUM(x) (x << 22) +#define DIEPCTL_TX_FIFO_NUM_MASK (~DIEPCTL_TX_FIFO_NUM(0xF)) + +/* Device ALL Endpoints Interrupt Register (DAINT) */ +#define DAINT_IN_EP_INT(x) (x << 0) +#define DAINT_OUT_EP_INT(x) (x << 16) +#endif -- cgit v1.1 From b4d5cf0bc8f9d39c0674c87c610d95d3445a3434 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Fri, 4 Dec 2015 00:57:58 +0100 Subject: usb: s3c-otg: Rename struct s3c_udc to dwc2_udc The driver is actually for the Designware DWC2 controller. This patch renames struct s3c_udc to struct dwc2_udc to make things more obvious and clear. Signed-off-by: Marek Vasut --- drivers/usb/gadget/bcm_udc_otg_phy.c | 4 +-- drivers/usb/gadget/s3c_udc_otg.c | 46 +++++++++++++++---------------- drivers/usb/gadget/s3c_udc_otg_phy.c | 4 +-- drivers/usb/gadget/s3c_udc_otg_xfer_dma.c | 38 ++++++++++++------------- include/usb/s3c_udc.h | 10 +++---- 5 files changed, 51 insertions(+), 51 deletions(-) diff --git a/drivers/usb/gadget/bcm_udc_otg_phy.c b/drivers/usb/gadget/bcm_udc_otg_phy.c index f8690b0..936247e 100644 --- a/drivers/usb/gadget/bcm_udc_otg_phy.c +++ b/drivers/usb/gadget/bcm_udc_otg_phy.c @@ -12,7 +12,7 @@ #include #include "bcm_udc_otg.h" -void otg_phy_init(struct s3c_udc *dev) +void otg_phy_init(struct dwc2_udc *dev) { /* set Phy to driving mode */ wfld_clear(HSOTG_CTRL_BASE_ADDR + HSOTG_CTRL_PHY_P1CTL_OFFSET, @@ -37,7 +37,7 @@ void otg_phy_init(struct s3c_udc *dev) HSOTG_CTRL_PHY_P1CTL_SOFT_RESET_MASK); } -void otg_phy_off(struct s3c_udc *dev) +void otg_phy_off(struct dwc2_udc *dev) { /* Soft Disconnect */ wfld_set(HSOTG_BASE_ADDR + HSOTG_DCTL_OFFSET, diff --git a/drivers/usb/gadget/s3c_udc_otg.c b/drivers/usb/gadget/s3c_udc_otg.c index 184ff4e..eb7f77e 100644 --- a/drivers/usb/gadget/s3c_udc_otg.c +++ b/drivers/usb/gadget/s3c_udc_otg.c @@ -65,7 +65,7 @@ static char *state_names[] = { #define DRIVER_DESC "S3C HS USB OTG Device Driver, (c) Samsung Electronics" #define DRIVER_VERSION "15 March 2009" -struct s3c_udc *the_controller; +struct dwc2_udc *the_controller; static const char driver_name[] = "s3c-udc"; static const char driver_desc[] = DRIVER_DESC; @@ -94,18 +94,18 @@ static int s3c_queue(struct usb_ep *ep, struct usb_request *, gfp_t gfp_flags); static int s3c_dequeue(struct usb_ep *ep, struct usb_request *); static int s3c_fifo_status(struct usb_ep *ep); static void s3c_fifo_flush(struct usb_ep *ep); -static void s3c_ep0_read(struct s3c_udc *dev); -static void s3c_ep0_kick(struct s3c_udc *dev, struct s3c_ep *ep); -static void s3c_handle_ep0(struct s3c_udc *dev); -static int s3c_ep0_write(struct s3c_udc *dev); +static void s3c_ep0_read(struct dwc2_udc *dev); +static void s3c_ep0_kick(struct dwc2_udc *dev, struct s3c_ep *ep); +static void s3c_handle_ep0(struct dwc2_udc *dev); +static int s3c_ep0_write(struct dwc2_udc *dev); static int write_fifo_ep0(struct s3c_ep *ep, struct s3c_request *req); static void done(struct s3c_ep *ep, struct s3c_request *req, int status); -static void stop_activity(struct s3c_udc *dev, +static void stop_activity(struct dwc2_udc *dev, struct usb_gadget_driver *driver); -static int udc_enable(struct s3c_udc *dev); -static void udc_set_address(struct s3c_udc *dev, unsigned char address); -static void reconfig_usbd(struct s3c_udc *dev); -static void set_max_pktsize(struct s3c_udc *dev, enum usb_device_speed speed); +static int udc_enable(struct dwc2_udc *dev); +static void udc_set_address(struct dwc2_udc *dev, unsigned char address); +static void reconfig_usbd(struct dwc2_udc *dev); +static void set_max_pktsize(struct dwc2_udc *dev, enum usb_device_speed speed); static void nuke(struct s3c_ep *ep, int status); static int s3c_udc_set_halt(struct usb_ep *_ep, int value); static void s3c_udc_set_nak(struct s3c_ep *ep); @@ -151,8 +151,8 @@ bool dfu_usb_get_reset(void) return !!(readl(®->gintsts) & INT_RESET); } -__weak void otg_phy_init(struct s3c_udc *dev) {} -__weak void otg_phy_off(struct s3c_udc *dev) {} +__weak void otg_phy_init(struct dwc2_udc *dev) {} +__weak void otg_phy_off(struct dwc2_udc *dev) {} /***********************************************************/ @@ -161,7 +161,7 @@ __weak void otg_phy_off(struct s3c_udc *dev) {} /* * udc_disable - disable USB device controller */ -static void udc_disable(struct s3c_udc *dev) +static void udc_disable(struct dwc2_udc *dev) { debug_cond(DEBUG_SETUP != 0, "%s: %p\n", __func__, dev); @@ -177,7 +177,7 @@ static void udc_disable(struct s3c_udc *dev) /* * udc_reinit - initialize software state */ -static void udc_reinit(struct s3c_udc *dev) +static void udc_reinit(struct dwc2_udc *dev) { unsigned int i; @@ -210,7 +210,7 @@ static void udc_reinit(struct s3c_udc *dev) /* until it's enabled, this UDC should be completely invisible * to any USB host. */ -static int udc_enable(struct s3c_udc *dev) +static int udc_enable(struct dwc2_udc *dev) { debug_cond(DEBUG_SETUP != 0, "%s: %p\n", __func__, dev); @@ -231,7 +231,7 @@ static int udc_enable(struct s3c_udc *dev) */ int usb_gadget_register_driver(struct usb_gadget_driver *driver) { - struct s3c_udc *dev = the_controller; + struct dwc2_udc *dev = the_controller; int retval = 0; unsigned long flags = 0; @@ -280,7 +280,7 @@ int usb_gadget_register_driver(struct usb_gadget_driver *driver) */ int usb_gadget_unregister_driver(struct usb_gadget_driver *driver) { - struct s3c_udc *dev = the_controller; + struct dwc2_udc *dev = the_controller; unsigned long flags = 0; if (!dev) @@ -368,7 +368,7 @@ static void nuke(struct s3c_ep *ep, int status) } } -static void stop_activity(struct s3c_udc *dev, +static void stop_activity(struct dwc2_udc *dev, struct usb_gadget_driver *driver) { int i; @@ -396,7 +396,7 @@ static void stop_activity(struct s3c_udc *dev, udc_reinit(dev); } -static void reconfig_usbd(struct s3c_udc *dev) +static void reconfig_usbd(struct dwc2_udc *dev) { /* 2. Soft-reset OTG Core and then unreset again. */ int i; @@ -496,7 +496,7 @@ static void reconfig_usbd(struct s3c_udc *dev) writel(GAHBCFG_INIT, ®->gahbcfg); } -static void set_max_pktsize(struct s3c_udc *dev, enum usb_device_speed speed) +static void set_max_pktsize(struct dwc2_udc *dev, enum usb_device_speed speed) { unsigned int ep_ctrl; int i; @@ -530,7 +530,7 @@ static int s3c_ep_enable(struct usb_ep *_ep, const struct usb_endpoint_descriptor *desc) { struct s3c_ep *ep; - struct s3c_udc *dev; + struct dwc2_udc *dev; unsigned long flags = 0; debug("%s: %p\n", __func__, _ep); @@ -722,7 +722,7 @@ static const struct usb_gadget_ops s3c_udc_ops = { /* current versions must always be self-powered */ }; -static struct s3c_udc memory = { +static struct dwc2_udc memory = { .usb_address = 0, .gadget = { .ops = &s3c_udc_ops, @@ -798,7 +798,7 @@ static struct s3c_udc memory = { int s3c_udc_probe(struct s3c_plat_otg_data *pdata) { - struct s3c_udc *dev = &memory; + struct dwc2_udc *dev = &memory; int retval = 0; debug("%s: %p\n", __func__, pdata); diff --git a/drivers/usb/gadget/s3c_udc_otg_phy.c b/drivers/usb/gadget/s3c_udc_otg_phy.c index 963b617..ffc930c 100644 --- a/drivers/usb/gadget/s3c_udc_otg_phy.c +++ b/drivers/usb/gadget/s3c_udc_otg_phy.c @@ -37,7 +37,7 @@ #include -void otg_phy_init(struct s3c_udc *dev) +void otg_phy_init(struct dwc2_udc *dev) { unsigned int usb_phy_ctrl = dev->pdata->usb_phy_ctrl; struct s3c_usbotg_phy *phy = @@ -75,7 +75,7 @@ void otg_phy_init(struct s3c_udc *dev) udelay(10); } -void otg_phy_off(struct s3c_udc *dev) +void otg_phy_off(struct dwc2_udc *dev) { unsigned int usb_phy_ctrl = dev->pdata->usb_phy_ctrl; struct s3c_usbotg_phy *phy = diff --git a/drivers/usb/gadget/s3c_udc_otg_xfer_dma.c b/drivers/usb/gadget/s3c_udc_otg_xfer_dma.c index 7e7a2c2..6695444 100644 --- a/drivers/usb/gadget/s3c_udc_otg_xfer_dma.c +++ b/drivers/usb/gadget/s3c_udc_otg_xfer_dma.c @@ -25,7 +25,7 @@ int clear_feature_flag; #define GET_MAX_LUN_REQUEST 0xFE #define BOT_RESET_REQUEST 0xFF -static inline void s3c_udc_ep0_zlp(struct s3c_udc *dev) +static inline void s3c_udc_ep0_zlp(struct dwc2_udc *dev) { u32 ep_ctrl; @@ -186,7 +186,7 @@ int setdma_tx(struct s3c_ep *ep, struct s3c_request *req) return length; } -static void complete_rx(struct s3c_udc *dev, u8 ep_num) +static void complete_rx(struct dwc2_udc *dev, u8 ep_num) { struct s3c_ep *ep = &dev->ep[ep_num]; struct s3c_request *req = NULL; @@ -259,7 +259,7 @@ static void complete_rx(struct s3c_udc *dev, u8 ep_num) setdma_rx(ep, req); } -static void complete_tx(struct s3c_udc *dev, u8 ep_num) +static void complete_tx(struct dwc2_udc *dev, u8 ep_num) { struct s3c_ep *ep = &dev->ep[ep_num]; struct s3c_request *req; @@ -335,7 +335,7 @@ static void complete_tx(struct s3c_udc *dev, u8 ep_num) } } -static inline void s3c_udc_check_tx_queue(struct s3c_udc *dev, u8 ep_num) +static inline void s3c_udc_check_tx_queue(struct dwc2_udc *dev, u8 ep_num) { struct s3c_ep *ep = &dev->ep[ep_num]; struct s3c_request *req; @@ -362,7 +362,7 @@ static inline void s3c_udc_check_tx_queue(struct s3c_udc *dev, u8 ep_num) } -static void process_ep_in_intr(struct s3c_udc *dev) +static void process_ep_in_intr(struct dwc2_udc *dev) { u32 ep_intr, ep_intr_status; u8 ep_num = 0; @@ -409,7 +409,7 @@ static void process_ep_in_intr(struct s3c_udc *dev) } } -static void process_ep_out_intr(struct s3c_udc *dev) +static void process_ep_out_intr(struct dwc2_udc *dev) { u32 ep_intr, ep_intr_status; u8 ep_num = 0; @@ -463,7 +463,7 @@ static void process_ep_out_intr(struct s3c_udc *dev) */ static int s3c_udc_irq(int irq, void *_dev) { - struct s3c_udc *dev = _dev; + struct dwc2_udc *dev = _dev; u32 intr_status; u32 usb_status, gintmsk; unsigned long flags = 0; @@ -584,7 +584,7 @@ static int s3c_queue(struct usb_ep *_ep, struct usb_request *_req, { struct s3c_request *req; struct s3c_ep *ep; - struct s3c_udc *dev; + struct dwc2_udc *dev; unsigned long flags = 0; u32 ep_num, gintsts; @@ -737,7 +737,7 @@ int s3c_fifo_read(struct s3c_ep *ep, u32 *cp, int max) * Called from control endpoint function * after it decodes a set address setup packet. */ -static void udc_set_address(struct s3c_udc *dev, unsigned char address) +static void udc_set_address(struct dwc2_udc *dev, unsigned char address) { u32 ctrl = readl(®->dcfg); writel(DEVICE_ADDRESS(address) | ctrl, ®->dcfg); @@ -753,7 +753,7 @@ static void udc_set_address(struct s3c_udc *dev, unsigned char address) static inline void s3c_udc_ep0_set_stall(struct s3c_ep *ep) { - struct s3c_udc *dev; + struct dwc2_udc *dev; u32 ep_ctrl = 0; dev = ep->dev; @@ -779,7 +779,7 @@ static inline void s3c_udc_ep0_set_stall(struct s3c_ep *ep) s3c_udc_pre_setup(); } -static void s3c_ep0_read(struct s3c_udc *dev) +static void s3c_ep0_read(struct dwc2_udc *dev) { struct s3c_request *req; struct s3c_ep *ep = &dev->ep[0]; @@ -816,7 +816,7 @@ static void s3c_ep0_read(struct s3c_udc *dev) /* * DATA_STATE_XMIT */ -static int s3c_ep0_write(struct s3c_udc *dev) +static int s3c_ep0_write(struct dwc2_udc *dev) { struct s3c_request *req; struct s3c_ep *ep = &dev->ep[0]; @@ -859,7 +859,7 @@ static int s3c_ep0_write(struct s3c_udc *dev) return 1; } -int s3c_udc_get_status(struct s3c_udc *dev, +int s3c_udc_get_status(struct dwc2_udc *dev, struct usb_ctrlrequest *crq) { u8 ep_num = crq->wIndex & 0x7F; @@ -1032,7 +1032,7 @@ void s3c_udc_ep_clear_stall(struct s3c_ep *ep) static int s3c_udc_set_halt(struct usb_ep *_ep, int value) { struct s3c_ep *ep; - struct s3c_udc *dev; + struct dwc2_udc *dev; unsigned long flags = 0; u8 ep_num; @@ -1125,7 +1125,7 @@ void s3c_udc_ep_activate(struct s3c_ep *ep) static int s3c_udc_clear_feature(struct usb_ep *_ep) { - struct s3c_udc *dev; + struct dwc2_udc *dev; struct s3c_ep *ep; u8 ep_num; @@ -1189,7 +1189,7 @@ static int s3c_udc_clear_feature(struct usb_ep *_ep) static int s3c_udc_set_feature(struct usb_ep *_ep) { - struct s3c_udc *dev; + struct dwc2_udc *dev; struct s3c_ep *ep; u8 ep_num; @@ -1262,7 +1262,7 @@ static int s3c_udc_set_feature(struct usb_ep *_ep) /* * WAIT_FOR_SETUP (OUT_PKT_RDY) */ -void s3c_ep0_setup(struct s3c_udc *dev) +void s3c_ep0_setup(struct dwc2_udc *dev) { struct s3c_ep *ep = &dev->ep[0]; int i; @@ -1451,7 +1451,7 @@ void s3c_ep0_setup(struct s3c_udc *dev) /* * handle ep0 interrupt */ -static void s3c_handle_ep0(struct s3c_udc *dev) +static void s3c_handle_ep0(struct dwc2_udc *dev) { if (dev->ep0state == WAIT_FOR_SETUP) { debug_cond(DEBUG_OUT_EP != 0, @@ -1465,7 +1465,7 @@ static void s3c_handle_ep0(struct s3c_udc *dev) } } -static void s3c_ep0_kick(struct s3c_udc *dev, struct s3c_ep *ep) +static void s3c_ep0_kick(struct dwc2_udc *dev, struct s3c_ep *ep) { debug_cond(DEBUG_EP0 != 0, "%s: ep_is_in = %d\n", __func__, ep_is_in(ep)); diff --git a/include/usb/s3c_udc.h b/include/usb/s3c_udc.h index 7f49a4e..f6c3a86 100644 --- a/include/usb/s3c_udc.h +++ b/include/usb/s3c_udc.h @@ -55,7 +55,7 @@ enum ep_type { struct s3c_ep { struct usb_ep ep; - struct s3c_udc *dev; + struct dwc2_udc *dev; const struct usb_endpoint_descriptor *desc; struct list_head queue; @@ -76,7 +76,7 @@ struct s3c_request { struct list_head queue; }; -struct s3c_udc { +struct dwc2_udc { struct usb_gadget gadget; struct usb_gadget_driver *driver; @@ -90,14 +90,14 @@ struct s3c_udc { unsigned req_pending:1, req_std:1; }; -extern struct s3c_udc *the_controller; +extern struct dwc2_udc *the_controller; #define ep_is_in(EP) (((EP)->bEndpointAddress&USB_DIR_IN) == USB_DIR_IN) #define ep_index(EP) ((EP)->bEndpointAddress&0xF) #define ep_maxpacket(EP) ((EP)->ep.maxpacket) -extern void otg_phy_init(struct s3c_udc *dev); -extern void otg_phy_off(struct s3c_udc *dev); +extern void otg_phy_init(struct dwc2_udc *dev); +extern void otg_phy_off(struct dwc2_udc *dev); extern void s3c_udc_ep_set_stall(struct s3c_ep *ep); extern int s3c_udc_probe(struct s3c_plat_otg_data *pdata); -- cgit v1.1 From 014728133a0867440d570784ced76a413f46d824 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Fri, 4 Dec 2015 01:11:45 +0100 Subject: usb: s3c-otg: Rename struct s3c_usbotg_reg to dwc2_usbotg_reg The driver is actually for the Designware DWC2 controller. This patch renames struct s3c_usbotg_reg to struct dwc2_usbotg_reg to make things more obvious and clear. Signed-off-by: Marek Vasut --- drivers/usb/gadget/s3c_udc_otg.c | 4 ++-- drivers/usb/gadget/s3c_udc_otg_regs.h | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/usb/gadget/s3c_udc_otg.c b/drivers/usb/gadget/s3c_udc_otg.c index eb7f77e..00d03f3 100644 --- a/drivers/usb/gadget/s3c_udc_otg.c +++ b/drivers/usb/gadget/s3c_udc_otg.c @@ -144,7 +144,7 @@ static struct usb_ep_ops s3c_ep_ops = { /***********************************************************/ void __iomem *regs_otg; -struct s3c_usbotg_reg *reg; +struct dwc2_usbotg_reg *reg; bool dfu_usb_get_reset(void) { @@ -805,7 +805,7 @@ int s3c_udc_probe(struct s3c_plat_otg_data *pdata) dev->pdata = pdata; - reg = (struct s3c_usbotg_reg *)pdata->regs_otg; + reg = (struct dwc2_usbotg_reg *)pdata->regs_otg; /* regs_otg = (void *)pdata->regs_otg; */ diff --git a/drivers/usb/gadget/s3c_udc_otg_regs.h b/drivers/usb/gadget/s3c_udc_otg_regs.h index ac5d112..c8da803 100644 --- a/drivers/usb/gadget/s3c_udc_otg_regs.h +++ b/drivers/usb/gadget/s3c_udc_otg_regs.h @@ -48,7 +48,7 @@ struct ep_fifo { }; /* USB2.0 OTG Controller register */ -struct s3c_usbotg_reg { +struct dwc2_usbotg_reg { /* Core Global Registers */ u32 gotgctl; /* OTG Control & Status */ u32 gotgint; /* OTG Interrupt */ -- cgit v1.1 From 2c12ff039ca6e36c8c2025befcda3d91fbf47dcd Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Fri, 4 Dec 2015 01:36:36 +0100 Subject: usb: s3c-otg: Split private bits from s3c_udc.h Most of the functions are local to the s3c_udc driver, remove them from the s3c_udc.h header to stop those bits from propagating all over the place. Instead, move all the private stuff into new private s3c_udc_otg_priv.h header. Signed-off-by: Marek Vasut --- drivers/usb/gadget/bcm_udc_otg_phy.c | 2 +- drivers/usb/gadget/s3c_udc_otg.c | 1 + drivers/usb/gadget/s3c_udc_otg_phy.c | 1 + drivers/usb/gadget/s3c_udc_otg_priv.h | 102 ++++++++++++++++++++++++++++++++++ include/usb/s3c_udc.h | 94 +------------------------------ 5 files changed, 108 insertions(+), 92 deletions(-) create mode 100644 drivers/usb/gadget/s3c_udc_otg_priv.h diff --git a/drivers/usb/gadget/bcm_udc_otg_phy.c b/drivers/usb/gadget/bcm_udc_otg_phy.c index 936247e..c58388c 100644 --- a/drivers/usb/gadget/bcm_udc_otg_phy.c +++ b/drivers/usb/gadget/bcm_udc_otg_phy.c @@ -9,7 +9,7 @@ #include #include -#include +#include "s3c_udc_otg_priv.h" #include "bcm_udc_otg.h" void otg_phy_init(struct dwc2_udc *dev) diff --git a/drivers/usb/gadget/s3c_udc_otg.c b/drivers/usb/gadget/s3c_udc_otg.c index 00d03f3..99c6a1b 100644 --- a/drivers/usb/gadget/s3c_udc_otg.c +++ b/drivers/usb/gadget/s3c_udc_otg.c @@ -33,6 +33,7 @@ #include #include "s3c_udc_otg_regs.h" +#include "s3c_udc_otg_priv.h" #include /***********************************************************/ diff --git a/drivers/usb/gadget/s3c_udc_otg_phy.c b/drivers/usb/gadget/s3c_udc_otg_phy.c index ffc930c..169f8e4 100644 --- a/drivers/usb/gadget/s3c_udc_otg_phy.c +++ b/drivers/usb/gadget/s3c_udc_otg_phy.c @@ -33,6 +33,7 @@ #include #include "s3c_udc_otg_regs.h" +#include "s3c_udc_otg_priv.h" #include #include diff --git a/drivers/usb/gadget/s3c_udc_otg_priv.h b/drivers/usb/gadget/s3c_udc_otg_priv.h new file mode 100644 index 0000000..567fb4e --- /dev/null +++ b/drivers/usb/gadget/s3c_udc_otg_priv.h @@ -0,0 +1,102 @@ +/* + * Samsung S3C on-chip full/high speed USB device controllers + * Copyright (C) 2005 for Samsung Electronics + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __S3C_UDC_OTG_PRIV__ +#define __S3C_UDC_OTG_PRIV__ + +#include +#include +#include +#include +#include +#include +#include + +/*-------------------------------------------------------------------------*/ +/* DMA bounce buffer size, 16K is enough even for mass storage */ +#define DMA_BUFFER_SIZE (16*SZ_1K) + +#define EP0_FIFO_SIZE 64 +#define EP_FIFO_SIZE 512 +#define EP_FIFO_SIZE2 1024 +/* ep0-control, ep1in-bulk, ep2out-bulk, ep3in-int */ +#define S3C_MAX_ENDPOINTS 4 +#define S3C_MAX_HW_ENDPOINTS 16 + +#define WAIT_FOR_SETUP 0 +#define DATA_STATE_XMIT 1 +#define DATA_STATE_NEED_ZLP 2 +#define WAIT_FOR_OUT_STATUS 3 +#define DATA_STATE_RECV 4 +#define WAIT_FOR_COMPLETE 5 +#define WAIT_FOR_OUT_COMPLETE 6 +#define WAIT_FOR_IN_COMPLETE 7 +#define WAIT_FOR_NULL_COMPLETE 8 + +#define TEST_J_SEL 0x1 +#define TEST_K_SEL 0x2 +#define TEST_SE0_NAK_SEL 0x3 +#define TEST_PACKET_SEL 0x4 +#define TEST_FORCE_ENABLE_SEL 0x5 + +/* ************************************************************************* */ +/* IO + */ + +enum ep_type { + ep_control, ep_bulk_in, ep_bulk_out, ep_interrupt +}; + +struct s3c_ep { + struct usb_ep ep; + struct dwc2_udc *dev; + + const struct usb_endpoint_descriptor *desc; + struct list_head queue; + unsigned long pio_irqs; + int len; + void *dma_buf; + + u8 stopped; + u8 bEndpointAddress; + u8 bmAttributes; + + enum ep_type ep_type; + int fifo_num; +}; + +struct s3c_request { + struct usb_request req; + struct list_head queue; +}; + +struct dwc2_udc { + struct usb_gadget gadget; + struct usb_gadget_driver *driver; + + struct s3c_plat_otg_data *pdata; + + int ep0state; + struct s3c_ep ep[S3C_MAX_ENDPOINTS]; + + unsigned char usb_address; + + unsigned req_pending:1, req_std:1; +}; + +extern struct dwc2_udc *the_controller; + +#define ep_is_in(EP) (((EP)->bEndpointAddress&USB_DIR_IN) == USB_DIR_IN) +#define ep_index(EP) ((EP)->bEndpointAddress&0xF) +#define ep_maxpacket(EP) ((EP)->ep.maxpacket) + +extern void otg_phy_init(struct dwc2_udc *dev); +extern void otg_phy_off(struct dwc2_udc *dev); + +extern void s3c_udc_ep_set_stall(struct s3c_ep *ep); + +#endif /* __S3C_UDC_OTG_PRIV__ */ diff --git a/include/usb/s3c_udc.h b/include/usb/s3c_udc.h index f6c3a86..67c3e91 100644 --- a/include/usb/s3c_udc.h +++ b/include/usb/s3c_udc.h @@ -9,99 +9,8 @@ #ifndef __S3C_USB_GADGET #define __S3C_USB_GADGET -#include -#include -#include -#include -#include -#include - #define PHY0_SLEEP (1 << 5) -/*-------------------------------------------------------------------------*/ -/* DMA bounce buffer size, 16K is enough even for mass storage */ -#define DMA_BUFFER_SIZE (16*SZ_1K) - -#define EP0_FIFO_SIZE 64 -#define EP_FIFO_SIZE 512 -#define EP_FIFO_SIZE2 1024 -/* ep0-control, ep1in-bulk, ep2out-bulk, ep3in-int */ -#define S3C_MAX_ENDPOINTS 4 -#define S3C_MAX_HW_ENDPOINTS 16 - -#define WAIT_FOR_SETUP 0 -#define DATA_STATE_XMIT 1 -#define DATA_STATE_NEED_ZLP 2 -#define WAIT_FOR_OUT_STATUS 3 -#define DATA_STATE_RECV 4 -#define WAIT_FOR_COMPLETE 5 -#define WAIT_FOR_OUT_COMPLETE 6 -#define WAIT_FOR_IN_COMPLETE 7 -#define WAIT_FOR_NULL_COMPLETE 8 - -#define TEST_J_SEL 0x1 -#define TEST_K_SEL 0x2 -#define TEST_SE0_NAK_SEL 0x3 -#define TEST_PACKET_SEL 0x4 -#define TEST_FORCE_ENABLE_SEL 0x5 - -/* ************************************************************************* */ -/* IO - */ - -enum ep_type { - ep_control, ep_bulk_in, ep_bulk_out, ep_interrupt -}; - -struct s3c_ep { - struct usb_ep ep; - struct dwc2_udc *dev; - - const struct usb_endpoint_descriptor *desc; - struct list_head queue; - unsigned long pio_irqs; - int len; - void *dma_buf; - - u8 stopped; - u8 bEndpointAddress; - u8 bmAttributes; - - enum ep_type ep_type; - int fifo_num; -}; - -struct s3c_request { - struct usb_request req; - struct list_head queue; -}; - -struct dwc2_udc { - struct usb_gadget gadget; - struct usb_gadget_driver *driver; - - struct s3c_plat_otg_data *pdata; - - int ep0state; - struct s3c_ep ep[S3C_MAX_ENDPOINTS]; - - unsigned char usb_address; - - unsigned req_pending:1, req_std:1; -}; - -extern struct dwc2_udc *the_controller; - -#define ep_is_in(EP) (((EP)->bEndpointAddress&USB_DIR_IN) == USB_DIR_IN) -#define ep_index(EP) ((EP)->bEndpointAddress&0xF) -#define ep_maxpacket(EP) ((EP)->ep.maxpacket) - -extern void otg_phy_init(struct dwc2_udc *dev); -extern void otg_phy_off(struct dwc2_udc *dev); - -extern void s3c_udc_ep_set_stall(struct s3c_ep *ep); -extern int s3c_udc_probe(struct s3c_plat_otg_data *pdata); - struct s3c_plat_otg_data { int (*phy_control)(int on); unsigned int regs_phy; @@ -110,4 +19,7 @@ struct s3c_plat_otg_data { unsigned int usb_flags; unsigned int usb_gusbcfg; }; + +extern int s3c_udc_probe(struct s3c_plat_otg_data *pdata); + #endif -- cgit v1.1 From 1f99ab5c9286148360c2021da39f67a9c6d79db0 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Fri, 4 Dec 2015 01:44:41 +0100 Subject: usb: s3c-otg: Rename struct s3c_usbotg_phy to dwc2_usbotg_phy The driver is actually for the Designware DWC2 controller. This patch renames struct s3c_usbotg_phy to struct dwc2_usbotg_phy to make things more obvious and clear. Signed-off-by: Marek Vasut --- drivers/usb/gadget/s3c_udc_otg_phy.c | 8 ++++---- drivers/usb/gadget/s3c_udc_otg_regs.h | 2 +- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/usb/gadget/s3c_udc_otg_phy.c b/drivers/usb/gadget/s3c_udc_otg_phy.c index 169f8e4..a761b43 100644 --- a/drivers/usb/gadget/s3c_udc_otg_phy.c +++ b/drivers/usb/gadget/s3c_udc_otg_phy.c @@ -41,8 +41,8 @@ void otg_phy_init(struct dwc2_udc *dev) { unsigned int usb_phy_ctrl = dev->pdata->usb_phy_ctrl; - struct s3c_usbotg_phy *phy = - (struct s3c_usbotg_phy *)dev->pdata->regs_phy; + struct dwc2_usbotg_phy *phy = + (struct dwc2_usbotg_phy *)dev->pdata->regs_phy; dev->pdata->phy_control(1); @@ -79,8 +79,8 @@ void otg_phy_init(struct dwc2_udc *dev) void otg_phy_off(struct dwc2_udc *dev) { unsigned int usb_phy_ctrl = dev->pdata->usb_phy_ctrl; - struct s3c_usbotg_phy *phy = - (struct s3c_usbotg_phy *)dev->pdata->regs_phy; + struct dwc2_usbotg_phy *phy = + (struct dwc2_usbotg_phy *)dev->pdata->regs_phy; /* reset controller just in case */ writel(PHY_SW_RST0, &phy->rstcon); diff --git a/drivers/usb/gadget/s3c_udc_otg_regs.h b/drivers/usb/gadget/s3c_udc_otg_regs.h index c8da803..e5115dd 100644 --- a/drivers/usb/gadget/s3c_udc_otg_regs.h +++ b/drivers/usb/gadget/s3c_udc_otg_regs.h @@ -12,7 +12,7 @@ #define __ASM_ARCH_REGS_USB_OTG_HS_H /* USB2.0 OTG Controller register */ -struct s3c_usbotg_phy { +struct dwc2_usbotg_phy { u32 phypwr; u32 phyclk; u32 rstcon; -- cgit v1.1 From 5f3a562a3ba145b2fb62ddb77f59bac5c4ab3ff6 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Fri, 4 Dec 2015 01:46:15 +0100 Subject: usb: s3c-otg: Rename struct s3c_dev_*_ep The driver is actually for the Designware DWC2 controller. This patch renames struct s3c_dev_*_ep to reflect this. Signed-off-by: Marek Vasut --- drivers/usb/gadget/s3c_udc_otg_regs.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/usb/gadget/s3c_udc_otg_regs.h b/drivers/usb/gadget/s3c_udc_otg_regs.h index e5115dd..57affcb 100644 --- a/drivers/usb/gadget/s3c_udc_otg_regs.h +++ b/drivers/usb/gadget/s3c_udc_otg_regs.h @@ -19,7 +19,7 @@ struct dwc2_usbotg_phy { }; /* Device Logical IN Endpoint-Specific Registers */ -struct s3c_dev_in_endp { +struct dwc2_dev_in_endp { u32 diepctl; u8 res1[4]; u32 diepint; @@ -31,7 +31,7 @@ struct s3c_dev_in_endp { }; /* Device Logical OUT Endpoint-Specific Registers */ -struct s3c_dev_out_endp { +struct dwc2_dev_out_endp { u32 doepctl; u8 res1[4]; u32 doepint; @@ -74,8 +74,8 @@ struct dwc2_usbotg_reg { u32 daint; /* Device All Endpoints Interrupt */ u32 daintmsk; /* Device All Endpoints Interrupt Mask */ u8 res4[224]; - struct s3c_dev_in_endp in_endp[16]; - struct s3c_dev_out_endp out_endp[16]; + struct dwc2_dev_in_endp in_endp[16]; + struct dwc2_dev_out_endp out_endp[16]; u8 res5[768]; struct ep_fifo ep[16]; }; -- cgit v1.1 From 627d929826af5a356ab3ad7198f2a13ce516512b Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Fri, 4 Dec 2015 01:48:57 +0100 Subject: usb: s3c-otg: Rename struct s3c_ep The driver is actually for the Designware DWC2 controller. This patch renames struct s3c_ep to reflect this. Signed-off-by: Marek Vasut --- drivers/usb/gadget/s3c_udc_otg.c | 38 ++++++++++++------------ drivers/usb/gadget/s3c_udc_otg_priv.h | 6 ++-- drivers/usb/gadget/s3c_udc_otg_xfer_dma.c | 48 +++++++++++++++---------------- 3 files changed, 46 insertions(+), 46 deletions(-) diff --git a/drivers/usb/gadget/s3c_udc_otg.c b/drivers/usb/gadget/s3c_udc_otg.c index 99c6a1b..4caa390 100644 --- a/drivers/usb/gadget/s3c_udc_otg.c +++ b/drivers/usb/gadget/s3c_udc_otg.c @@ -96,20 +96,20 @@ static int s3c_dequeue(struct usb_ep *ep, struct usb_request *); static int s3c_fifo_status(struct usb_ep *ep); static void s3c_fifo_flush(struct usb_ep *ep); static void s3c_ep0_read(struct dwc2_udc *dev); -static void s3c_ep0_kick(struct dwc2_udc *dev, struct s3c_ep *ep); +static void s3c_ep0_kick(struct dwc2_udc *dev, struct dwc2_ep *ep); static void s3c_handle_ep0(struct dwc2_udc *dev); static int s3c_ep0_write(struct dwc2_udc *dev); -static int write_fifo_ep0(struct s3c_ep *ep, struct s3c_request *req); -static void done(struct s3c_ep *ep, struct s3c_request *req, int status); +static int write_fifo_ep0(struct dwc2_ep *ep, struct s3c_request *req); +static void done(struct dwc2_ep *ep, struct s3c_request *req, int status); static void stop_activity(struct dwc2_udc *dev, struct usb_gadget_driver *driver); static int udc_enable(struct dwc2_udc *dev); static void udc_set_address(struct dwc2_udc *dev, unsigned char address); static void reconfig_usbd(struct dwc2_udc *dev); static void set_max_pktsize(struct dwc2_udc *dev, enum usb_device_speed speed); -static void nuke(struct s3c_ep *ep, int status); +static void nuke(struct dwc2_ep *ep, int status); static int s3c_udc_set_halt(struct usb_ep *_ep, int value); -static void s3c_udc_set_nak(struct s3c_ep *ep); +static void s3c_udc_set_nak(struct dwc2_ep *ep); void set_udc_gadget_private_data(void *p) { @@ -191,7 +191,7 @@ static void udc_reinit(struct dwc2_udc *dev) /* basic endpoint records init */ for (i = 0; i < S3C_MAX_ENDPOINTS; i++) { - struct s3c_ep *ep = &dev->ep[i]; + struct dwc2_ep *ep = &dev->ep[i]; if (i != 0) list_add_tail(&ep->ep.ep_list, &dev->gadget.ep_list); @@ -305,7 +305,7 @@ int usb_gadget_unregister_driver(struct usb_gadget_driver *driver) /* * done - retire a request; caller blocked irqs */ -static void done(struct s3c_ep *ep, struct s3c_request *req, int status) +static void done(struct dwc2_ep *ep, struct s3c_request *req, int status) { unsigned int stopped = ep->stopped; @@ -356,7 +356,7 @@ static void done(struct s3c_ep *ep, struct s3c_request *req, int status) /* * nuke - dequeue ALL requests */ -static void nuke(struct s3c_ep *ep, int status) +static void nuke(struct dwc2_ep *ep, int status) { struct s3c_request *req; @@ -381,7 +381,7 @@ static void stop_activity(struct dwc2_udc *dev, /* prevent new request submissions, kill any outstanding requests */ for (i = 0; i < S3C_MAX_ENDPOINTS; i++) { - struct s3c_ep *ep = &dev->ep[i]; + struct dwc2_ep *ep = &dev->ep[i]; ep->stopped = 1; nuke(ep, -ESHUTDOWN); } @@ -530,13 +530,13 @@ static void set_max_pktsize(struct dwc2_udc *dev, enum usb_device_speed speed) static int s3c_ep_enable(struct usb_ep *_ep, const struct usb_endpoint_descriptor *desc) { - struct s3c_ep *ep; + struct dwc2_ep *ep; struct dwc2_udc *dev; unsigned long flags = 0; debug("%s: %p\n", __func__, _ep); - ep = container_of(_ep, struct s3c_ep, ep); + ep = container_of(_ep, struct dwc2_ep, ep); if (!_ep || !desc || ep->desc || _ep->name == ep0name || desc->bDescriptorType != USB_DT_ENDPOINT || ep->bEndpointAddress != desc->bEndpointAddress @@ -595,12 +595,12 @@ static int s3c_ep_enable(struct usb_ep *_ep, */ static int s3c_ep_disable(struct usb_ep *_ep) { - struct s3c_ep *ep; + struct dwc2_ep *ep; unsigned long flags = 0; debug("%s: %p\n", __func__, _ep); - ep = container_of(_ep, struct s3c_ep, ep); + ep = container_of(_ep, struct dwc2_ep, ep); if (!_ep || !ep->desc) { debug("%s: %s not enabled\n", __func__, _ep ? ep->ep.name : NULL); @@ -652,13 +652,13 @@ static void s3c_free_request(struct usb_ep *ep, struct usb_request *_req) /* dequeue JUST ONE request */ static int s3c_dequeue(struct usb_ep *_ep, struct usb_request *_req) { - struct s3c_ep *ep; + struct dwc2_ep *ep; struct s3c_request *req; unsigned long flags = 0; debug("%s: %p\n", __func__, _ep); - ep = container_of(_ep, struct s3c_ep, ep); + ep = container_of(_ep, struct dwc2_ep, ep); if (!_ep || ep->ep.name == ep0name) return -EINVAL; @@ -686,9 +686,9 @@ static int s3c_dequeue(struct usb_ep *_ep, struct usb_request *_req) static int s3c_fifo_status(struct usb_ep *_ep) { int count = 0; - struct s3c_ep *ep; + struct dwc2_ep *ep; - ep = container_of(_ep, struct s3c_ep, ep); + ep = container_of(_ep, struct dwc2_ep, ep); if (!_ep) { debug("%s: bad ep\n", __func__); return -ENODEV; @@ -708,9 +708,9 @@ static int s3c_fifo_status(struct usb_ep *_ep) */ static void s3c_fifo_flush(struct usb_ep *_ep) { - struct s3c_ep *ep; + struct dwc2_ep *ep; - ep = container_of(_ep, struct s3c_ep, ep); + ep = container_of(_ep, struct dwc2_ep, ep); if (unlikely(!_ep || (!ep->desc && ep->ep.name != ep0name))) { debug("%s: bad ep\n", __func__); return; diff --git a/drivers/usb/gadget/s3c_udc_otg_priv.h b/drivers/usb/gadget/s3c_udc_otg_priv.h index 567fb4e..a9b6969 100644 --- a/drivers/usb/gadget/s3c_udc_otg_priv.h +++ b/drivers/usb/gadget/s3c_udc_otg_priv.h @@ -51,7 +51,7 @@ enum ep_type { ep_control, ep_bulk_in, ep_bulk_out, ep_interrupt }; -struct s3c_ep { +struct dwc2_ep { struct usb_ep ep; struct dwc2_udc *dev; @@ -81,7 +81,7 @@ struct dwc2_udc { struct s3c_plat_otg_data *pdata; int ep0state; - struct s3c_ep ep[S3C_MAX_ENDPOINTS]; + struct dwc2_ep ep[S3C_MAX_ENDPOINTS]; unsigned char usb_address; @@ -97,6 +97,6 @@ extern struct dwc2_udc *the_controller; extern void otg_phy_init(struct dwc2_udc *dev); extern void otg_phy_off(struct dwc2_udc *dev); -extern void s3c_udc_ep_set_stall(struct s3c_ep *ep); +extern void s3c_udc_ep_set_stall(struct dwc2_ep *ep); #endif /* __S3C_UDC_OTG_PRIV__ */ diff --git a/drivers/usb/gadget/s3c_udc_otg_xfer_dma.c b/drivers/usb/gadget/s3c_udc_otg_xfer_dma.c index 6695444..53c9d4e 100644 --- a/drivers/usb/gadget/s3c_udc_otg_xfer_dma.c +++ b/drivers/usb/gadget/s3c_udc_otg_xfer_dma.c @@ -90,7 +90,7 @@ static inline void s3c_ep0_complete_out(void) } -static int setdma_rx(struct s3c_ep *ep, struct s3c_request *req) +static int setdma_rx(struct dwc2_ep *ep, struct s3c_request *req) { u32 *buf, ctrl; u32 length, pktcnt; @@ -128,7 +128,7 @@ static int setdma_rx(struct s3c_ep *ep, struct s3c_request *req) } -int setdma_tx(struct s3c_ep *ep, struct s3c_request *req) +int setdma_tx(struct dwc2_ep *ep, struct s3c_request *req) { u32 *buf, ctrl = 0; u32 length, pktcnt; @@ -188,7 +188,7 @@ int setdma_tx(struct s3c_ep *ep, struct s3c_request *req) static void complete_rx(struct dwc2_udc *dev, u8 ep_num) { - struct s3c_ep *ep = &dev->ep[ep_num]; + struct dwc2_ep *ep = &dev->ep[ep_num]; struct s3c_request *req = NULL; u32 ep_tsr = 0, xfer_size = 0, is_short = 0; @@ -261,7 +261,7 @@ static void complete_rx(struct dwc2_udc *dev, u8 ep_num) static void complete_tx(struct dwc2_udc *dev, u8 ep_num) { - struct s3c_ep *ep = &dev->ep[ep_num]; + struct dwc2_ep *ep = &dev->ep[ep_num]; struct s3c_request *req; u32 ep_tsr = 0, xfer_size = 0, is_short = 0; u32 last; @@ -337,7 +337,7 @@ static void complete_tx(struct dwc2_udc *dev, u8 ep_num) static inline void s3c_udc_check_tx_queue(struct dwc2_udc *dev, u8 ep_num) { - struct s3c_ep *ep = &dev->ep[ep_num]; + struct dwc2_ep *ep = &dev->ep[ep_num]; struct s3c_request *req; debug_cond(DEBUG_IN_EP, @@ -583,7 +583,7 @@ static int s3c_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags) { struct s3c_request *req; - struct s3c_ep *ep; + struct dwc2_ep *ep; struct dwc2_udc *dev; unsigned long flags = 0; u32 ep_num, gintsts; @@ -596,7 +596,7 @@ static int s3c_queue(struct usb_ep *_ep, struct usb_request *_req, return -EINVAL; } - ep = container_of(_ep, struct s3c_ep, ep); + ep = container_of(_ep, struct dwc2_ep, ep); if (unlikely(!_ep || (!ep->desc && ep->ep.name != ep0name))) { @@ -680,7 +680,7 @@ static int s3c_queue(struct usb_ep *_ep, struct usb_request *_req, /****************************************************************/ /* return: 0 = still running, 1 = completed, negative = errno */ -static int write_fifo_ep0(struct s3c_ep *ep, struct s3c_request *req) +static int write_fifo_ep0(struct dwc2_ep *ep, struct s3c_request *req) { u32 max; unsigned count; @@ -718,7 +718,7 @@ static int write_fifo_ep0(struct s3c_ep *ep, struct s3c_request *req) return 0; } -int s3c_fifo_read(struct s3c_ep *ep, u32 *cp, int max) +int s3c_fifo_read(struct dwc2_ep *ep, u32 *cp, int max) { invalidate_dcache_range((unsigned long)cp, (unsigned long)cp + ROUND(max, CONFIG_SYS_CACHELINE_SIZE)); @@ -751,7 +751,7 @@ static void udc_set_address(struct dwc2_udc *dev, unsigned char address) dev->usb_address = address; } -static inline void s3c_udc_ep0_set_stall(struct s3c_ep *ep) +static inline void s3c_udc_ep0_set_stall(struct dwc2_ep *ep) { struct dwc2_udc *dev; u32 ep_ctrl = 0; @@ -782,7 +782,7 @@ static inline void s3c_udc_ep0_set_stall(struct s3c_ep *ep) static void s3c_ep0_read(struct dwc2_udc *dev) { struct s3c_request *req; - struct s3c_ep *ep = &dev->ep[0]; + struct dwc2_ep *ep = &dev->ep[0]; if (!list_empty(&ep->queue)) { req = list_entry(ep->queue.next, struct s3c_request, queue); @@ -819,7 +819,7 @@ static void s3c_ep0_read(struct dwc2_udc *dev) static int s3c_ep0_write(struct dwc2_udc *dev) { struct s3c_request *req; - struct s3c_ep *ep = &dev->ep[0]; + struct dwc2_ep *ep = &dev->ep[0]; int ret, need_zlp = 0; if (list_empty(&ep->queue)) @@ -920,7 +920,7 @@ int s3c_udc_get_status(struct dwc2_udc *dev, return 0; } -static void s3c_udc_set_nak(struct s3c_ep *ep) +static void s3c_udc_set_nak(struct dwc2_ep *ep) { u8 ep_num; u32 ep_ctrl = 0; @@ -946,7 +946,7 @@ static void s3c_udc_set_nak(struct s3c_ep *ep) } -void s3c_udc_ep_set_stall(struct s3c_ep *ep) +void s3c_udc_ep_set_stall(struct dwc2_ep *ep) { u8 ep_num; u32 ep_ctrl = 0; @@ -981,7 +981,7 @@ void s3c_udc_ep_set_stall(struct s3c_ep *ep) return; } -void s3c_udc_ep_clear_stall(struct s3c_ep *ep) +void s3c_udc_ep_clear_stall(struct dwc2_ep *ep) { u8 ep_num; u32 ep_ctrl = 0; @@ -1031,12 +1031,12 @@ void s3c_udc_ep_clear_stall(struct s3c_ep *ep) static int s3c_udc_set_halt(struct usb_ep *_ep, int value) { - struct s3c_ep *ep; + struct dwc2_ep *ep; struct dwc2_udc *dev; unsigned long flags = 0; u8 ep_num; - ep = container_of(_ep, struct s3c_ep, ep); + ep = container_of(_ep, struct dwc2_ep, ep); ep_num = ep_index(ep); if (unlikely(!_ep || !ep->desc || ep_num == EP0_CON || @@ -1076,7 +1076,7 @@ static int s3c_udc_set_halt(struct usb_ep *_ep, int value) return 0; } -void s3c_udc_ep_activate(struct s3c_ep *ep) +void s3c_udc_ep_activate(struct dwc2_ep *ep) { u8 ep_num; u32 ep_ctrl = 0, daintmsk = 0; @@ -1126,10 +1126,10 @@ void s3c_udc_ep_activate(struct s3c_ep *ep) static int s3c_udc_clear_feature(struct usb_ep *_ep) { struct dwc2_udc *dev; - struct s3c_ep *ep; + struct dwc2_ep *ep; u8 ep_num; - ep = container_of(_ep, struct s3c_ep, ep); + ep = container_of(_ep, struct dwc2_ep, ep); ep_num = ep_index(ep); dev = ep->dev; @@ -1190,10 +1190,10 @@ static int s3c_udc_clear_feature(struct usb_ep *_ep) static int s3c_udc_set_feature(struct usb_ep *_ep) { struct dwc2_udc *dev; - struct s3c_ep *ep; + struct dwc2_ep *ep; u8 ep_num; - ep = container_of(_ep, struct s3c_ep, ep); + ep = container_of(_ep, struct dwc2_ep, ep); ep_num = ep_index(ep); dev = ep->dev; @@ -1264,7 +1264,7 @@ static int s3c_udc_set_feature(struct usb_ep *_ep) */ void s3c_ep0_setup(struct dwc2_udc *dev) { - struct s3c_ep *ep = &dev->ep[0]; + struct dwc2_ep *ep = &dev->ep[0]; int i; u8 ep_num; @@ -1465,7 +1465,7 @@ static void s3c_handle_ep0(struct dwc2_udc *dev) } } -static void s3c_ep0_kick(struct dwc2_udc *dev, struct s3c_ep *ep) +static void s3c_ep0_kick(struct dwc2_udc *dev, struct dwc2_ep *ep) { debug_cond(DEBUG_EP0 != 0, "%s: ep_is_in = %d\n", __func__, ep_is_in(ep)); -- cgit v1.1 From c056c52bbd8125d1745cc73505b55843b6a28f78 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Fri, 4 Dec 2015 01:51:07 +0100 Subject: usb: s3c-otg: Rename struct s3c_request The driver is actually for the Designware DWC2 controller. This patch renames struct s3c_request to reflect this. Signed-off-by: Marek Vasut --- drivers/usb/gadget/s3c_udc_otg.c | 18 ++++++++-------- drivers/usb/gadget/s3c_udc_otg_priv.h | 2 +- drivers/usb/gadget/s3c_udc_otg_xfer_dma.c | 36 +++++++++++++++---------------- 3 files changed, 28 insertions(+), 28 deletions(-) diff --git a/drivers/usb/gadget/s3c_udc_otg.c b/drivers/usb/gadget/s3c_udc_otg.c index 4caa390..22b9518 100644 --- a/drivers/usb/gadget/s3c_udc_otg.c +++ b/drivers/usb/gadget/s3c_udc_otg.c @@ -99,8 +99,8 @@ static void s3c_ep0_read(struct dwc2_udc *dev); static void s3c_ep0_kick(struct dwc2_udc *dev, struct dwc2_ep *ep); static void s3c_handle_ep0(struct dwc2_udc *dev); static int s3c_ep0_write(struct dwc2_udc *dev); -static int write_fifo_ep0(struct dwc2_ep *ep, struct s3c_request *req); -static void done(struct dwc2_ep *ep, struct s3c_request *req, int status); +static int write_fifo_ep0(struct dwc2_ep *ep, struct dwc2_request *req); +static void done(struct dwc2_ep *ep, struct dwc2_request *req, int status); static void stop_activity(struct dwc2_udc *dev, struct usb_gadget_driver *driver); static int udc_enable(struct dwc2_udc *dev); @@ -305,7 +305,7 @@ int usb_gadget_unregister_driver(struct usb_gadget_driver *driver) /* * done - retire a request; caller blocked irqs */ -static void done(struct dwc2_ep *ep, struct s3c_request *req, int status) +static void done(struct dwc2_ep *ep, struct dwc2_request *req, int status) { unsigned int stopped = ep->stopped; @@ -358,13 +358,13 @@ static void done(struct dwc2_ep *ep, struct s3c_request *req, int status) */ static void nuke(struct dwc2_ep *ep, int status) { - struct s3c_request *req; + struct dwc2_request *req; debug("%s: %s %p\n", __func__, ep->ep.name, ep); /* called with irqs blocked */ while (!list_empty(&ep->queue)) { - req = list_entry(ep->queue.next, struct s3c_request, queue); + req = list_entry(ep->queue.next, struct dwc2_request, queue); done(ep, req, status); } } @@ -624,7 +624,7 @@ static int s3c_ep_disable(struct usb_ep *_ep) static struct usb_request *s3c_alloc_request(struct usb_ep *ep, gfp_t gfp_flags) { - struct s3c_request *req; + struct dwc2_request *req; debug("%s: %s %p\n", __func__, ep->name, ep); @@ -640,11 +640,11 @@ static struct usb_request *s3c_alloc_request(struct usb_ep *ep, static void s3c_free_request(struct usb_ep *ep, struct usb_request *_req) { - struct s3c_request *req; + struct dwc2_request *req; debug("%s: %p\n", __func__, ep); - req = container_of(_req, struct s3c_request, req); + req = container_of(_req, struct dwc2_request, req); WARN_ON(!list_empty(&req->queue)); kfree(req); } @@ -653,7 +653,7 @@ static void s3c_free_request(struct usb_ep *ep, struct usb_request *_req) static int s3c_dequeue(struct usb_ep *_ep, struct usb_request *_req) { struct dwc2_ep *ep; - struct s3c_request *req; + struct dwc2_request *req; unsigned long flags = 0; debug("%s: %p\n", __func__, _ep); diff --git a/drivers/usb/gadget/s3c_udc_otg_priv.h b/drivers/usb/gadget/s3c_udc_otg_priv.h index a9b6969..68bac69 100644 --- a/drivers/usb/gadget/s3c_udc_otg_priv.h +++ b/drivers/usb/gadget/s3c_udc_otg_priv.h @@ -69,7 +69,7 @@ struct dwc2_ep { int fifo_num; }; -struct s3c_request { +struct dwc2_request { struct usb_request req; struct list_head queue; }; diff --git a/drivers/usb/gadget/s3c_udc_otg_xfer_dma.c b/drivers/usb/gadget/s3c_udc_otg_xfer_dma.c index 53c9d4e..0288d44 100644 --- a/drivers/usb/gadget/s3c_udc_otg_xfer_dma.c +++ b/drivers/usb/gadget/s3c_udc_otg_xfer_dma.c @@ -90,7 +90,7 @@ static inline void s3c_ep0_complete_out(void) } -static int setdma_rx(struct dwc2_ep *ep, struct s3c_request *req) +static int setdma_rx(struct dwc2_ep *ep, struct dwc2_request *req) { u32 *buf, ctrl; u32 length, pktcnt; @@ -128,7 +128,7 @@ static int setdma_rx(struct dwc2_ep *ep, struct s3c_request *req) } -int setdma_tx(struct dwc2_ep *ep, struct s3c_request *req) +int setdma_tx(struct dwc2_ep *ep, struct dwc2_request *req) { u32 *buf, ctrl = 0; u32 length, pktcnt; @@ -189,7 +189,7 @@ int setdma_tx(struct dwc2_ep *ep, struct s3c_request *req) static void complete_rx(struct dwc2_udc *dev, u8 ep_num) { struct dwc2_ep *ep = &dev->ep[ep_num]; - struct s3c_request *req = NULL; + struct dwc2_request *req = NULL; u32 ep_tsr = 0, xfer_size = 0, is_short = 0; if (list_empty(&ep->queue)) { @@ -200,7 +200,7 @@ static void complete_rx(struct dwc2_udc *dev, u8 ep_num) } - req = list_entry(ep->queue.next, struct s3c_request, queue); + req = list_entry(ep->queue.next, struct dwc2_request, queue); ep_tsr = readl(®->out_endp[ep_num].doeptsiz); if (ep_num == EP0_CON) @@ -248,7 +248,7 @@ static void complete_rx(struct dwc2_udc *dev, u8 ep_num) if (!list_empty(&ep->queue)) { req = list_entry(ep->queue.next, - struct s3c_request, queue); + struct dwc2_request, queue); debug_cond(DEBUG_OUT_EP != 0, "%s: Next Rx request start...\n", __func__); @@ -262,7 +262,7 @@ static void complete_rx(struct dwc2_udc *dev, u8 ep_num) static void complete_tx(struct dwc2_udc *dev, u8 ep_num) { struct dwc2_ep *ep = &dev->ep[ep_num]; - struct s3c_request *req; + struct dwc2_request *req; u32 ep_tsr = 0, xfer_size = 0, is_short = 0; u32 last; @@ -280,7 +280,7 @@ static void complete_tx(struct dwc2_udc *dev, u8 ep_num) } - req = list_entry(ep->queue.next, struct s3c_request, queue); + req = list_entry(ep->queue.next, struct dwc2_request, queue); ep_tsr = readl(®->in_endp[ep_num].dieptsiz); @@ -328,7 +328,7 @@ static void complete_tx(struct dwc2_udc *dev, u8 ep_num) done(ep, req, 0); if (!list_empty(&ep->queue)) { - req = list_entry(ep->queue.next, struct s3c_request, queue); + req = list_entry(ep->queue.next, struct dwc2_request, queue); debug_cond(DEBUG_IN_EP, "%s: Next Tx request start...\n", __func__); setdma_tx(ep, req); @@ -338,13 +338,13 @@ static void complete_tx(struct dwc2_udc *dev, u8 ep_num) static inline void s3c_udc_check_tx_queue(struct dwc2_udc *dev, u8 ep_num) { struct dwc2_ep *ep = &dev->ep[ep_num]; - struct s3c_request *req; + struct dwc2_request *req; debug_cond(DEBUG_IN_EP, "%s: Check queue, ep_num = %d\n", __func__, ep_num); if (!list_empty(&ep->queue)) { - req = list_entry(ep->queue.next, struct s3c_request, queue); + req = list_entry(ep->queue.next, struct dwc2_request, queue); debug_cond(DEBUG_IN_EP, "%s: Next Tx request(0x%p) start...\n", __func__, req); @@ -582,13 +582,13 @@ static int s3c_udc_irq(int irq, void *_dev) static int s3c_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags) { - struct s3c_request *req; + struct dwc2_request *req; struct dwc2_ep *ep; struct dwc2_udc *dev; unsigned long flags = 0; u32 ep_num, gintsts; - req = container_of(_req, struct s3c_request, req); + req = container_of(_req, struct dwc2_request, req); if (unlikely(!_req || !_req->complete || !_req->buf || !list_empty(&req->queue))) { @@ -680,7 +680,7 @@ static int s3c_queue(struct usb_ep *_ep, struct usb_request *_req, /****************************************************************/ /* return: 0 = still running, 1 = completed, negative = errno */ -static int write_fifo_ep0(struct dwc2_ep *ep, struct s3c_request *req) +static int write_fifo_ep0(struct dwc2_ep *ep, struct dwc2_request *req) { u32 max; unsigned count; @@ -781,11 +781,11 @@ static inline void s3c_udc_ep0_set_stall(struct dwc2_ep *ep) static void s3c_ep0_read(struct dwc2_udc *dev) { - struct s3c_request *req; + struct dwc2_request *req; struct dwc2_ep *ep = &dev->ep[0]; if (!list_empty(&ep->queue)) { - req = list_entry(ep->queue.next, struct s3c_request, queue); + req = list_entry(ep->queue.next, struct dwc2_request, queue); } else { debug("%s: ---> BUG\n", __func__); @@ -818,14 +818,14 @@ static void s3c_ep0_read(struct dwc2_udc *dev) */ static int s3c_ep0_write(struct dwc2_udc *dev) { - struct s3c_request *req; + struct dwc2_request *req; struct dwc2_ep *ep = &dev->ep[0]; int ret, need_zlp = 0; if (list_empty(&ep->queue)) req = 0; else - req = list_entry(ep->queue.next, struct s3c_request, queue); + req = list_entry(ep->queue.next, struct dwc2_request, queue); if (!req) { debug_cond(DEBUG_EP0 != 0, "%s: NULL REQ\n", __func__); @@ -1050,7 +1050,7 @@ static int s3c_udc_set_halt(struct usb_ep *_ep, int value) if (value && ep_is_in(ep) && !list_empty(&ep->queue)) { debug("%s: %s queue not empty, req = %p\n", __func__, ep->ep.name, - list_entry(ep->queue.next, struct s3c_request, queue)); + list_entry(ep->queue.next, struct dwc2_request, queue)); return -EAGAIN; } -- cgit v1.1 From 2f6560a14669c260665ae78c316326359310f923 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Fri, 4 Dec 2015 01:52:03 +0100 Subject: usb: s3c-otg: Staticize s3c_udc_ep_set_stall This function is local to s3c_udc_otg_xfer_dma.c , staticize it. Signed-off-by: Marek Vasut --- drivers/usb/gadget/s3c_udc_otg_priv.h | 2 -- drivers/usb/gadget/s3c_udc_otg_xfer_dma.c | 2 +- 2 files changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/usb/gadget/s3c_udc_otg_priv.h b/drivers/usb/gadget/s3c_udc_otg_priv.h index 68bac69..cc10704 100644 --- a/drivers/usb/gadget/s3c_udc_otg_priv.h +++ b/drivers/usb/gadget/s3c_udc_otg_priv.h @@ -97,6 +97,4 @@ extern struct dwc2_udc *the_controller; extern void otg_phy_init(struct dwc2_udc *dev); extern void otg_phy_off(struct dwc2_udc *dev); -extern void s3c_udc_ep_set_stall(struct dwc2_ep *ep); - #endif /* __S3C_UDC_OTG_PRIV__ */ diff --git a/drivers/usb/gadget/s3c_udc_otg_xfer_dma.c b/drivers/usb/gadget/s3c_udc_otg_xfer_dma.c index 0288d44..1390239 100644 --- a/drivers/usb/gadget/s3c_udc_otg_xfer_dma.c +++ b/drivers/usb/gadget/s3c_udc_otg_xfer_dma.c @@ -946,7 +946,7 @@ static void s3c_udc_set_nak(struct dwc2_ep *ep) } -void s3c_udc_ep_set_stall(struct dwc2_ep *ep) +static void s3c_udc_ep_set_stall(struct dwc2_ep *ep) { u8 ep_num; u32 ep_ctrl = 0; -- cgit v1.1 From de578e22d4f70e383eb4a978f6c69e36b9d0d334 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Fri, 4 Dec 2015 01:56:30 +0100 Subject: usb: s3c-otg: Staticize functions in s3c_udc_otg_xfer_dma.c Just staticize the functions, they are not used outside of the file. Signed-off-by: Marek Vasut --- drivers/usb/gadget/s3c_udc_otg_xfer_dma.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/usb/gadget/s3c_udc_otg_xfer_dma.c b/drivers/usb/gadget/s3c_udc_otg_xfer_dma.c index 1390239..a8237d4 100644 --- a/drivers/usb/gadget/s3c_udc_otg_xfer_dma.c +++ b/drivers/usb/gadget/s3c_udc_otg_xfer_dma.c @@ -41,7 +41,7 @@ static inline void s3c_udc_ep0_zlp(struct dwc2_udc *dev) dev->ep0state = WAIT_FOR_IN_COMPLETE; } -void s3c_udc_pre_setup(void) +static void s3c_udc_pre_setup(void) { u32 ep_ctrl; @@ -128,7 +128,7 @@ static int setdma_rx(struct dwc2_ep *ep, struct dwc2_request *req) } -int setdma_tx(struct dwc2_ep *ep, struct dwc2_request *req) +static int setdma_tx(struct dwc2_ep *ep, struct dwc2_request *req) { u32 *buf, ctrl = 0; u32 length, pktcnt; @@ -718,7 +718,7 @@ static int write_fifo_ep0(struct dwc2_ep *ep, struct dwc2_request *req) return 0; } -int s3c_fifo_read(struct dwc2_ep *ep, u32 *cp, int max) +static int s3c_fifo_read(struct dwc2_ep *ep, u32 *cp, int max) { invalidate_dcache_range((unsigned long)cp, (unsigned long)cp + ROUND(max, CONFIG_SYS_CACHELINE_SIZE)); @@ -859,7 +859,7 @@ static int s3c_ep0_write(struct dwc2_udc *dev) return 1; } -int s3c_udc_get_status(struct dwc2_udc *dev, +static int s3c_udc_get_status(struct dwc2_udc *dev, struct usb_ctrlrequest *crq) { u8 ep_num = crq->wIndex & 0x7F; @@ -981,7 +981,7 @@ static void s3c_udc_ep_set_stall(struct dwc2_ep *ep) return; } -void s3c_udc_ep_clear_stall(struct dwc2_ep *ep) +static void s3c_udc_ep_clear_stall(struct dwc2_ep *ep) { u8 ep_num; u32 ep_ctrl = 0; @@ -1076,7 +1076,7 @@ static int s3c_udc_set_halt(struct usb_ep *_ep, int value) return 0; } -void s3c_udc_ep_activate(struct dwc2_ep *ep) +static void s3c_udc_ep_activate(struct dwc2_ep *ep) { u8 ep_num; u32 ep_ctrl = 0, daintmsk = 0; @@ -1262,7 +1262,7 @@ static int s3c_udc_set_feature(struct usb_ep *_ep) /* * WAIT_FOR_SETUP (OUT_PKT_RDY) */ -void s3c_ep0_setup(struct dwc2_udc *dev) +static void s3c_ep0_setup(struct dwc2_udc *dev) { struct dwc2_ep *ep = &dev->ep[0]; int i; -- cgit v1.1 From 28b9774808faf220702c238796941e15d097049c Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Fri, 4 Dec 2015 01:59:12 +0100 Subject: usb: s3c-otg: Rename s3c_ep0_*() functions The driver is actually for the Designware DWC2 controller. This patch renames the s3c_ep0_*() functions to reflect this. Signed-off-by: Marek Vasut --- drivers/usb/gadget/s3c_udc_otg.c | 6 +++--- drivers/usb/gadget/s3c_udc_otg_xfer_dma.c | 22 +++++++++++----------- 2 files changed, 14 insertions(+), 14 deletions(-) diff --git a/drivers/usb/gadget/s3c_udc_otg.c b/drivers/usb/gadget/s3c_udc_otg.c index 22b9518..a5091dc 100644 --- a/drivers/usb/gadget/s3c_udc_otg.c +++ b/drivers/usb/gadget/s3c_udc_otg.c @@ -95,10 +95,10 @@ static int s3c_queue(struct usb_ep *ep, struct usb_request *, gfp_t gfp_flags); static int s3c_dequeue(struct usb_ep *ep, struct usb_request *); static int s3c_fifo_status(struct usb_ep *ep); static void s3c_fifo_flush(struct usb_ep *ep); -static void s3c_ep0_read(struct dwc2_udc *dev); -static void s3c_ep0_kick(struct dwc2_udc *dev, struct dwc2_ep *ep); +static void dwc2_ep0_read(struct dwc2_udc *dev); +static void dwc2_ep0_kick(struct dwc2_udc *dev, struct dwc2_ep *ep); static void s3c_handle_ep0(struct dwc2_udc *dev); -static int s3c_ep0_write(struct dwc2_udc *dev); +static int dwc2_ep0_write(struct dwc2_udc *dev); static int write_fifo_ep0(struct dwc2_ep *ep, struct dwc2_request *req); static void done(struct dwc2_ep *ep, struct dwc2_request *req, int status); static void stop_activity(struct dwc2_udc *dev, diff --git a/drivers/usb/gadget/s3c_udc_otg_xfer_dma.c b/drivers/usb/gadget/s3c_udc_otg_xfer_dma.c index a8237d4..aa50639 100644 --- a/drivers/usb/gadget/s3c_udc_otg_xfer_dma.c +++ b/drivers/usb/gadget/s3c_udc_otg_xfer_dma.c @@ -62,7 +62,7 @@ static void s3c_udc_pre_setup(void) } -static inline void s3c_ep0_complete_out(void) +static inline void dwc2_ep0_complete_out(void) { u32 ep_ctrl; @@ -268,7 +268,7 @@ static void complete_tx(struct dwc2_udc *dev, u8 ep_num) if (dev->ep0state == WAIT_FOR_NULL_COMPLETE) { dev->ep0state = WAIT_FOR_OUT_COMPLETE; - s3c_ep0_complete_out(); + dwc2_ep0_complete_out(); return; } @@ -315,7 +315,7 @@ static void complete_tx(struct dwc2_udc *dev, u8 ep_num) __func__, ep_num); done(ep, req, 0); dev->ep0state = WAIT_FOR_OUT_COMPLETE; - s3c_ep0_complete_out(); + dwc2_ep0_complete_out(); } else { debug_cond(DEBUG_IN_EP, "%s: ep_num = %d, invalid ep state\n", @@ -646,7 +646,7 @@ static int s3c_queue(struct usb_ep *_ep, struct usb_request *_req, if (ep_num == 0) { /* EP0 */ list_add_tail(&req->queue, &ep->queue); - s3c_ep0_kick(dev, ep); + dwc2_ep0_kick(dev, ep); req = 0; } else if (ep_is_in(ep)) { @@ -779,7 +779,7 @@ static inline void s3c_udc_ep0_set_stall(struct dwc2_ep *ep) s3c_udc_pre_setup(); } -static void s3c_ep0_read(struct dwc2_udc *dev) +static void dwc2_ep0_read(struct dwc2_udc *dev) { struct dwc2_request *req; struct dwc2_ep *ep = &dev->ep[0]; @@ -816,7 +816,7 @@ static void s3c_ep0_read(struct dwc2_udc *dev) /* * DATA_STATE_XMIT */ -static int s3c_ep0_write(struct dwc2_udc *dev) +static int dwc2_ep0_write(struct dwc2_udc *dev) { struct dwc2_request *req; struct dwc2_ep *ep = &dev->ep[0]; @@ -1262,7 +1262,7 @@ static int s3c_udc_set_feature(struct usb_ep *_ep) /* * WAIT_FOR_SETUP (OUT_PKT_RDY) */ -static void s3c_ep0_setup(struct dwc2_udc *dev) +static void dwc2_ep0_setup(struct dwc2_udc *dev) { struct dwc2_ep *ep = &dev->ep[0]; int i; @@ -1456,7 +1456,7 @@ static void s3c_handle_ep0(struct dwc2_udc *dev) if (dev->ep0state == WAIT_FOR_SETUP) { debug_cond(DEBUG_OUT_EP != 0, "%s: WAIT_FOR_SETUP\n", __func__); - s3c_ep0_setup(dev); + dwc2_ep0_setup(dev); } else { debug_cond(DEBUG_OUT_EP != 0, @@ -1465,16 +1465,16 @@ static void s3c_handle_ep0(struct dwc2_udc *dev) } } -static void s3c_ep0_kick(struct dwc2_udc *dev, struct dwc2_ep *ep) +static void dwc2_ep0_kick(struct dwc2_udc *dev, struct dwc2_ep *ep) { debug_cond(DEBUG_EP0 != 0, "%s: ep_is_in = %d\n", __func__, ep_is_in(ep)); if (ep_is_in(ep)) { dev->ep0state = DATA_STATE_XMIT; - s3c_ep0_write(dev); + dwc2_ep0_write(dev); } else { dev->ep0state = DATA_STATE_RECV; - s3c_ep0_read(dev); + dwc2_ep0_read(dev); } } -- cgit v1.1 From ae1f2f0c4a04f448d65fa18e913b4421c374e622 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Fri, 4 Dec 2015 02:13:42 +0100 Subject: usb: s3c-otg: Rename s3c_ep_*() functions The driver is actually for the Designware DWC2 controller. This patch renames the s3c_ep_*() functions to reflect this. Signed-off-by: Marek Vasut --- drivers/usb/gadget/s3c_udc_otg.c | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/drivers/usb/gadget/s3c_udc_otg.c b/drivers/usb/gadget/s3c_udc_otg.c index a5091dc..0b75f26 100644 --- a/drivers/usb/gadget/s3c_udc_otg.c +++ b/drivers/usb/gadget/s3c_udc_otg.c @@ -84,9 +84,9 @@ static dma_addr_t usb_ctrl_dma_addr; /* Local declarations. */ -static int s3c_ep_enable(struct usb_ep *ep, +static int dwc2_ep_enable(struct usb_ep *ep, const struct usb_endpoint_descriptor *); -static int s3c_ep_disable(struct usb_ep *ep); +static int dwc2_ep_disable(struct usb_ep *ep); static struct usb_request *s3c_alloc_request(struct usb_ep *ep, gfp_t gfp_flags); static void s3c_free_request(struct usb_ep *ep, struct usb_request *); @@ -124,9 +124,9 @@ void *get_udc_gadget_private_data(struct usb_gadget *gadget) return gadget->dev.device_data; } -static struct usb_ep_ops s3c_ep_ops = { - .enable = s3c_ep_enable, - .disable = s3c_ep_disable, +static struct usb_ep_ops dwc2_ep_ops = { + .enable = dwc2_ep_enable, + .disable = dwc2_ep_disable, .alloc_request = s3c_alloc_request, .free_request = s3c_free_request, @@ -527,7 +527,7 @@ static void set_max_pktsize(struct dwc2_udc *dev, enum usb_device_speed speed) writel(ep_ctrl|(0<<0), ®->out_endp[EP0_CON].doepctl); } -static int s3c_ep_enable(struct usb_ep *_ep, +static int dwc2_ep_enable(struct usb_ep *_ep, const struct usb_endpoint_descriptor *desc) { struct dwc2_ep *ep; @@ -593,7 +593,7 @@ static int s3c_ep_enable(struct usb_ep *_ep, /* * Disable EP */ -static int s3c_ep_disable(struct usb_ep *_ep) +static int dwc2_ep_disable(struct usb_ep *_ep) { struct dwc2_ep *ep; unsigned long flags = 0; @@ -735,7 +735,7 @@ static struct dwc2_udc memory = { .ep[0] = { .ep = { .name = ep0name, - .ops = &s3c_ep_ops, + .ops = &dwc2_ep_ops, .maxpacket = EP0_FIFO_SIZE, }, .dev = &memory, @@ -750,7 +750,7 @@ static struct dwc2_udc memory = { .ep[1] = { .ep = { .name = "ep1in-bulk", - .ops = &s3c_ep_ops, + .ops = &dwc2_ep_ops, .maxpacket = EP_FIFO_SIZE, }, .dev = &memory, @@ -765,7 +765,7 @@ static struct dwc2_udc memory = { .ep[2] = { .ep = { .name = "ep2out-bulk", - .ops = &s3c_ep_ops, + .ops = &dwc2_ep_ops, .maxpacket = EP_FIFO_SIZE, }, .dev = &memory, @@ -780,7 +780,7 @@ static struct dwc2_udc memory = { .ep[3] = { .ep = { .name = "ep3in-int", - .ops = &s3c_ep_ops, + .ops = &dwc2_ep_ops, .maxpacket = EP_FIFO_SIZE, }, .dev = &memory, -- cgit v1.1 From f52dd802cc385d669a2403ecee907f9c947e7f80 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Fri, 4 Dec 2015 02:03:45 +0100 Subject: usb: s3c-otg: Rename s3c_udc_*() functions The driver is actually for the Designware DWC2 controller. This patch renames the s3c_ep_*() functions to reflect this. The function s3c_udc_probe() is a special case and is not renamed by this patch yet. Signed-off-by: Marek Vasut --- drivers/usb/gadget/s3c_udc_otg.c | 18 ++++---- drivers/usb/gadget/s3c_udc_otg_xfer_dma.c | 76 +++++++++++++++---------------- 2 files changed, 47 insertions(+), 47 deletions(-) diff --git a/drivers/usb/gadget/s3c_udc_otg.c b/drivers/usb/gadget/s3c_udc_otg.c index 0b75f26..4cf82e2 100644 --- a/drivers/usb/gadget/s3c_udc_otg.c +++ b/drivers/usb/gadget/s3c_udc_otg.c @@ -108,8 +108,8 @@ static void udc_set_address(struct dwc2_udc *dev, unsigned char address); static void reconfig_usbd(struct dwc2_udc *dev); static void set_max_pktsize(struct dwc2_udc *dev, enum usb_device_speed speed); static void nuke(struct dwc2_ep *ep, int status); -static int s3c_udc_set_halt(struct usb_ep *_ep, int value); -static void s3c_udc_set_nak(struct dwc2_ep *ep); +static int dwc2_udc_set_halt(struct usb_ep *_ep, int value); +static void dwc2_udc_set_nak(struct dwc2_ep *ep); void set_udc_gadget_private_data(void *p) { @@ -134,7 +134,7 @@ static struct usb_ep_ops dwc2_ep_ops = { .queue = s3c_queue, .dequeue = s3c_dequeue, - .set_halt = s3c_udc_set_halt, + .set_halt = dwc2_udc_set_halt, .fifo_status = s3c_fifo_status, .fifo_flush = s3c_fifo_flush, }; @@ -578,11 +578,11 @@ static int dwc2_ep_enable(struct usb_ep *_ep, ep->ep.maxpacket = le16_to_cpu(get_unaligned(&desc->wMaxPacketSize)); /* Reset halt state */ - s3c_udc_set_nak(ep); - s3c_udc_set_halt(_ep, 0); + dwc2_udc_set_nak(ep); + dwc2_udc_set_halt(_ep, 0); spin_lock_irqsave(&ep->dev->lock, flags); - s3c_udc_ep_activate(ep); + dwc2_udc_ep_activate(ep); spin_unlock_irqrestore(&ep->dev->lock, flags); debug("%s: enabled %s, stopped = %d, maxpacket = %d\n", @@ -719,14 +719,14 @@ static void s3c_fifo_flush(struct usb_ep *_ep) debug("%s: %d\n", __func__, ep_index(ep)); } -static const struct usb_gadget_ops s3c_udc_ops = { +static const struct usb_gadget_ops dwc2_udc_ops = { /* current versions must always be self-powered */ }; static struct dwc2_udc memory = { .usb_address = 0, .gadget = { - .ops = &s3c_udc_ops, + .ops = &dwc2_udc_ops, .ep0 = &memory.ep[0].ep, .name = driver_name, }, @@ -840,6 +840,6 @@ int usb_gadget_handle_interrupts(int index) u32 gintmsk = readl(®->gintmsk); if (intr_status & gintmsk) - return s3c_udc_irq(1, (void *)the_controller); + return dwc2_udc_irq(1, (void *)the_controller); return 0; } diff --git a/drivers/usb/gadget/s3c_udc_otg_xfer_dma.c b/drivers/usb/gadget/s3c_udc_otg_xfer_dma.c index aa50639..e93d602 100644 --- a/drivers/usb/gadget/s3c_udc_otg_xfer_dma.c +++ b/drivers/usb/gadget/s3c_udc_otg_xfer_dma.c @@ -25,7 +25,7 @@ int clear_feature_flag; #define GET_MAX_LUN_REQUEST 0xFE #define BOT_RESET_REQUEST 0xFF -static inline void s3c_udc_ep0_zlp(struct dwc2_udc *dev) +static inline void dwc2_udc_ep0_zlp(struct dwc2_udc *dev) { u32 ep_ctrl; @@ -41,7 +41,7 @@ static inline void s3c_udc_ep0_zlp(struct dwc2_udc *dev) dev->ep0state = WAIT_FOR_IN_COMPLETE; } -static void s3c_udc_pre_setup(void) +static void dwc2_udc_pre_setup(void) { u32 ep_ctrl; @@ -240,7 +240,7 @@ static void complete_rx(struct dwc2_udc *dev, u8 ep_num) if (is_short || req->req.actual == req->req.length) { if (ep_num == EP0_CON && dev->ep0state == DATA_STATE_RECV) { debug_cond(DEBUG_OUT_EP != 0, " => Send ZLP\n"); - s3c_udc_ep0_zlp(dev); + dwc2_udc_ep0_zlp(dev); /* packet will be completed in complete_tx() */ dev->ep0state = WAIT_FOR_IN_COMPLETE; } else { @@ -335,7 +335,7 @@ static void complete_tx(struct dwc2_udc *dev, u8 ep_num) } } -static inline void s3c_udc_check_tx_queue(struct dwc2_udc *dev, u8 ep_num) +static inline void dwc2_udc_check_tx_queue(struct dwc2_udc *dev, u8 ep_num) { struct dwc2_ep *ep = &dev->ep[ep_num]; struct dwc2_request *req; @@ -392,12 +392,12 @@ static void process_ep_in_intr(struct dwc2_udc *dev) dev->ep0state = WAIT_FOR_SETUP; if (dev->ep0state == WAIT_FOR_SETUP) - s3c_udc_pre_setup(); + dwc2_udc_pre_setup(); /* continue transfer after set_clear_halt for DMA mode */ if (clear_feature_flag == 1) { - s3c_udc_check_tx_queue(dev, + dwc2_udc_check_tx_queue(dev, clear_feature_num); clear_feature_flag = 0; } @@ -438,7 +438,7 @@ static void process_ep_out_intr(struct dwc2_udc *dev) complete_rx(dev, ep_num); else { dev->ep0state = WAIT_FOR_SETUP; - s3c_udc_pre_setup(); + dwc2_udc_pre_setup(); } } @@ -461,7 +461,7 @@ static void process_ep_out_intr(struct dwc2_udc *dev) /* * usb client interrupt handler. */ -static int s3c_udc_irq(int irq, void *_dev) +static int dwc2_udc_irq(int irq, void *_dev) { struct dwc2_udc *dev = _dev; u32 intr_status; @@ -554,7 +554,7 @@ static int s3c_udc_irq(int irq, void *_dev) reconfig_usbd(dev); dev->ep0state = WAIT_FOR_SETUP; reset_available = 0; - s3c_udc_pre_setup(); + dwc2_udc_pre_setup(); } else reset_available = 1; @@ -742,7 +742,7 @@ static void udc_set_address(struct dwc2_udc *dev, unsigned char address) u32 ctrl = readl(®->dcfg); writel(DEVICE_ADDRESS(address) | ctrl, ®->dcfg); - s3c_udc_ep0_zlp(dev); + dwc2_udc_ep0_zlp(dev); debug_cond(DEBUG_EP0 != 0, "%s: USB OTG 2.0 Device address=%d, DCFG=0x%x\n", @@ -751,7 +751,7 @@ static void udc_set_address(struct dwc2_udc *dev, unsigned char address) dev->usb_address = address; } -static inline void s3c_udc_ep0_set_stall(struct dwc2_ep *ep) +static inline void dwc2_udc_ep0_set_stall(struct dwc2_ep *ep) { struct dwc2_udc *dev; u32 ep_ctrl = 0; @@ -776,7 +776,7 @@ static inline void s3c_udc_ep0_set_stall(struct dwc2_ep *ep) */ dev->ep0state = WAIT_FOR_SETUP; - s3c_udc_pre_setup(); + dwc2_udc_pre_setup(); } static void dwc2_ep0_read(struct dwc2_udc *dev) @@ -802,7 +802,7 @@ static void dwc2_ep0_read(struct dwc2_udc *dev) * or Bulk-Only mass storge reset */ ep->len = 0; - s3c_udc_ep0_zlp(dev); + dwc2_udc_ep0_zlp(dev); debug_cond(DEBUG_EP0 != 0, "%s: req.length = 0, bRequest = %d\n", @@ -859,7 +859,7 @@ static int dwc2_ep0_write(struct dwc2_udc *dev) return 1; } -static int s3c_udc_get_status(struct dwc2_udc *dev, +static int dwc2_udc_get_status(struct dwc2_udc *dev, struct usb_ctrlrequest *crq) { u8 ep_num = crq->wIndex & 0x7F; @@ -920,7 +920,7 @@ static int s3c_udc_get_status(struct dwc2_udc *dev, return 0; } -static void s3c_udc_set_nak(struct dwc2_ep *ep) +static void dwc2_udc_set_nak(struct dwc2_ep *ep) { u8 ep_num; u32 ep_ctrl = 0; @@ -946,7 +946,7 @@ static void s3c_udc_set_nak(struct dwc2_ep *ep) } -static void s3c_udc_ep_set_stall(struct dwc2_ep *ep) +static void dwc2_udc_ep_set_stall(struct dwc2_ep *ep) { u8 ep_num; u32 ep_ctrl = 0; @@ -981,7 +981,7 @@ static void s3c_udc_ep_set_stall(struct dwc2_ep *ep) return; } -static void s3c_udc_ep_clear_stall(struct dwc2_ep *ep) +static void dwc2_udc_ep_clear_stall(struct dwc2_ep *ep) { u8 ep_num; u32 ep_ctrl = 0; @@ -1029,7 +1029,7 @@ static void s3c_udc_ep_clear_stall(struct dwc2_ep *ep) return; } -static int s3c_udc_set_halt(struct usb_ep *_ep, int value) +static int dwc2_udc_set_halt(struct usb_ep *_ep, int value) { struct dwc2_ep *ep; struct dwc2_udc *dev; @@ -1062,13 +1062,13 @@ static int s3c_udc_set_halt(struct usb_ep *_ep, int value) if (value == 0) { ep->stopped = 0; - s3c_udc_ep_clear_stall(ep); + dwc2_udc_ep_clear_stall(ep); } else { if (ep_num == 0) dev->ep0state = WAIT_FOR_SETUP; ep->stopped = 1; - s3c_udc_ep_set_stall(ep); + dwc2_udc_ep_set_stall(ep); } spin_unlock_irqrestore(&dev->lock, flags); @@ -1076,7 +1076,7 @@ static int s3c_udc_set_halt(struct usb_ep *_ep, int value) return 0; } -static void s3c_udc_ep_activate(struct dwc2_ep *ep) +static void dwc2_udc_ep_activate(struct dwc2_ep *ep) { u8 ep_num; u32 ep_ctrl = 0, daintmsk = 0; @@ -1123,7 +1123,7 @@ static void s3c_udc_ep_activate(struct dwc2_ep *ep) } -static int s3c_udc_clear_feature(struct usb_ep *_ep) +static int dwc2_udc_clear_feature(struct usb_ep *_ep) { struct dwc2_udc *dev; struct dwc2_ep *ep; @@ -1158,7 +1158,7 @@ static int s3c_udc_clear_feature(struct usb_ep *_ep) break; } - s3c_udc_ep0_zlp(dev); + dwc2_udc_ep0_zlp(dev); break; case USB_RECIP_ENDPOINT: @@ -1168,14 +1168,14 @@ static int s3c_udc_clear_feature(struct usb_ep *_ep) if (usb_ctrl->wValue == USB_ENDPOINT_HALT) { if (ep_num == 0) { - s3c_udc_ep0_set_stall(ep); + dwc2_udc_ep0_set_stall(ep); return 0; } - s3c_udc_ep0_zlp(dev); + dwc2_udc_ep0_zlp(dev); - s3c_udc_ep_clear_stall(ep); - s3c_udc_ep_activate(ep); + dwc2_udc_ep_clear_stall(ep); + dwc2_udc_ep_activate(ep); ep->stopped = 0; clear_feature_num = ep_num; @@ -1187,7 +1187,7 @@ static int s3c_udc_clear_feature(struct usb_ep *_ep) return 0; } -static int s3c_udc_set_feature(struct usb_ep *_ep) +static int dwc2_udc_set_feature(struct usb_ep *_ep) { struct dwc2_udc *dev; struct dwc2_ep *ep; @@ -1232,7 +1232,7 @@ static int s3c_udc_set_feature(struct usb_ep *_ep) break; } - s3c_udc_ep0_zlp(dev); + dwc2_udc_ep0_zlp(dev); return 0; case USB_RECIP_INTERFACE: @@ -1245,14 +1245,14 @@ static int s3c_udc_set_feature(struct usb_ep *_ep) "\tSET_FEATURE: USB_RECIP_ENDPOINT\n"); if (usb_ctrl->wValue == USB_ENDPOINT_HALT) { if (ep_num == 0) { - s3c_udc_ep0_set_stall(ep); + dwc2_udc_ep0_set_stall(ep); return 0; } ep->stopped = 1; - s3c_udc_ep_set_stall(ep); + dwc2_udc_ep_set_stall(ep); } - s3c_udc_ep0_zlp(dev); + dwc2_udc_ep0_zlp(dev); return 0; } @@ -1306,7 +1306,7 @@ static void dwc2_ep0_setup(struct dwc2_udc *dev) "wLength = %d, setup returned\n", usb_ctrl->wLength); - s3c_udc_ep0_set_stall(ep); + dwc2_udc_ep0_set_stall(ep); dev->ep0state = WAIT_FOR_SETUP; return; @@ -1317,7 +1317,7 @@ static void dwc2_ep0_setup(struct dwc2_udc *dev) "%s:BOT Rest:invalid wLength =%d, setup returned\n", __func__, usb_ctrl->wLength); - s3c_udc_ep0_set_stall(ep); + dwc2_udc_ep0_set_stall(ep); dev->ep0state = WAIT_FOR_SETUP; return; @@ -1384,7 +1384,7 @@ static void dwc2_ep0_setup(struct dwc2_udc *dev) break; case USB_REQ_GET_STATUS: - if (!s3c_udc_get_status(dev, usb_ctrl)) + if (!dwc2_udc_get_status(dev, usb_ctrl)) return; break; @@ -1392,7 +1392,7 @@ static void dwc2_ep0_setup(struct dwc2_udc *dev) case USB_REQ_CLEAR_FEATURE: ep_num = usb_ctrl->wIndex & 0x7f; - if (!s3c_udc_clear_feature(&dev->ep[ep_num].ep)) + if (!dwc2_udc_clear_feature(&dev->ep[ep_num].ep)) return; break; @@ -1400,7 +1400,7 @@ static void dwc2_ep0_setup(struct dwc2_udc *dev) case USB_REQ_SET_FEATURE: ep_num = usb_ctrl->wIndex & 0x7f; - if (!s3c_udc_set_feature(&dev->ep[ep_num].ep)) + if (!dwc2_udc_set_feature(&dev->ep[ep_num].ep)) return; break; @@ -1427,7 +1427,7 @@ static void dwc2_ep0_setup(struct dwc2_udc *dev) if (i < 0) { /* setup processing failed, force stall */ - s3c_udc_ep0_set_stall(ep); + dwc2_udc_ep0_set_stall(ep); dev->ep0state = WAIT_FOR_SETUP; debug_cond(DEBUG_SETUP != 0, -- cgit v1.1 From 155e740f73b75c34a5f97f57a2d25d069c0f9375 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Fri, 4 Dec 2015 02:17:40 +0100 Subject: usb: s3c-otg: Rename remaining local s3c_*() functions The driver is actually for the Designware DWC2 controller. This patch renames the remaining local s3c_*() functions to reflect this. Signed-off-by: Marek Vasut --- drivers/usb/gadget/s3c_udc_otg.c | 36 +++++++++++++++---------------- drivers/usb/gadget/s3c_udc_otg_xfer_dma.c | 10 ++++----- 2 files changed, 23 insertions(+), 23 deletions(-) diff --git a/drivers/usb/gadget/s3c_udc_otg.c b/drivers/usb/gadget/s3c_udc_otg.c index 4cf82e2..a960eff 100644 --- a/drivers/usb/gadget/s3c_udc_otg.c +++ b/drivers/usb/gadget/s3c_udc_otg.c @@ -87,17 +87,17 @@ static dma_addr_t usb_ctrl_dma_addr; static int dwc2_ep_enable(struct usb_ep *ep, const struct usb_endpoint_descriptor *); static int dwc2_ep_disable(struct usb_ep *ep); -static struct usb_request *s3c_alloc_request(struct usb_ep *ep, +static struct usb_request *dwc2_alloc_request(struct usb_ep *ep, gfp_t gfp_flags); -static void s3c_free_request(struct usb_ep *ep, struct usb_request *); +static void dwc2_free_request(struct usb_ep *ep, struct usb_request *); -static int s3c_queue(struct usb_ep *ep, struct usb_request *, gfp_t gfp_flags); -static int s3c_dequeue(struct usb_ep *ep, struct usb_request *); -static int s3c_fifo_status(struct usb_ep *ep); -static void s3c_fifo_flush(struct usb_ep *ep); +static int dwc2_queue(struct usb_ep *ep, struct usb_request *, gfp_t gfp_flags); +static int dwc2_dequeue(struct usb_ep *ep, struct usb_request *); +static int dwc2_fifo_status(struct usb_ep *ep); +static void dwc2_fifo_flush(struct usb_ep *ep); static void dwc2_ep0_read(struct dwc2_udc *dev); static void dwc2_ep0_kick(struct dwc2_udc *dev, struct dwc2_ep *ep); -static void s3c_handle_ep0(struct dwc2_udc *dev); +static void dwc2_handle_ep0(struct dwc2_udc *dev); static int dwc2_ep0_write(struct dwc2_udc *dev); static int write_fifo_ep0(struct dwc2_ep *ep, struct dwc2_request *req); static void done(struct dwc2_ep *ep, struct dwc2_request *req, int status); @@ -128,15 +128,15 @@ static struct usb_ep_ops dwc2_ep_ops = { .enable = dwc2_ep_enable, .disable = dwc2_ep_disable, - .alloc_request = s3c_alloc_request, - .free_request = s3c_free_request, + .alloc_request = dwc2_alloc_request, + .free_request = dwc2_free_request, - .queue = s3c_queue, - .dequeue = s3c_dequeue, + .queue = dwc2_queue, + .dequeue = dwc2_dequeue, .set_halt = dwc2_udc_set_halt, - .fifo_status = s3c_fifo_status, - .fifo_flush = s3c_fifo_flush, + .fifo_status = dwc2_fifo_status, + .fifo_flush = dwc2_fifo_flush, }; #define create_proc_files() do {} while (0) @@ -621,7 +621,7 @@ static int dwc2_ep_disable(struct usb_ep *_ep) return 0; } -static struct usb_request *s3c_alloc_request(struct usb_ep *ep, +static struct usb_request *dwc2_alloc_request(struct usb_ep *ep, gfp_t gfp_flags) { struct dwc2_request *req; @@ -638,7 +638,7 @@ static struct usb_request *s3c_alloc_request(struct usb_ep *ep, return &req->req; } -static void s3c_free_request(struct usb_ep *ep, struct usb_request *_req) +static void dwc2_free_request(struct usb_ep *ep, struct usb_request *_req) { struct dwc2_request *req; @@ -650,7 +650,7 @@ static void s3c_free_request(struct usb_ep *ep, struct usb_request *_req) } /* dequeue JUST ONE request */ -static int s3c_dequeue(struct usb_ep *_ep, struct usb_request *_req) +static int dwc2_dequeue(struct usb_ep *_ep, struct usb_request *_req) { struct dwc2_ep *ep; struct dwc2_request *req; @@ -683,7 +683,7 @@ static int s3c_dequeue(struct usb_ep *_ep, struct usb_request *_req) /* * Return bytes in EP FIFO */ -static int s3c_fifo_status(struct usb_ep *_ep) +static int dwc2_fifo_status(struct usb_ep *_ep) { int count = 0; struct dwc2_ep *ep; @@ -706,7 +706,7 @@ static int s3c_fifo_status(struct usb_ep *_ep) /* * Flush EP FIFO */ -static void s3c_fifo_flush(struct usb_ep *_ep) +static void dwc2_fifo_flush(struct usb_ep *_ep) { struct dwc2_ep *ep; diff --git a/drivers/usb/gadget/s3c_udc_otg_xfer_dma.c b/drivers/usb/gadget/s3c_udc_otg_xfer_dma.c index e93d602..b8b2703 100644 --- a/drivers/usb/gadget/s3c_udc_otg_xfer_dma.c +++ b/drivers/usb/gadget/s3c_udc_otg_xfer_dma.c @@ -446,7 +446,7 @@ static void process_ep_out_intr(struct dwc2_udc *dev) CTRL_OUT_EP_SETUP_PHASE_DONE) { debug_cond(DEBUG_OUT_EP != 0, "SETUP packet arrived\n"); - s3c_handle_ep0(dev); + dwc2_handle_ep0(dev); } } else { if (ep_intr_status & TRANSFER_DONE) @@ -579,7 +579,7 @@ static int dwc2_udc_irq(int irq, void *_dev) /** Queue one request * Kickstart transfer if needed */ -static int s3c_queue(struct usb_ep *_ep, struct usb_request *_req, +static int dwc2_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags) { struct dwc2_request *req; @@ -718,7 +718,7 @@ static int write_fifo_ep0(struct dwc2_ep *ep, struct dwc2_request *req) return 0; } -static int s3c_fifo_read(struct dwc2_ep *ep, u32 *cp, int max) +static int dwc2_fifo_read(struct dwc2_ep *ep, u32 *cp, int max) { invalidate_dcache_range((unsigned long)cp, (unsigned long)cp + ROUND(max, CONFIG_SYS_CACHELINE_SIZE)); @@ -1272,7 +1272,7 @@ static void dwc2_ep0_setup(struct dwc2_udc *dev) nuke(ep, -EPROTO); /* read control req from fifo (8 bytes) */ - s3c_fifo_read(ep, (u32 *)usb_ctrl, 8); + dwc2_fifo_read(ep, (u32 *)usb_ctrl, 8); debug_cond(DEBUG_SETUP != 0, "%s: bRequestType = 0x%x(%s), bRequest = 0x%x" @@ -1451,7 +1451,7 @@ static void dwc2_ep0_setup(struct dwc2_udc *dev) /* * handle ep0 interrupt */ -static void s3c_handle_ep0(struct dwc2_udc *dev) +static void dwc2_handle_ep0(struct dwc2_udc *dev) { if (dev->ep0state == WAIT_FOR_SETUP) { debug_cond(DEBUG_OUT_EP != 0, -- cgit v1.1 From 193979e2fe7cf75cb7434341562b1da7153750f7 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Fri, 4 Dec 2015 02:21:41 +0100 Subject: usb: s3c-otg: Zap useless externs The extern statements are useless, remove them. Also remove the extern ... controller, which is completely useless. Signed-off-by: Marek Vasut --- drivers/usb/gadget/s3c_udc_otg_priv.h | 6 ++---- include/usb/s3c_udc.h | 2 +- 2 files changed, 3 insertions(+), 5 deletions(-) diff --git a/drivers/usb/gadget/s3c_udc_otg_priv.h b/drivers/usb/gadget/s3c_udc_otg_priv.h index cc10704..fb3a019 100644 --- a/drivers/usb/gadget/s3c_udc_otg_priv.h +++ b/drivers/usb/gadget/s3c_udc_otg_priv.h @@ -88,13 +88,11 @@ struct dwc2_udc { unsigned req_pending:1, req_std:1; }; -extern struct dwc2_udc *the_controller; - #define ep_is_in(EP) (((EP)->bEndpointAddress&USB_DIR_IN) == USB_DIR_IN) #define ep_index(EP) ((EP)->bEndpointAddress&0xF) #define ep_maxpacket(EP) ((EP)->ep.maxpacket) -extern void otg_phy_init(struct dwc2_udc *dev); -extern void otg_phy_off(struct dwc2_udc *dev); +void otg_phy_init(struct dwc2_udc *dev); +void otg_phy_off(struct dwc2_udc *dev); #endif /* __S3C_UDC_OTG_PRIV__ */ diff --git a/include/usb/s3c_udc.h b/include/usb/s3c_udc.h index 67c3e91..20af629 100644 --- a/include/usb/s3c_udc.h +++ b/include/usb/s3c_udc.h @@ -20,6 +20,6 @@ struct s3c_plat_otg_data { unsigned int usb_gusbcfg; }; -extern int s3c_udc_probe(struct s3c_plat_otg_data *pdata); +int s3c_udc_probe(struct s3c_plat_otg_data *pdata); #endif -- cgit v1.1 From 06cb6ccd8e2e7cc1318709c6dc350a296ca9f477 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Fri, 4 Dec 2015 02:28:40 +0100 Subject: usb: s3c-otg: Change the driver name to dwc2-udc Just change the driver name. Signed-off-by: Marek Vasut --- drivers/usb/gadget/s3c_udc_otg.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/usb/gadget/s3c_udc_otg.c b/drivers/usb/gadget/s3c_udc_otg.c index a960eff..9cb6849 100644 --- a/drivers/usb/gadget/s3c_udc_otg.c +++ b/drivers/usb/gadget/s3c_udc_otg.c @@ -63,12 +63,12 @@ static char *state_names[] = { "WAIT_FOR_NULL_COMPLETE", }; -#define DRIVER_DESC "S3C HS USB OTG Device Driver, (c) Samsung Electronics" +#define DRIVER_DESC "DWC2 HS USB OTG Device Driver, (c) Samsung Electronics" #define DRIVER_VERSION "15 March 2009" struct dwc2_udc *the_controller; -static const char driver_name[] = "s3c-udc"; +static const char driver_name[] = "dwc2-udc"; static const char driver_desc[] = DRIVER_DESC; static const char ep0name[] = "ep0-control"; @@ -219,7 +219,7 @@ static int udc_enable(struct dwc2_udc *dev) reconfig_usbd(dev); debug_cond(DEBUG_SETUP != 0, - "S3C USB 2.0 OTG Controller Core Initialized : 0x%x\n", + "DWC2 USB 2.0 OTG Controller Core Initialized : 0x%x\n", readl(®->gintmsk)); dev->gadget.speed = USB_SPEED_UNKNOWN; -- cgit v1.1 From f4d9bd06f72ec554e01b29f710243d47f047f5bc Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Fri, 4 Dec 2015 02:32:22 +0100 Subject: usb: s3c-otg: Rename local headers to dwc2_*h The driver is actually for the Designware DWC2 controller. This patch renames the local header files to dwc2_*h and adjusts the sources to use the new names. Signed-off-by: Marek Vasut --- drivers/usb/gadget/bcm_udc_otg_phy.c | 2 +- drivers/usb/gadget/dwc2_udc_otg_priv.h | 98 ++++++++++++ drivers/usb/gadget/dwc2_udc_otg_regs.h | 273 +++++++++++++++++++++++++++++++++ drivers/usb/gadget/s3c_udc_otg.c | 4 +- drivers/usb/gadget/s3c_udc_otg_phy.c | 4 +- drivers/usb/gadget/s3c_udc_otg_priv.h | 98 ------------ drivers/usb/gadget/s3c_udc_otg_regs.h | 273 --------------------------------- 7 files changed, 376 insertions(+), 376 deletions(-) create mode 100644 drivers/usb/gadget/dwc2_udc_otg_priv.h create mode 100644 drivers/usb/gadget/dwc2_udc_otg_regs.h delete mode 100644 drivers/usb/gadget/s3c_udc_otg_priv.h delete mode 100644 drivers/usb/gadget/s3c_udc_otg_regs.h diff --git a/drivers/usb/gadget/bcm_udc_otg_phy.c b/drivers/usb/gadget/bcm_udc_otg_phy.c index c58388c..10b2e13 100644 --- a/drivers/usb/gadget/bcm_udc_otg_phy.c +++ b/drivers/usb/gadget/bcm_udc_otg_phy.c @@ -9,7 +9,7 @@ #include #include -#include "s3c_udc_otg_priv.h" +#include "dwc2_udc_otg_priv.h" #include "bcm_udc_otg.h" void otg_phy_init(struct dwc2_udc *dev) diff --git a/drivers/usb/gadget/dwc2_udc_otg_priv.h b/drivers/usb/gadget/dwc2_udc_otg_priv.h new file mode 100644 index 0000000..1dcb277 --- /dev/null +++ b/drivers/usb/gadget/dwc2_udc_otg_priv.h @@ -0,0 +1,98 @@ +/* + * Samsung S3C on-chip full/high speed USB device controllers + * Copyright (C) 2005 for Samsung Electronics + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __DWC2_UDC_OTG_PRIV__ +#define __DWC2_UDC_OTG_PRIV__ + +#include +#include +#include +#include +#include +#include +#include + +/*-------------------------------------------------------------------------*/ +/* DMA bounce buffer size, 16K is enough even for mass storage */ +#define DMA_BUFFER_SIZE (16*SZ_1K) + +#define EP0_FIFO_SIZE 64 +#define EP_FIFO_SIZE 512 +#define EP_FIFO_SIZE2 1024 +/* ep0-control, ep1in-bulk, ep2out-bulk, ep3in-int */ +#define S3C_MAX_ENDPOINTS 4 +#define S3C_MAX_HW_ENDPOINTS 16 + +#define WAIT_FOR_SETUP 0 +#define DATA_STATE_XMIT 1 +#define DATA_STATE_NEED_ZLP 2 +#define WAIT_FOR_OUT_STATUS 3 +#define DATA_STATE_RECV 4 +#define WAIT_FOR_COMPLETE 5 +#define WAIT_FOR_OUT_COMPLETE 6 +#define WAIT_FOR_IN_COMPLETE 7 +#define WAIT_FOR_NULL_COMPLETE 8 + +#define TEST_J_SEL 0x1 +#define TEST_K_SEL 0x2 +#define TEST_SE0_NAK_SEL 0x3 +#define TEST_PACKET_SEL 0x4 +#define TEST_FORCE_ENABLE_SEL 0x5 + +/* ************************************************************************* */ +/* IO + */ + +enum ep_type { + ep_control, ep_bulk_in, ep_bulk_out, ep_interrupt +}; + +struct dwc2_ep { + struct usb_ep ep; + struct dwc2_udc *dev; + + const struct usb_endpoint_descriptor *desc; + struct list_head queue; + unsigned long pio_irqs; + int len; + void *dma_buf; + + u8 stopped; + u8 bEndpointAddress; + u8 bmAttributes; + + enum ep_type ep_type; + int fifo_num; +}; + +struct dwc2_request { + struct usb_request req; + struct list_head queue; +}; + +struct dwc2_udc { + struct usb_gadget gadget; + struct usb_gadget_driver *driver; + + struct s3c_plat_otg_data *pdata; + + int ep0state; + struct dwc2_ep ep[S3C_MAX_ENDPOINTS]; + + unsigned char usb_address; + + unsigned req_pending:1, req_std:1; +}; + +#define ep_is_in(EP) (((EP)->bEndpointAddress&USB_DIR_IN) == USB_DIR_IN) +#define ep_index(EP) ((EP)->bEndpointAddress&0xF) +#define ep_maxpacket(EP) ((EP)->ep.maxpacket) + +void otg_phy_init(struct dwc2_udc *dev); +void otg_phy_off(struct dwc2_udc *dev); + +#endif /* __DWC2_UDC_OTG_PRIV__ */ diff --git a/drivers/usb/gadget/dwc2_udc_otg_regs.h b/drivers/usb/gadget/dwc2_udc_otg_regs.h new file mode 100644 index 0000000..57affcb --- /dev/null +++ b/drivers/usb/gadget/dwc2_udc_otg_regs.h @@ -0,0 +1,273 @@ +/* linux/arch/arm/plat-s3c/include/plat/regs-otg.h + * + * Copyright (C) 2004 Herbert Poetzl + * + * Registers remapping: + * Lukasz Majewski + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __ASM_ARCH_REGS_USB_OTG_HS_H +#define __ASM_ARCH_REGS_USB_OTG_HS_H + +/* USB2.0 OTG Controller register */ +struct dwc2_usbotg_phy { + u32 phypwr; + u32 phyclk; + u32 rstcon; +}; + +/* Device Logical IN Endpoint-Specific Registers */ +struct dwc2_dev_in_endp { + u32 diepctl; + u8 res1[4]; + u32 diepint; + u8 res2[4]; + u32 dieptsiz; + u32 diepdma; + u8 res3[4]; + u32 diepdmab; +}; + +/* Device Logical OUT Endpoint-Specific Registers */ +struct dwc2_dev_out_endp { + u32 doepctl; + u8 res1[4]; + u32 doepint; + u8 res2[4]; + u32 doeptsiz; + u32 doepdma; + u8 res3[4]; + u32 doepdmab; +}; + +struct ep_fifo { + u32 fifo; + u8 res[4092]; +}; + +/* USB2.0 OTG Controller register */ +struct dwc2_usbotg_reg { + /* Core Global Registers */ + u32 gotgctl; /* OTG Control & Status */ + u32 gotgint; /* OTG Interrupt */ + u32 gahbcfg; /* Core AHB Configuration */ + u32 gusbcfg; /* Core USB Configuration */ + u32 grstctl; /* Core Reset */ + u32 gintsts; /* Core Interrupt */ + u32 gintmsk; /* Core Interrupt Mask */ + u32 grxstsr; /* Receive Status Debug Read/Status Read */ + u32 grxstsp; /* Receive Status Debug Pop/Status Pop */ + u32 grxfsiz; /* Receive FIFO Size */ + u32 gnptxfsiz; /* Non-Periodic Transmit FIFO Size */ + u8 res1[216]; + u32 dieptxf[15]; /* Device Periodic Transmit FIFO size register */ + u8 res2[1728]; + /* Device Configuration */ + u32 dcfg; /* Device Configuration Register */ + u32 dctl; /* Device Control */ + u32 dsts; /* Device Status */ + u8 res3[4]; + u32 diepmsk; /* Device IN Endpoint Common Interrupt Mask */ + u32 doepmsk; /* Device OUT Endpoint Common Interrupt Mask */ + u32 daint; /* Device All Endpoints Interrupt */ + u32 daintmsk; /* Device All Endpoints Interrupt Mask */ + u8 res4[224]; + struct dwc2_dev_in_endp in_endp[16]; + struct dwc2_dev_out_endp out_endp[16]; + u8 res5[768]; + struct ep_fifo ep[16]; +}; + +/*===================================================================== */ +/*definitions related to CSR setting */ + +/* S3C_UDC_OTG_GOTGCTL */ +#define B_SESSION_VALID (0x1<<19) +#define A_SESSION_VALID (0x1<<18) + +/* S3C_UDC_OTG_GAHBCFG */ +#define PTXFE_HALF (0<<8) +#define PTXFE_ZERO (1<<8) +#define NPTXFE_HALF (0<<7) +#define NPTXFE_ZERO (1<<7) +#define MODE_SLAVE (0<<5) +#define MODE_DMA (1<<5) +#define BURST_SINGLE (0<<1) +#define BURST_INCR (1<<1) +#define BURST_INCR4 (3<<1) +#define BURST_INCR8 (5<<1) +#define BURST_INCR16 (7<<1) +#define GBL_INT_UNMASK (1<<0) +#define GBL_INT_MASK (0<<0) + +/* S3C_UDC_OTG_GRSTCTL */ +#define AHB_MASTER_IDLE (1u<<31) +#define CORE_SOFT_RESET (0x1<<0) + +/* S3C_UDC_OTG_GINTSTS/S3C_UDC_OTG_GINTMSK core interrupt register */ +#define INT_RESUME (1u<<31) +#define INT_DISCONN (0x1<<29) +#define INT_CONN_ID_STS_CNG (0x1<<28) +#define INT_OUT_EP (0x1<<19) +#define INT_IN_EP (0x1<<18) +#define INT_ENUMDONE (0x1<<13) +#define INT_RESET (0x1<<12) +#define INT_SUSPEND (0x1<<11) +#define INT_EARLY_SUSPEND (0x1<<10) +#define INT_NP_TX_FIFO_EMPTY (0x1<<5) +#define INT_RX_FIFO_NOT_EMPTY (0x1<<4) +#define INT_SOF (0x1<<3) +#define INT_DEV_MODE (0x0<<0) +#define INT_HOST_MODE (0x1<<1) +#define INT_GOUTNakEff (0x01<<7) +#define INT_GINNakEff (0x01<<6) + +#define FULL_SPEED_CONTROL_PKT_SIZE 8 +#define FULL_SPEED_BULK_PKT_SIZE 64 + +#define HIGH_SPEED_CONTROL_PKT_SIZE 64 +#define HIGH_SPEED_BULK_PKT_SIZE 512 + +#define RX_FIFO_SIZE (1024*4) +#define NPTX_FIFO_SIZE (1024*4) +#define PTX_FIFO_SIZE (1536*1) + +#define DEPCTL_TXFNUM_0 (0x0<<22) +#define DEPCTL_TXFNUM_1 (0x1<<22) +#define DEPCTL_TXFNUM_2 (0x2<<22) +#define DEPCTL_TXFNUM_3 (0x3<<22) +#define DEPCTL_TXFNUM_4 (0x4<<22) + +/* Enumeration speed */ +#define USB_HIGH_30_60MHZ (0x0<<1) +#define USB_FULL_30_60MHZ (0x1<<1) +#define USB_LOW_6MHZ (0x2<<1) +#define USB_FULL_48MHZ (0x3<<1) + +/* S3C_UDC_OTG_GRXSTSP STATUS */ +#define OUT_PKT_RECEIVED (0x2<<17) +#define OUT_TRANSFER_COMPLELTED (0x3<<17) +#define SETUP_TRANSACTION_COMPLETED (0x4<<17) +#define SETUP_PKT_RECEIVED (0x6<<17) +#define GLOBAL_OUT_NAK (0x1<<17) + +/* S3C_UDC_OTG_DCTL device control register */ +#define NORMAL_OPERATION (0x1<<0) +#define SOFT_DISCONNECT (0x1<<1) + +/* S3C_UDC_OTG_DAINT device all endpoint interrupt register */ +#define DAINT_OUT_BIT (16) +#define DAINT_MASK (0xFFFF) + +/* S3C_UDC_OTG_DIEPCTL0/DOEPCTL0 device + control IN/OUT endpoint 0 control register */ +#define DEPCTL_EPENA (0x1<<31) +#define DEPCTL_EPDIS (0x1<<30) +#define DEPCTL_SETD1PID (0x1<<29) +#define DEPCTL_SETD0PID (0x1<<28) +#define DEPCTL_SNAK (0x1<<27) +#define DEPCTL_CNAK (0x1<<26) +#define DEPCTL_STALL (0x1<<21) +#define DEPCTL_TYPE_BIT (18) +#define DEPCTL_TYPE_MASK (0x3<<18) +#define DEPCTL_CTRL_TYPE (0x0<<18) +#define DEPCTL_ISO_TYPE (0x1<<18) +#define DEPCTL_BULK_TYPE (0x2<<18) +#define DEPCTL_INTR_TYPE (0x3<<18) +#define DEPCTL_USBACTEP (0x1<<15) +#define DEPCTL_NEXT_EP_BIT (11) +#define DEPCTL_MPS_BIT (0) +#define DEPCTL_MPS_MASK (0x7FF) + +#define DEPCTL0_MPS_64 (0x0<<0) +#define DEPCTL0_MPS_32 (0x1<<0) +#define DEPCTL0_MPS_16 (0x2<<0) +#define DEPCTL0_MPS_8 (0x3<<0) +#define DEPCTL_MPS_BULK_512 (512<<0) +#define DEPCTL_MPS_INT_MPS_16 (16<<0) + +#define DIEPCTL0_NEXT_EP_BIT (11) + + +/* S3C_UDC_OTG_DIEPMSK/DOEPMSK device IN/OUT endpoint + common interrupt mask register */ +/* S3C_UDC_OTG_DIEPINTn/DOEPINTn device IN/OUT endpoint interrupt register */ +#define BACK2BACK_SETUP_RECEIVED (0x1<<6) +#define INTKNEPMIS (0x1<<5) +#define INTKN_TXFEMP (0x1<<4) +#define NON_ISO_IN_EP_TIMEOUT (0x1<<3) +#define CTRL_OUT_EP_SETUP_PHASE_DONE (0x1<<3) +#define AHB_ERROR (0x1<<2) +#define EPDISBLD (0x1<<1) +#define TRANSFER_DONE (0x1<<0) + +#define USB_PHY_CTRL_EN0 (0x1 << 0) + +/* OPHYPWR */ +#define PHY_0_SLEEP (0x1 << 5) +#define OTG_DISABLE_0 (0x1 << 4) +#define ANALOG_PWRDOWN (0x1 << 3) +#define FORCE_SUSPEND_0 (0x1 << 0) + +/* URSTCON */ +#define HOST_SW_RST (0x1 << 4) +#define PHY_SW_RST1 (0x1 << 3) +#define PHYLNK_SW_RST (0x1 << 2) +#define LINK_SW_RST (0x1 << 1) +#define PHY_SW_RST0 (0x1 << 0) + +/* OPHYCLK */ +#define COMMON_ON_N1 (0x1 << 7) +#define COMMON_ON_N0 (0x1 << 4) +#define ID_PULLUP0 (0x1 << 2) +#define CLK_SEL_24MHZ (0x3 << 0) +#define CLK_SEL_12MHZ (0x2 << 0) +#define CLK_SEL_48MHZ (0x0 << 0) + +#define EXYNOS4X12_ID_PULLUP0 (0x01 << 3) +#define EXYNOS4X12_COMMON_ON_N0 (0x01 << 4) +#define EXYNOS4X12_CLK_SEL_12MHZ (0x02 << 0) +#define EXYNOS4X12_CLK_SEL_24MHZ (0x05 << 0) + +/* Device Configuration Register DCFG */ +#define DEV_SPEED_HIGH_SPEED_20 (0x0 << 0) +#define DEV_SPEED_FULL_SPEED_20 (0x1 << 0) +#define DEV_SPEED_LOW_SPEED_11 (0x2 << 0) +#define DEV_SPEED_FULL_SPEED_11 (0x3 << 0) +#define EP_MISS_CNT(x) (x << 18) +#define DEVICE_ADDRESS(x) (x << 4) + +/* Core Reset Register (GRSTCTL) */ +#define TX_FIFO_FLUSH (0x1 << 5) +#define RX_FIFO_FLUSH (0x1 << 4) +#define TX_FIFO_NUMBER(x) (x << 6) +#define TX_FIFO_FLUSH_ALL TX_FIFO_NUMBER(0x10) + +/* Masks definitions */ +#define GINTMSK_INIT (INT_OUT_EP | INT_IN_EP | INT_RESUME | INT_ENUMDONE\ + | INT_RESET | INT_SUSPEND) +#define DOEPMSK_INIT (CTRL_OUT_EP_SETUP_PHASE_DONE | AHB_ERROR|TRANSFER_DONE) +#define DIEPMSK_INIT (NON_ISO_IN_EP_TIMEOUT|AHB_ERROR|TRANSFER_DONE) +#define GAHBCFG_INIT (PTXFE_HALF | NPTXFE_HALF | MODE_DMA | BURST_INCR4\ + | GBL_INT_UNMASK) + +/* Device Endpoint X Transfer Size Register (DIEPTSIZX) */ +#define DIEPT_SIZ_PKT_CNT(x) (x << 19) +#define DIEPT_SIZ_XFER_SIZE(x) (x << 0) + +/* Device OUT Endpoint X Transfer Size Register (DOEPTSIZX) */ +#define DOEPT_SIZ_PKT_CNT(x) (x << 19) +#define DOEPT_SIZ_XFER_SIZE(x) (x << 0) +#define DOEPT_SIZ_XFER_SIZE_MAX_EP0 (0x7F << 0) +#define DOEPT_SIZ_XFER_SIZE_MAX_EP (0x7FFF << 0) + +/* Device Endpoint-N Control Register (DIEPCTLn/DOEPCTLn) */ +#define DIEPCTL_TX_FIFO_NUM(x) (x << 22) +#define DIEPCTL_TX_FIFO_NUM_MASK (~DIEPCTL_TX_FIFO_NUM(0xF)) + +/* Device ALL Endpoints Interrupt Register (DAINT) */ +#define DAINT_IN_EP_INT(x) (x << 0) +#define DAINT_OUT_EP_INT(x) (x << 16) +#endif diff --git a/drivers/usb/gadget/s3c_udc_otg.c b/drivers/usb/gadget/s3c_udc_otg.c index 9cb6849..0bff63f 100644 --- a/drivers/usb/gadget/s3c_udc_otg.c +++ b/drivers/usb/gadget/s3c_udc_otg.c @@ -32,8 +32,8 @@ #include -#include "s3c_udc_otg_regs.h" -#include "s3c_udc_otg_priv.h" +#include "dwc2_udc_otg_regs.h" +#include "dwc2_udc_otg_priv.h" #include /***********************************************************/ diff --git a/drivers/usb/gadget/s3c_udc_otg_phy.c b/drivers/usb/gadget/s3c_udc_otg_phy.c index a761b43..ab7515b 100644 --- a/drivers/usb/gadget/s3c_udc_otg_phy.c +++ b/drivers/usb/gadget/s3c_udc_otg_phy.c @@ -32,8 +32,8 @@ #include -#include "s3c_udc_otg_regs.h" -#include "s3c_udc_otg_priv.h" +#include "dwc2_udc_otg_regs.h" +#include "dwc2_udc_otg_priv.h" #include #include diff --git a/drivers/usb/gadget/s3c_udc_otg_priv.h b/drivers/usb/gadget/s3c_udc_otg_priv.h deleted file mode 100644 index fb3a019..0000000 --- a/drivers/usb/gadget/s3c_udc_otg_priv.h +++ /dev/null @@ -1,98 +0,0 @@ -/* - * Samsung S3C on-chip full/high speed USB device controllers - * Copyright (C) 2005 for Samsung Electronics - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __S3C_UDC_OTG_PRIV__ -#define __S3C_UDC_OTG_PRIV__ - -#include -#include -#include -#include -#include -#include -#include - -/*-------------------------------------------------------------------------*/ -/* DMA bounce buffer size, 16K is enough even for mass storage */ -#define DMA_BUFFER_SIZE (16*SZ_1K) - -#define EP0_FIFO_SIZE 64 -#define EP_FIFO_SIZE 512 -#define EP_FIFO_SIZE2 1024 -/* ep0-control, ep1in-bulk, ep2out-bulk, ep3in-int */ -#define S3C_MAX_ENDPOINTS 4 -#define S3C_MAX_HW_ENDPOINTS 16 - -#define WAIT_FOR_SETUP 0 -#define DATA_STATE_XMIT 1 -#define DATA_STATE_NEED_ZLP 2 -#define WAIT_FOR_OUT_STATUS 3 -#define DATA_STATE_RECV 4 -#define WAIT_FOR_COMPLETE 5 -#define WAIT_FOR_OUT_COMPLETE 6 -#define WAIT_FOR_IN_COMPLETE 7 -#define WAIT_FOR_NULL_COMPLETE 8 - -#define TEST_J_SEL 0x1 -#define TEST_K_SEL 0x2 -#define TEST_SE0_NAK_SEL 0x3 -#define TEST_PACKET_SEL 0x4 -#define TEST_FORCE_ENABLE_SEL 0x5 - -/* ************************************************************************* */ -/* IO - */ - -enum ep_type { - ep_control, ep_bulk_in, ep_bulk_out, ep_interrupt -}; - -struct dwc2_ep { - struct usb_ep ep; - struct dwc2_udc *dev; - - const struct usb_endpoint_descriptor *desc; - struct list_head queue; - unsigned long pio_irqs; - int len; - void *dma_buf; - - u8 stopped; - u8 bEndpointAddress; - u8 bmAttributes; - - enum ep_type ep_type; - int fifo_num; -}; - -struct dwc2_request { - struct usb_request req; - struct list_head queue; -}; - -struct dwc2_udc { - struct usb_gadget gadget; - struct usb_gadget_driver *driver; - - struct s3c_plat_otg_data *pdata; - - int ep0state; - struct dwc2_ep ep[S3C_MAX_ENDPOINTS]; - - unsigned char usb_address; - - unsigned req_pending:1, req_std:1; -}; - -#define ep_is_in(EP) (((EP)->bEndpointAddress&USB_DIR_IN) == USB_DIR_IN) -#define ep_index(EP) ((EP)->bEndpointAddress&0xF) -#define ep_maxpacket(EP) ((EP)->ep.maxpacket) - -void otg_phy_init(struct dwc2_udc *dev); -void otg_phy_off(struct dwc2_udc *dev); - -#endif /* __S3C_UDC_OTG_PRIV__ */ diff --git a/drivers/usb/gadget/s3c_udc_otg_regs.h b/drivers/usb/gadget/s3c_udc_otg_regs.h deleted file mode 100644 index 57affcb..0000000 --- a/drivers/usb/gadget/s3c_udc_otg_regs.h +++ /dev/null @@ -1,273 +0,0 @@ -/* linux/arch/arm/plat-s3c/include/plat/regs-otg.h - * - * Copyright (C) 2004 Herbert Poetzl - * - * Registers remapping: - * Lukasz Majewski - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __ASM_ARCH_REGS_USB_OTG_HS_H -#define __ASM_ARCH_REGS_USB_OTG_HS_H - -/* USB2.0 OTG Controller register */ -struct dwc2_usbotg_phy { - u32 phypwr; - u32 phyclk; - u32 rstcon; -}; - -/* Device Logical IN Endpoint-Specific Registers */ -struct dwc2_dev_in_endp { - u32 diepctl; - u8 res1[4]; - u32 diepint; - u8 res2[4]; - u32 dieptsiz; - u32 diepdma; - u8 res3[4]; - u32 diepdmab; -}; - -/* Device Logical OUT Endpoint-Specific Registers */ -struct dwc2_dev_out_endp { - u32 doepctl; - u8 res1[4]; - u32 doepint; - u8 res2[4]; - u32 doeptsiz; - u32 doepdma; - u8 res3[4]; - u32 doepdmab; -}; - -struct ep_fifo { - u32 fifo; - u8 res[4092]; -}; - -/* USB2.0 OTG Controller register */ -struct dwc2_usbotg_reg { - /* Core Global Registers */ - u32 gotgctl; /* OTG Control & Status */ - u32 gotgint; /* OTG Interrupt */ - u32 gahbcfg; /* Core AHB Configuration */ - u32 gusbcfg; /* Core USB Configuration */ - u32 grstctl; /* Core Reset */ - u32 gintsts; /* Core Interrupt */ - u32 gintmsk; /* Core Interrupt Mask */ - u32 grxstsr; /* Receive Status Debug Read/Status Read */ - u32 grxstsp; /* Receive Status Debug Pop/Status Pop */ - u32 grxfsiz; /* Receive FIFO Size */ - u32 gnptxfsiz; /* Non-Periodic Transmit FIFO Size */ - u8 res1[216]; - u32 dieptxf[15]; /* Device Periodic Transmit FIFO size register */ - u8 res2[1728]; - /* Device Configuration */ - u32 dcfg; /* Device Configuration Register */ - u32 dctl; /* Device Control */ - u32 dsts; /* Device Status */ - u8 res3[4]; - u32 diepmsk; /* Device IN Endpoint Common Interrupt Mask */ - u32 doepmsk; /* Device OUT Endpoint Common Interrupt Mask */ - u32 daint; /* Device All Endpoints Interrupt */ - u32 daintmsk; /* Device All Endpoints Interrupt Mask */ - u8 res4[224]; - struct dwc2_dev_in_endp in_endp[16]; - struct dwc2_dev_out_endp out_endp[16]; - u8 res5[768]; - struct ep_fifo ep[16]; -}; - -/*===================================================================== */ -/*definitions related to CSR setting */ - -/* S3C_UDC_OTG_GOTGCTL */ -#define B_SESSION_VALID (0x1<<19) -#define A_SESSION_VALID (0x1<<18) - -/* S3C_UDC_OTG_GAHBCFG */ -#define PTXFE_HALF (0<<8) -#define PTXFE_ZERO (1<<8) -#define NPTXFE_HALF (0<<7) -#define NPTXFE_ZERO (1<<7) -#define MODE_SLAVE (0<<5) -#define MODE_DMA (1<<5) -#define BURST_SINGLE (0<<1) -#define BURST_INCR (1<<1) -#define BURST_INCR4 (3<<1) -#define BURST_INCR8 (5<<1) -#define BURST_INCR16 (7<<1) -#define GBL_INT_UNMASK (1<<0) -#define GBL_INT_MASK (0<<0) - -/* S3C_UDC_OTG_GRSTCTL */ -#define AHB_MASTER_IDLE (1u<<31) -#define CORE_SOFT_RESET (0x1<<0) - -/* S3C_UDC_OTG_GINTSTS/S3C_UDC_OTG_GINTMSK core interrupt register */ -#define INT_RESUME (1u<<31) -#define INT_DISCONN (0x1<<29) -#define INT_CONN_ID_STS_CNG (0x1<<28) -#define INT_OUT_EP (0x1<<19) -#define INT_IN_EP (0x1<<18) -#define INT_ENUMDONE (0x1<<13) -#define INT_RESET (0x1<<12) -#define INT_SUSPEND (0x1<<11) -#define INT_EARLY_SUSPEND (0x1<<10) -#define INT_NP_TX_FIFO_EMPTY (0x1<<5) -#define INT_RX_FIFO_NOT_EMPTY (0x1<<4) -#define INT_SOF (0x1<<3) -#define INT_DEV_MODE (0x0<<0) -#define INT_HOST_MODE (0x1<<1) -#define INT_GOUTNakEff (0x01<<7) -#define INT_GINNakEff (0x01<<6) - -#define FULL_SPEED_CONTROL_PKT_SIZE 8 -#define FULL_SPEED_BULK_PKT_SIZE 64 - -#define HIGH_SPEED_CONTROL_PKT_SIZE 64 -#define HIGH_SPEED_BULK_PKT_SIZE 512 - -#define RX_FIFO_SIZE (1024*4) -#define NPTX_FIFO_SIZE (1024*4) -#define PTX_FIFO_SIZE (1536*1) - -#define DEPCTL_TXFNUM_0 (0x0<<22) -#define DEPCTL_TXFNUM_1 (0x1<<22) -#define DEPCTL_TXFNUM_2 (0x2<<22) -#define DEPCTL_TXFNUM_3 (0x3<<22) -#define DEPCTL_TXFNUM_4 (0x4<<22) - -/* Enumeration speed */ -#define USB_HIGH_30_60MHZ (0x0<<1) -#define USB_FULL_30_60MHZ (0x1<<1) -#define USB_LOW_6MHZ (0x2<<1) -#define USB_FULL_48MHZ (0x3<<1) - -/* S3C_UDC_OTG_GRXSTSP STATUS */ -#define OUT_PKT_RECEIVED (0x2<<17) -#define OUT_TRANSFER_COMPLELTED (0x3<<17) -#define SETUP_TRANSACTION_COMPLETED (0x4<<17) -#define SETUP_PKT_RECEIVED (0x6<<17) -#define GLOBAL_OUT_NAK (0x1<<17) - -/* S3C_UDC_OTG_DCTL device control register */ -#define NORMAL_OPERATION (0x1<<0) -#define SOFT_DISCONNECT (0x1<<1) - -/* S3C_UDC_OTG_DAINT device all endpoint interrupt register */ -#define DAINT_OUT_BIT (16) -#define DAINT_MASK (0xFFFF) - -/* S3C_UDC_OTG_DIEPCTL0/DOEPCTL0 device - control IN/OUT endpoint 0 control register */ -#define DEPCTL_EPENA (0x1<<31) -#define DEPCTL_EPDIS (0x1<<30) -#define DEPCTL_SETD1PID (0x1<<29) -#define DEPCTL_SETD0PID (0x1<<28) -#define DEPCTL_SNAK (0x1<<27) -#define DEPCTL_CNAK (0x1<<26) -#define DEPCTL_STALL (0x1<<21) -#define DEPCTL_TYPE_BIT (18) -#define DEPCTL_TYPE_MASK (0x3<<18) -#define DEPCTL_CTRL_TYPE (0x0<<18) -#define DEPCTL_ISO_TYPE (0x1<<18) -#define DEPCTL_BULK_TYPE (0x2<<18) -#define DEPCTL_INTR_TYPE (0x3<<18) -#define DEPCTL_USBACTEP (0x1<<15) -#define DEPCTL_NEXT_EP_BIT (11) -#define DEPCTL_MPS_BIT (0) -#define DEPCTL_MPS_MASK (0x7FF) - -#define DEPCTL0_MPS_64 (0x0<<0) -#define DEPCTL0_MPS_32 (0x1<<0) -#define DEPCTL0_MPS_16 (0x2<<0) -#define DEPCTL0_MPS_8 (0x3<<0) -#define DEPCTL_MPS_BULK_512 (512<<0) -#define DEPCTL_MPS_INT_MPS_16 (16<<0) - -#define DIEPCTL0_NEXT_EP_BIT (11) - - -/* S3C_UDC_OTG_DIEPMSK/DOEPMSK device IN/OUT endpoint - common interrupt mask register */ -/* S3C_UDC_OTG_DIEPINTn/DOEPINTn device IN/OUT endpoint interrupt register */ -#define BACK2BACK_SETUP_RECEIVED (0x1<<6) -#define INTKNEPMIS (0x1<<5) -#define INTKN_TXFEMP (0x1<<4) -#define NON_ISO_IN_EP_TIMEOUT (0x1<<3) -#define CTRL_OUT_EP_SETUP_PHASE_DONE (0x1<<3) -#define AHB_ERROR (0x1<<2) -#define EPDISBLD (0x1<<1) -#define TRANSFER_DONE (0x1<<0) - -#define USB_PHY_CTRL_EN0 (0x1 << 0) - -/* OPHYPWR */ -#define PHY_0_SLEEP (0x1 << 5) -#define OTG_DISABLE_0 (0x1 << 4) -#define ANALOG_PWRDOWN (0x1 << 3) -#define FORCE_SUSPEND_0 (0x1 << 0) - -/* URSTCON */ -#define HOST_SW_RST (0x1 << 4) -#define PHY_SW_RST1 (0x1 << 3) -#define PHYLNK_SW_RST (0x1 << 2) -#define LINK_SW_RST (0x1 << 1) -#define PHY_SW_RST0 (0x1 << 0) - -/* OPHYCLK */ -#define COMMON_ON_N1 (0x1 << 7) -#define COMMON_ON_N0 (0x1 << 4) -#define ID_PULLUP0 (0x1 << 2) -#define CLK_SEL_24MHZ (0x3 << 0) -#define CLK_SEL_12MHZ (0x2 << 0) -#define CLK_SEL_48MHZ (0x0 << 0) - -#define EXYNOS4X12_ID_PULLUP0 (0x01 << 3) -#define EXYNOS4X12_COMMON_ON_N0 (0x01 << 4) -#define EXYNOS4X12_CLK_SEL_12MHZ (0x02 << 0) -#define EXYNOS4X12_CLK_SEL_24MHZ (0x05 << 0) - -/* Device Configuration Register DCFG */ -#define DEV_SPEED_HIGH_SPEED_20 (0x0 << 0) -#define DEV_SPEED_FULL_SPEED_20 (0x1 << 0) -#define DEV_SPEED_LOW_SPEED_11 (0x2 << 0) -#define DEV_SPEED_FULL_SPEED_11 (0x3 << 0) -#define EP_MISS_CNT(x) (x << 18) -#define DEVICE_ADDRESS(x) (x << 4) - -/* Core Reset Register (GRSTCTL) */ -#define TX_FIFO_FLUSH (0x1 << 5) -#define RX_FIFO_FLUSH (0x1 << 4) -#define TX_FIFO_NUMBER(x) (x << 6) -#define TX_FIFO_FLUSH_ALL TX_FIFO_NUMBER(0x10) - -/* Masks definitions */ -#define GINTMSK_INIT (INT_OUT_EP | INT_IN_EP | INT_RESUME | INT_ENUMDONE\ - | INT_RESET | INT_SUSPEND) -#define DOEPMSK_INIT (CTRL_OUT_EP_SETUP_PHASE_DONE | AHB_ERROR|TRANSFER_DONE) -#define DIEPMSK_INIT (NON_ISO_IN_EP_TIMEOUT|AHB_ERROR|TRANSFER_DONE) -#define GAHBCFG_INIT (PTXFE_HALF | NPTXFE_HALF | MODE_DMA | BURST_INCR4\ - | GBL_INT_UNMASK) - -/* Device Endpoint X Transfer Size Register (DIEPTSIZX) */ -#define DIEPT_SIZ_PKT_CNT(x) (x << 19) -#define DIEPT_SIZ_XFER_SIZE(x) (x << 0) - -/* Device OUT Endpoint X Transfer Size Register (DOEPTSIZX) */ -#define DOEPT_SIZ_PKT_CNT(x) (x << 19) -#define DOEPT_SIZ_XFER_SIZE(x) (x << 0) -#define DOEPT_SIZ_XFER_SIZE_MAX_EP0 (0x7F << 0) -#define DOEPT_SIZ_XFER_SIZE_MAX_EP (0x7FFF << 0) - -/* Device Endpoint-N Control Register (DIEPCTLn/DOEPCTLn) */ -#define DIEPCTL_TX_FIFO_NUM(x) (x << 22) -#define DIEPCTL_TX_FIFO_NUM_MASK (~DIEPCTL_TX_FIFO_NUM(0xF)) - -/* Device ALL Endpoints Interrupt Register (DAINT) */ -#define DAINT_IN_EP_INT(x) (x << 0) -#define DAINT_OUT_EP_INT(x) (x << 16) -#endif -- cgit v1.1 From be5e4bdcedbd3bf5f2717fc22356e825bca0fbcd Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Fri, 4 Dec 2015 02:34:46 +0100 Subject: usb: s3c-otg: Rename sources to dwc2_*c The driver is actually for the Designware DWC2 controller. This patch renames the local source files to dwc2_*c and adjusts the Makefile to use the new names. Signed-off-by: Marek Vasut --- drivers/usb/gadget/Makefile | 4 +- drivers/usb/gadget/dwc2_udc_otg.c | 845 ++++++++++++++++ drivers/usb/gadget/dwc2_udc_otg_phy.c | 102 ++ drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c | 1480 ++++++++++++++++++++++++++++ drivers/usb/gadget/s3c_udc_otg.c | 845 ---------------- drivers/usb/gadget/s3c_udc_otg_phy.c | 102 -- drivers/usb/gadget/s3c_udc_otg_xfer_dma.c | 1480 ---------------------------- 7 files changed, 2429 insertions(+), 2429 deletions(-) create mode 100644 drivers/usb/gadget/dwc2_udc_otg.c create mode 100644 drivers/usb/gadget/dwc2_udc_otg_phy.c create mode 100644 drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c delete mode 100644 drivers/usb/gadget/s3c_udc_otg.c delete mode 100644 drivers/usb/gadget/s3c_udc_otg_phy.c delete mode 100644 drivers/usb/gadget/s3c_udc_otg_xfer_dma.c diff --git a/drivers/usb/gadget/Makefile b/drivers/usb/gadget/Makefile index 6288ecf..dd4df00 100644 --- a/drivers/usb/gadget/Makefile +++ b/drivers/usb/gadget/Makefile @@ -13,8 +13,8 @@ ifdef CONFIG_USB_GADGET obj-$(CONFIG_USB_GADGET_AT91) += at91_udc.o obj-$(CONFIG_USB_GADGET_ATMEL_USBA) += atmel_usba_udc.o obj-$(CONFIG_USB_GADGET_BCM_UDC_OTG_PHY) += bcm_udc_otg_phy.o -obj-$(CONFIG_USB_GADGET_S3C_UDC_OTG) += s3c_udc_otg.o -obj-$(CONFIG_USB_GADGET_S3C_UDC_OTG_PHY) += s3c_udc_otg_phy.o +obj-$(CONFIG_USB_GADGET_S3C_UDC_OTG) += dwc2_udc_otg.o +obj-$(CONFIG_USB_GADGET_S3C_UDC_OTG_PHY) += dwc2_udc_otg_phy.o obj-$(CONFIG_USB_GADGET_FOTG210) += fotg210.o obj-$(CONFIG_CI_UDC) += ci_udc.o obj-$(CONFIG_USB_GADGET_DOWNLOAD) += g_dnl.o diff --git a/drivers/usb/gadget/dwc2_udc_otg.c b/drivers/usb/gadget/dwc2_udc_otg.c new file mode 100644 index 0000000..40a7125 --- /dev/null +++ b/drivers/usb/gadget/dwc2_udc_otg.c @@ -0,0 +1,845 @@ +/* + * drivers/usb/gadget/dwc2_udc_otg.c + * Samsung S3C on-chip full/high speed USB OTG 2.0 device controllers + * + * Copyright (C) 2008 for Samsung Electronics + * + * BSP Support for Samsung's UDC driver + * available at: + * git://git.kernel.org/pub/scm/linux/kernel/git/kki_ap/linux-2.6-samsung.git + * + * State machine bugfixes: + * Marek Szyprowski + * + * Ported to u-boot: + * Marek Szyprowski + * Lukasz Majewski + * + * SPDX-License-Identifier: GPL-2.0+ + */ +#undef DEBUG +#include +#include +#include +#include + +#include +#include + +#include +#include +#include + +#include + +#include "dwc2_udc_otg_regs.h" +#include "dwc2_udc_otg_priv.h" +#include + +/***********************************************************/ + +#define OTG_DMA_MODE 1 + +#define DEBUG_SETUP 0 +#define DEBUG_EP0 0 +#define DEBUG_ISR 0 +#define DEBUG_OUT_EP 0 +#define DEBUG_IN_EP 0 + +#include + +#define EP0_CON 0 +#define EP_MASK 0xF + +static char *state_names[] = { + "WAIT_FOR_SETUP", + "DATA_STATE_XMIT", + "DATA_STATE_NEED_ZLP", + "WAIT_FOR_OUT_STATUS", + "DATA_STATE_RECV", + "WAIT_FOR_COMPLETE", + "WAIT_FOR_OUT_COMPLETE", + "WAIT_FOR_IN_COMPLETE", + "WAIT_FOR_NULL_COMPLETE", +}; + +#define DRIVER_DESC "DWC2 HS USB OTG Device Driver, (c) Samsung Electronics" +#define DRIVER_VERSION "15 March 2009" + +struct dwc2_udc *the_controller; + +static const char driver_name[] = "dwc2-udc"; +static const char driver_desc[] = DRIVER_DESC; +static const char ep0name[] = "ep0-control"; + +/* Max packet size*/ +static unsigned int ep0_fifo_size = 64; +static unsigned int ep_fifo_size = 512; +static unsigned int ep_fifo_size2 = 1024; +static int reset_available = 1; + +static struct usb_ctrlrequest *usb_ctrl; +static dma_addr_t usb_ctrl_dma_addr; + +/* + Local declarations. +*/ +static int dwc2_ep_enable(struct usb_ep *ep, + const struct usb_endpoint_descriptor *); +static int dwc2_ep_disable(struct usb_ep *ep); +static struct usb_request *dwc2_alloc_request(struct usb_ep *ep, + gfp_t gfp_flags); +static void dwc2_free_request(struct usb_ep *ep, struct usb_request *); + +static int dwc2_queue(struct usb_ep *ep, struct usb_request *, gfp_t gfp_flags); +static int dwc2_dequeue(struct usb_ep *ep, struct usb_request *); +static int dwc2_fifo_status(struct usb_ep *ep); +static void dwc2_fifo_flush(struct usb_ep *ep); +static void dwc2_ep0_read(struct dwc2_udc *dev); +static void dwc2_ep0_kick(struct dwc2_udc *dev, struct dwc2_ep *ep); +static void dwc2_handle_ep0(struct dwc2_udc *dev); +static int dwc2_ep0_write(struct dwc2_udc *dev); +static int write_fifo_ep0(struct dwc2_ep *ep, struct dwc2_request *req); +static void done(struct dwc2_ep *ep, struct dwc2_request *req, int status); +static void stop_activity(struct dwc2_udc *dev, + struct usb_gadget_driver *driver); +static int udc_enable(struct dwc2_udc *dev); +static void udc_set_address(struct dwc2_udc *dev, unsigned char address); +static void reconfig_usbd(struct dwc2_udc *dev); +static void set_max_pktsize(struct dwc2_udc *dev, enum usb_device_speed speed); +static void nuke(struct dwc2_ep *ep, int status); +static int dwc2_udc_set_halt(struct usb_ep *_ep, int value); +static void dwc2_udc_set_nak(struct dwc2_ep *ep); + +void set_udc_gadget_private_data(void *p) +{ + debug_cond(DEBUG_SETUP != 0, + "%s: the_controller: 0x%p, p: 0x%p\n", __func__, + the_controller, p); + the_controller->gadget.dev.device_data = p; +} + +void *get_udc_gadget_private_data(struct usb_gadget *gadget) +{ + return gadget->dev.device_data; +} + +static struct usb_ep_ops dwc2_ep_ops = { + .enable = dwc2_ep_enable, + .disable = dwc2_ep_disable, + + .alloc_request = dwc2_alloc_request, + .free_request = dwc2_free_request, + + .queue = dwc2_queue, + .dequeue = dwc2_dequeue, + + .set_halt = dwc2_udc_set_halt, + .fifo_status = dwc2_fifo_status, + .fifo_flush = dwc2_fifo_flush, +}; + +#define create_proc_files() do {} while (0) +#define remove_proc_files() do {} while (0) + +/***********************************************************/ + +void __iomem *regs_otg; +struct dwc2_usbotg_reg *reg; + +bool dfu_usb_get_reset(void) +{ + return !!(readl(®->gintsts) & INT_RESET); +} + +__weak void otg_phy_init(struct dwc2_udc *dev) {} +__weak void otg_phy_off(struct dwc2_udc *dev) {} + +/***********************************************************/ + +#include "dwc2_udc_otg_xfer_dma.c" + +/* + * udc_disable - disable USB device controller + */ +static void udc_disable(struct dwc2_udc *dev) +{ + debug_cond(DEBUG_SETUP != 0, "%s: %p\n", __func__, dev); + + udc_set_address(dev, 0); + + dev->ep0state = WAIT_FOR_SETUP; + dev->gadget.speed = USB_SPEED_UNKNOWN; + dev->usb_address = 0; + + otg_phy_off(dev); +} + +/* + * udc_reinit - initialize software state + */ +static void udc_reinit(struct dwc2_udc *dev) +{ + unsigned int i; + + debug_cond(DEBUG_SETUP != 0, "%s: %p\n", __func__, dev); + + /* device/ep0 records init */ + INIT_LIST_HEAD(&dev->gadget.ep_list); + INIT_LIST_HEAD(&dev->gadget.ep0->ep_list); + dev->ep0state = WAIT_FOR_SETUP; + + /* basic endpoint records init */ + for (i = 0; i < S3C_MAX_ENDPOINTS; i++) { + struct dwc2_ep *ep = &dev->ep[i]; + + if (i != 0) + list_add_tail(&ep->ep.ep_list, &dev->gadget.ep_list); + + ep->desc = 0; + ep->stopped = 0; + INIT_LIST_HEAD(&ep->queue); + ep->pio_irqs = 0; + } + + /* the rest was statically initialized, and is read-only */ +} + +#define BYTES2MAXP(x) (x / 8) +#define MAXP2BYTES(x) (x * 8) + +/* until it's enabled, this UDC should be completely invisible + * to any USB host. + */ +static int udc_enable(struct dwc2_udc *dev) +{ + debug_cond(DEBUG_SETUP != 0, "%s: %p\n", __func__, dev); + + otg_phy_init(dev); + reconfig_usbd(dev); + + debug_cond(DEBUG_SETUP != 0, + "DWC2 USB 2.0 OTG Controller Core Initialized : 0x%x\n", + readl(®->gintmsk)); + + dev->gadget.speed = USB_SPEED_UNKNOWN; + + return 0; +} + +/* + Register entry point for the peripheral controller driver. +*/ +int usb_gadget_register_driver(struct usb_gadget_driver *driver) +{ + struct dwc2_udc *dev = the_controller; + int retval = 0; + unsigned long flags = 0; + + debug_cond(DEBUG_SETUP != 0, "%s: %s\n", __func__, "no name"); + + if (!driver + || (driver->speed != USB_SPEED_FULL + && driver->speed != USB_SPEED_HIGH) + || !driver->bind || !driver->disconnect || !driver->setup) + return -EINVAL; + if (!dev) + return -ENODEV; + if (dev->driver) + return -EBUSY; + + spin_lock_irqsave(&dev->lock, flags); + /* first hook up the driver ... */ + dev->driver = driver; + spin_unlock_irqrestore(&dev->lock, flags); + + if (retval) { /* TODO */ + printf("target device_add failed, error %d\n", retval); + return retval; + } + + retval = driver->bind(&dev->gadget); + if (retval) { + debug_cond(DEBUG_SETUP != 0, + "%s: bind to driver --> error %d\n", + dev->gadget.name, retval); + dev->driver = 0; + return retval; + } + + enable_irq(IRQ_OTG); + + debug_cond(DEBUG_SETUP != 0, + "Registered gadget driver %s\n", dev->gadget.name); + udc_enable(dev); + + return 0; +} + +/* + * Unregister entry point for the peripheral controller driver. + */ +int usb_gadget_unregister_driver(struct usb_gadget_driver *driver) +{ + struct dwc2_udc *dev = the_controller; + unsigned long flags = 0; + + if (!dev) + return -ENODEV; + if (!driver || driver != dev->driver) + return -EINVAL; + + spin_lock_irqsave(&dev->lock, flags); + dev->driver = 0; + stop_activity(dev, driver); + spin_unlock_irqrestore(&dev->lock, flags); + + driver->unbind(&dev->gadget); + + disable_irq(IRQ_OTG); + + udc_disable(dev); + return 0; +} + +/* + * done - retire a request; caller blocked irqs + */ +static void done(struct dwc2_ep *ep, struct dwc2_request *req, int status) +{ + unsigned int stopped = ep->stopped; + + debug("%s: %s %p, req = %p, stopped = %d\n", + __func__, ep->ep.name, ep, &req->req, stopped); + + list_del_init(&req->queue); + + if (likely(req->req.status == -EINPROGRESS)) + req->req.status = status; + else + status = req->req.status; + + if (status && status != -ESHUTDOWN) { + debug("complete %s req %p stat %d len %u/%u\n", + ep->ep.name, &req->req, status, + req->req.actual, req->req.length); + } + + /* don't modify queue heads during completion callback */ + ep->stopped = 1; + +#ifdef DEBUG + printf("calling complete callback\n"); + { + int i, len = req->req.length; + + printf("pkt[%d] = ", req->req.length); + if (len > 64) + len = 64; + for (i = 0; i < len; i++) { + printf("%02x", ((u8 *)req->req.buf)[i]); + if ((i & 7) == 7) + printf(" "); + } + printf("\n"); + } +#endif + spin_unlock(&ep->dev->lock); + req->req.complete(&ep->ep, &req->req); + spin_lock(&ep->dev->lock); + + debug("callback completed\n"); + + ep->stopped = stopped; +} + +/* + * nuke - dequeue ALL requests + */ +static void nuke(struct dwc2_ep *ep, int status) +{ + struct dwc2_request *req; + + debug("%s: %s %p\n", __func__, ep->ep.name, ep); + + /* called with irqs blocked */ + while (!list_empty(&ep->queue)) { + req = list_entry(ep->queue.next, struct dwc2_request, queue); + done(ep, req, status); + } +} + +static void stop_activity(struct dwc2_udc *dev, + struct usb_gadget_driver *driver) +{ + int i; + + /* don't disconnect drivers more than once */ + if (dev->gadget.speed == USB_SPEED_UNKNOWN) + driver = 0; + dev->gadget.speed = USB_SPEED_UNKNOWN; + + /* prevent new request submissions, kill any outstanding requests */ + for (i = 0; i < S3C_MAX_ENDPOINTS; i++) { + struct dwc2_ep *ep = &dev->ep[i]; + ep->stopped = 1; + nuke(ep, -ESHUTDOWN); + } + + /* report disconnect; the driver is already quiesced */ + if (driver) { + spin_unlock(&dev->lock); + driver->disconnect(&dev->gadget); + spin_lock(&dev->lock); + } + + /* re-init driver-visible data structures */ + udc_reinit(dev); +} + +static void reconfig_usbd(struct dwc2_udc *dev) +{ + /* 2. Soft-reset OTG Core and then unreset again. */ + int i; + unsigned int uTemp = writel(CORE_SOFT_RESET, ®->grstctl); + uint32_t dflt_gusbcfg; + + debug("Reseting OTG controller\n"); + + dflt_gusbcfg = + 0<<15 /* PHY Low Power Clock sel*/ + |1<<14 /* Non-Periodic TxFIFO Rewind Enable*/ + |0x5<<10 /* Turnaround time*/ + |0<<9 | 0<<8 /* [0:HNP disable,1:HNP enable][ 0:SRP disable*/ + /* 1:SRP enable] H1= 1,1*/ + |0<<7 /* Ulpi DDR sel*/ + |0<<6 /* 0: high speed utmi+, 1: full speed serial*/ + |0<<4 /* 0: utmi+, 1:ulpi*/ + |1<<3 /* phy i/f 0:8bit, 1:16bit*/ + |0x7<<0; /* HS/FS Timeout**/ + + if (dev->pdata->usb_gusbcfg) + dflt_gusbcfg = dev->pdata->usb_gusbcfg; + + writel(dflt_gusbcfg, ®->gusbcfg); + + /* 3. Put the OTG device core in the disconnected state.*/ + uTemp = readl(®->dctl); + uTemp |= SOFT_DISCONNECT; + writel(uTemp, ®->dctl); + + udelay(20); + + /* 4. Make the OTG device core exit from the disconnected state.*/ + uTemp = readl(®->dctl); + uTemp = uTemp & ~SOFT_DISCONNECT; + writel(uTemp, ®->dctl); + + /* 5. Configure OTG Core to initial settings of device mode.*/ + /* [][1: full speed(30Mhz) 0:high speed]*/ + writel(EP_MISS_CNT(1) | DEV_SPEED_HIGH_SPEED_20, ®->dcfg); + + mdelay(1); + + /* 6. Unmask the core interrupts*/ + writel(GINTMSK_INIT, ®->gintmsk); + + /* 7. Set NAK bit of EP0, EP1, EP2*/ + writel(DEPCTL_EPDIS|DEPCTL_SNAK, ®->out_endp[EP0_CON].doepctl); + writel(DEPCTL_EPDIS|DEPCTL_SNAK, ®->in_endp[EP0_CON].diepctl); + + for (i = 1; i < S3C_MAX_ENDPOINTS; i++) { + writel(DEPCTL_EPDIS|DEPCTL_SNAK, ®->out_endp[i].doepctl); + writel(DEPCTL_EPDIS|DEPCTL_SNAK, ®->in_endp[i].diepctl); + } + + /* 8. Unmask EPO interrupts*/ + writel(((1 << EP0_CON) << DAINT_OUT_BIT) + | (1 << EP0_CON), ®->daintmsk); + + /* 9. Unmask device OUT EP common interrupts*/ + writel(DOEPMSK_INIT, ®->doepmsk); + + /* 10. Unmask device IN EP common interrupts*/ + writel(DIEPMSK_INIT, ®->diepmsk); + + /* 11. Set Rx FIFO Size (in 32-bit words) */ + writel(RX_FIFO_SIZE >> 2, ®->grxfsiz); + + /* 12. Set Non Periodic Tx FIFO Size */ + writel((NPTX_FIFO_SIZE >> 2) << 16 | ((RX_FIFO_SIZE >> 2)) << 0, + ®->gnptxfsiz); + + for (i = 1; i < S3C_MAX_HW_ENDPOINTS; i++) + writel((PTX_FIFO_SIZE >> 2) << 16 | + ((RX_FIFO_SIZE + NPTX_FIFO_SIZE + + PTX_FIFO_SIZE*(i-1)) >> 2) << 0, + ®->dieptxf[i-1]); + + /* Flush the RX FIFO */ + writel(RX_FIFO_FLUSH, ®->grstctl); + while (readl(®->grstctl) & RX_FIFO_FLUSH) + debug("%s: waiting for S3C_UDC_OTG_GRSTCTL\n", __func__); + + /* Flush all the Tx FIFO's */ + writel(TX_FIFO_FLUSH_ALL, ®->grstctl); + writel(TX_FIFO_FLUSH_ALL | TX_FIFO_FLUSH, ®->grstctl); + while (readl(®->grstctl) & TX_FIFO_FLUSH) + debug("%s: waiting for S3C_UDC_OTG_GRSTCTL\n", __func__); + + /* 13. Clear NAK bit of EP0, EP1, EP2*/ + /* For Slave mode*/ + /* EP0: Control OUT */ + writel(DEPCTL_EPDIS | DEPCTL_CNAK, + ®->out_endp[EP0_CON].doepctl); + + /* 14. Initialize OTG Link Core.*/ + writel(GAHBCFG_INIT, ®->gahbcfg); +} + +static void set_max_pktsize(struct dwc2_udc *dev, enum usb_device_speed speed) +{ + unsigned int ep_ctrl; + int i; + + if (speed == USB_SPEED_HIGH) { + ep0_fifo_size = 64; + ep_fifo_size = 512; + ep_fifo_size2 = 1024; + dev->gadget.speed = USB_SPEED_HIGH; + } else { + ep0_fifo_size = 64; + ep_fifo_size = 64; + ep_fifo_size2 = 64; + dev->gadget.speed = USB_SPEED_FULL; + } + + dev->ep[0].ep.maxpacket = ep0_fifo_size; + for (i = 1; i < S3C_MAX_ENDPOINTS; i++) + dev->ep[i].ep.maxpacket = ep_fifo_size; + + /* EP0 - Control IN (64 bytes)*/ + ep_ctrl = readl(®->in_endp[EP0_CON].diepctl); + writel(ep_ctrl|(0<<0), ®->in_endp[EP0_CON].diepctl); + + /* EP0 - Control OUT (64 bytes)*/ + ep_ctrl = readl(®->out_endp[EP0_CON].doepctl); + writel(ep_ctrl|(0<<0), ®->out_endp[EP0_CON].doepctl); +} + +static int dwc2_ep_enable(struct usb_ep *_ep, + const struct usb_endpoint_descriptor *desc) +{ + struct dwc2_ep *ep; + struct dwc2_udc *dev; + unsigned long flags = 0; + + debug("%s: %p\n", __func__, _ep); + + ep = container_of(_ep, struct dwc2_ep, ep); + if (!_ep || !desc || ep->desc || _ep->name == ep0name + || desc->bDescriptorType != USB_DT_ENDPOINT + || ep->bEndpointAddress != desc->bEndpointAddress + || ep_maxpacket(ep) < + le16_to_cpu(get_unaligned(&desc->wMaxPacketSize))) { + + debug("%s: bad ep or descriptor\n", __func__); + return -EINVAL; + } + + /* xfer types must match, except that interrupt ~= bulk */ + if (ep->bmAttributes != desc->bmAttributes + && ep->bmAttributes != USB_ENDPOINT_XFER_BULK + && desc->bmAttributes != USB_ENDPOINT_XFER_INT) { + + debug("%s: %s type mismatch\n", __func__, _ep->name); + return -EINVAL; + } + + /* hardware _could_ do smaller, but driver doesn't */ + if ((desc->bmAttributes == USB_ENDPOINT_XFER_BULK + && le16_to_cpu(get_unaligned(&desc->wMaxPacketSize)) != + ep_maxpacket(ep)) || !get_unaligned(&desc->wMaxPacketSize)) { + + debug("%s: bad %s maxpacket\n", __func__, _ep->name); + return -ERANGE; + } + + dev = ep->dev; + if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) { + + debug("%s: bogus device state\n", __func__); + return -ESHUTDOWN; + } + + ep->stopped = 0; + ep->desc = desc; + ep->pio_irqs = 0; + ep->ep.maxpacket = le16_to_cpu(get_unaligned(&desc->wMaxPacketSize)); + + /* Reset halt state */ + dwc2_udc_set_nak(ep); + dwc2_udc_set_halt(_ep, 0); + + spin_lock_irqsave(&ep->dev->lock, flags); + dwc2_udc_ep_activate(ep); + spin_unlock_irqrestore(&ep->dev->lock, flags); + + debug("%s: enabled %s, stopped = %d, maxpacket = %d\n", + __func__, _ep->name, ep->stopped, ep->ep.maxpacket); + return 0; +} + +/* + * Disable EP + */ +static int dwc2_ep_disable(struct usb_ep *_ep) +{ + struct dwc2_ep *ep; + unsigned long flags = 0; + + debug("%s: %p\n", __func__, _ep); + + ep = container_of(_ep, struct dwc2_ep, ep); + if (!_ep || !ep->desc) { + debug("%s: %s not enabled\n", __func__, + _ep ? ep->ep.name : NULL); + return -EINVAL; + } + + spin_lock_irqsave(&ep->dev->lock, flags); + + /* Nuke all pending requests */ + nuke(ep, -ESHUTDOWN); + + ep->desc = 0; + ep->stopped = 1; + + spin_unlock_irqrestore(&ep->dev->lock, flags); + + debug("%s: disabled %s\n", __func__, _ep->name); + return 0; +} + +static struct usb_request *dwc2_alloc_request(struct usb_ep *ep, + gfp_t gfp_flags) +{ + struct dwc2_request *req; + + debug("%s: %s %p\n", __func__, ep->name, ep); + + req = memalign(CONFIG_SYS_CACHELINE_SIZE, sizeof(*req)); + if (!req) + return 0; + + memset(req, 0, sizeof *req); + INIT_LIST_HEAD(&req->queue); + + return &req->req; +} + +static void dwc2_free_request(struct usb_ep *ep, struct usb_request *_req) +{ + struct dwc2_request *req; + + debug("%s: %p\n", __func__, ep); + + req = container_of(_req, struct dwc2_request, req); + WARN_ON(!list_empty(&req->queue)); + kfree(req); +} + +/* dequeue JUST ONE request */ +static int dwc2_dequeue(struct usb_ep *_ep, struct usb_request *_req) +{ + struct dwc2_ep *ep; + struct dwc2_request *req; + unsigned long flags = 0; + + debug("%s: %p\n", __func__, _ep); + + ep = container_of(_ep, struct dwc2_ep, ep); + if (!_ep || ep->ep.name == ep0name) + return -EINVAL; + + spin_lock_irqsave(&ep->dev->lock, flags); + + /* make sure it's actually queued on this endpoint */ + list_for_each_entry(req, &ep->queue, queue) { + if (&req->req == _req) + break; + } + if (&req->req != _req) { + spin_unlock_irqrestore(&ep->dev->lock, flags); + return -EINVAL; + } + + done(ep, req, -ECONNRESET); + + spin_unlock_irqrestore(&ep->dev->lock, flags); + return 0; +} + +/* + * Return bytes in EP FIFO + */ +static int dwc2_fifo_status(struct usb_ep *_ep) +{ + int count = 0; + struct dwc2_ep *ep; + + ep = container_of(_ep, struct dwc2_ep, ep); + if (!_ep) { + debug("%s: bad ep\n", __func__); + return -ENODEV; + } + + debug("%s: %d\n", __func__, ep_index(ep)); + + /* LPD can't report unclaimed bytes from IN fifos */ + if (ep_is_in(ep)) + return -EOPNOTSUPP; + + return count; +} + +/* + * Flush EP FIFO + */ +static void dwc2_fifo_flush(struct usb_ep *_ep) +{ + struct dwc2_ep *ep; + + ep = container_of(_ep, struct dwc2_ep, ep); + if (unlikely(!_ep || (!ep->desc && ep->ep.name != ep0name))) { + debug("%s: bad ep\n", __func__); + return; + } + + debug("%s: %d\n", __func__, ep_index(ep)); +} + +static const struct usb_gadget_ops dwc2_udc_ops = { + /* current versions must always be self-powered */ +}; + +static struct dwc2_udc memory = { + .usb_address = 0, + .gadget = { + .ops = &dwc2_udc_ops, + .ep0 = &memory.ep[0].ep, + .name = driver_name, + }, + + /* control endpoint */ + .ep[0] = { + .ep = { + .name = ep0name, + .ops = &dwc2_ep_ops, + .maxpacket = EP0_FIFO_SIZE, + }, + .dev = &memory, + + .bEndpointAddress = 0, + .bmAttributes = 0, + + .ep_type = ep_control, + }, + + /* first group of endpoints */ + .ep[1] = { + .ep = { + .name = "ep1in-bulk", + .ops = &dwc2_ep_ops, + .maxpacket = EP_FIFO_SIZE, + }, + .dev = &memory, + + .bEndpointAddress = USB_DIR_IN | 1, + .bmAttributes = USB_ENDPOINT_XFER_BULK, + + .ep_type = ep_bulk_out, + .fifo_num = 1, + }, + + .ep[2] = { + .ep = { + .name = "ep2out-bulk", + .ops = &dwc2_ep_ops, + .maxpacket = EP_FIFO_SIZE, + }, + .dev = &memory, + + .bEndpointAddress = USB_DIR_OUT | 2, + .bmAttributes = USB_ENDPOINT_XFER_BULK, + + .ep_type = ep_bulk_in, + .fifo_num = 2, + }, + + .ep[3] = { + .ep = { + .name = "ep3in-int", + .ops = &dwc2_ep_ops, + .maxpacket = EP_FIFO_SIZE, + }, + .dev = &memory, + + .bEndpointAddress = USB_DIR_IN | 3, + .bmAttributes = USB_ENDPOINT_XFER_INT, + + .ep_type = ep_interrupt, + .fifo_num = 3, + }, +}; + +/* + * probe - binds to the platform device + */ + +int s3c_udc_probe(struct s3c_plat_otg_data *pdata) +{ + struct dwc2_udc *dev = &memory; + int retval = 0; + + debug("%s: %p\n", __func__, pdata); + + dev->pdata = pdata; + + reg = (struct dwc2_usbotg_reg *)pdata->regs_otg; + + /* regs_otg = (void *)pdata->regs_otg; */ + + dev->gadget.is_dualspeed = 1; /* Hack only*/ + dev->gadget.is_otg = 0; + dev->gadget.is_a_peripheral = 0; + dev->gadget.b_hnp_enable = 0; + dev->gadget.a_hnp_support = 0; + dev->gadget.a_alt_hnp_support = 0; + + the_controller = dev; + + usb_ctrl = memalign(CONFIG_SYS_CACHELINE_SIZE, + ROUND(sizeof(struct usb_ctrlrequest), + CONFIG_SYS_CACHELINE_SIZE)); + if (!usb_ctrl) { + error("No memory available for UDC!\n"); + return -ENOMEM; + } + + usb_ctrl_dma_addr = (dma_addr_t) usb_ctrl; + + udc_reinit(dev); + + return retval; +} + +int usb_gadget_handle_interrupts(int index) +{ + u32 intr_status = readl(®->gintsts); + u32 gintmsk = readl(®->gintmsk); + + if (intr_status & gintmsk) + return dwc2_udc_irq(1, (void *)the_controller); + return 0; +} diff --git a/drivers/usb/gadget/dwc2_udc_otg_phy.c b/drivers/usb/gadget/dwc2_udc_otg_phy.c new file mode 100644 index 0000000..eedfe37 --- /dev/null +++ b/drivers/usb/gadget/dwc2_udc_otg_phy.c @@ -0,0 +1,102 @@ +/* + * drivers/usb/gadget/dwc2_udc_otg.c + * Samsung S3C on-chip full/high speed USB OTG 2.0 device controllers + * + * Copyright (C) 2008 for Samsung Electronics + * + * BSP Support for Samsung's UDC driver + * available at: + * git://git.kernel.org/pub/scm/linux/kernel/git/kki_ap/linux-2.6-samsung.git + * + * State machine bugfixes: + * Marek Szyprowski + * + * Ported to u-boot: + * Marek Szyprowski + * Lukasz Majewski + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include + +#include +#include + +#include +#include +#include + +#include + +#include "dwc2_udc_otg_regs.h" +#include "dwc2_udc_otg_priv.h" +#include + +#include + +void otg_phy_init(struct dwc2_udc *dev) +{ + unsigned int usb_phy_ctrl = dev->pdata->usb_phy_ctrl; + struct dwc2_usbotg_phy *phy = + (struct dwc2_usbotg_phy *)dev->pdata->regs_phy; + + dev->pdata->phy_control(1); + + /* USB PHY0 Enable */ + printf("USB PHY0 Enable\n"); + + /* Enable PHY */ + writel(readl(usb_phy_ctrl) | USB_PHY_CTRL_EN0, usb_phy_ctrl); + + if (dev->pdata->usb_flags == PHY0_SLEEP) /* C210 Universal */ + writel((readl(&phy->phypwr) + &~(PHY_0_SLEEP | OTG_DISABLE_0 | ANALOG_PWRDOWN) + &~FORCE_SUSPEND_0), &phy->phypwr); + else /* C110 GONI */ + writel((readl(&phy->phypwr) &~(OTG_DISABLE_0 | ANALOG_PWRDOWN) + &~FORCE_SUSPEND_0), &phy->phypwr); + + if (s5p_cpu_id == 0x4412) + writel((readl(&phy->phyclk) & ~(EXYNOS4X12_ID_PULLUP0 | + EXYNOS4X12_COMMON_ON_N0)) | EXYNOS4X12_CLK_SEL_24MHZ, + &phy->phyclk); /* PLL 24Mhz */ + else + writel((readl(&phy->phyclk) & ~(ID_PULLUP0 | COMMON_ON_N0)) | + CLK_SEL_24MHZ, &phy->phyclk); /* PLL 24Mhz */ + + writel((readl(&phy->rstcon) &~(LINK_SW_RST | PHYLNK_SW_RST)) + | PHY_SW_RST0, &phy->rstcon); + udelay(10); + writel(readl(&phy->rstcon) + &~(PHY_SW_RST0 | LINK_SW_RST | PHYLNK_SW_RST), &phy->rstcon); + udelay(10); +} + +void otg_phy_off(struct dwc2_udc *dev) +{ + unsigned int usb_phy_ctrl = dev->pdata->usb_phy_ctrl; + struct dwc2_usbotg_phy *phy = + (struct dwc2_usbotg_phy *)dev->pdata->regs_phy; + + /* reset controller just in case */ + writel(PHY_SW_RST0, &phy->rstcon); + udelay(20); + writel(readl(&phy->phypwr) &~PHY_SW_RST0, &phy->rstcon); + udelay(20); + + writel(readl(&phy->phypwr) | OTG_DISABLE_0 | ANALOG_PWRDOWN + | FORCE_SUSPEND_0, &phy->phypwr); + + writel(readl(usb_phy_ctrl) &~USB_PHY_CTRL_EN0, usb_phy_ctrl); + + writel((readl(&phy->phyclk) & ~(ID_PULLUP0 | COMMON_ON_N0)), + &phy->phyclk); + + udelay(10000); + + dev->pdata->phy_control(0); +} diff --git a/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c b/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c new file mode 100644 index 0000000..fe02c0f --- /dev/null +++ b/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c @@ -0,0 +1,1480 @@ +/* + * drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c + * Samsung S3C on-chip full/high speed USB OTG 2.0 device controllers + * + * Copyright (C) 2009 for Samsung Electronics + * + * BSP Support for Samsung's UDC driver + * available at: + * git://git.kernel.org/pub/scm/linux/kernel/git/kki_ap/linux-2.6-samsung.git + * + * State machine bugfixes: + * Marek Szyprowski + * + * Ported to u-boot: + * Marek Szyprowski + * Lukasz Majewski + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +static u8 clear_feature_num; +int clear_feature_flag; + +/* Bulk-Only Mass Storage Reset (class-specific request) */ +#define GET_MAX_LUN_REQUEST 0xFE +#define BOT_RESET_REQUEST 0xFF + +static inline void dwc2_udc_ep0_zlp(struct dwc2_udc *dev) +{ + u32 ep_ctrl; + + writel(usb_ctrl_dma_addr, ®->in_endp[EP0_CON].diepdma); + writel(DIEPT_SIZ_PKT_CNT(1), ®->in_endp[EP0_CON].dieptsiz); + + ep_ctrl = readl(®->in_endp[EP0_CON].diepctl); + writel(ep_ctrl|DEPCTL_EPENA|DEPCTL_CNAK, + ®->in_endp[EP0_CON].diepctl); + + debug_cond(DEBUG_EP0 != 0, "%s:EP0 ZLP DIEPCTL0 = 0x%x\n", + __func__, readl(®->in_endp[EP0_CON].diepctl)); + dev->ep0state = WAIT_FOR_IN_COMPLETE; +} + +static void dwc2_udc_pre_setup(void) +{ + u32 ep_ctrl; + + debug_cond(DEBUG_IN_EP, + "%s : Prepare Setup packets.\n", __func__); + + writel(DOEPT_SIZ_PKT_CNT(1) | sizeof(struct usb_ctrlrequest), + ®->out_endp[EP0_CON].doeptsiz); + writel(usb_ctrl_dma_addr, ®->out_endp[EP0_CON].doepdma); + + ep_ctrl = readl(®->out_endp[EP0_CON].doepctl); + writel(ep_ctrl|DEPCTL_EPENA, ®->out_endp[EP0_CON].doepctl); + + debug_cond(DEBUG_EP0 != 0, "%s:EP0 ZLP DIEPCTL0 = 0x%x\n", + __func__, readl(®->in_endp[EP0_CON].diepctl)); + debug_cond(DEBUG_EP0 != 0, "%s:EP0 ZLP DOEPCTL0 = 0x%x\n", + __func__, readl(®->out_endp[EP0_CON].doepctl)); + +} + +static inline void dwc2_ep0_complete_out(void) +{ + u32 ep_ctrl; + + debug_cond(DEBUG_EP0 != 0, "%s:EP0 ZLP DIEPCTL0 = 0x%x\n", + __func__, readl(®->in_endp[EP0_CON].diepctl)); + debug_cond(DEBUG_EP0 != 0, "%s:EP0 ZLP DOEPCTL0 = 0x%x\n", + __func__, readl(®->out_endp[EP0_CON].doepctl)); + + debug_cond(DEBUG_IN_EP, + "%s : Prepare Complete Out packet.\n", __func__); + + writel(DOEPT_SIZ_PKT_CNT(1) | sizeof(struct usb_ctrlrequest), + ®->out_endp[EP0_CON].doeptsiz); + writel(usb_ctrl_dma_addr, ®->out_endp[EP0_CON].doepdma); + + ep_ctrl = readl(®->out_endp[EP0_CON].doepctl); + writel(ep_ctrl|DEPCTL_EPENA|DEPCTL_CNAK, + ®->out_endp[EP0_CON].doepctl); + + debug_cond(DEBUG_EP0 != 0, "%s:EP0 ZLP DIEPCTL0 = 0x%x\n", + __func__, readl(®->in_endp[EP0_CON].diepctl)); + debug_cond(DEBUG_EP0 != 0, "%s:EP0 ZLP DOEPCTL0 = 0x%x\n", + __func__, readl(®->out_endp[EP0_CON].doepctl)); + +} + + +static int setdma_rx(struct dwc2_ep *ep, struct dwc2_request *req) +{ + u32 *buf, ctrl; + u32 length, pktcnt; + u32 ep_num = ep_index(ep); + + buf = req->req.buf + req->req.actual; + length = min_t(u32, req->req.length - req->req.actual, + ep_num ? DMA_BUFFER_SIZE : ep->ep.maxpacket); + + ep->len = length; + ep->dma_buf = buf; + + if (ep_num == EP0_CON || length == 0) + pktcnt = 1; + else + pktcnt = (length - 1)/(ep->ep.maxpacket) + 1; + + ctrl = readl(®->out_endp[ep_num].doepctl); + + writel((unsigned int) ep->dma_buf, ®->out_endp[ep_num].doepdma); + writel(DOEPT_SIZ_PKT_CNT(pktcnt) | DOEPT_SIZ_XFER_SIZE(length), + ®->out_endp[ep_num].doeptsiz); + writel(DEPCTL_EPENA|DEPCTL_CNAK|ctrl, ®->out_endp[ep_num].doepctl); + + debug_cond(DEBUG_OUT_EP != 0, + "%s: EP%d RX DMA start : DOEPDMA = 0x%x," + "DOEPTSIZ = 0x%x, DOEPCTL = 0x%x\n" + "\tbuf = 0x%p, pktcnt = %d, xfersize = %d\n", + __func__, ep_num, + readl(®->out_endp[ep_num].doepdma), + readl(®->out_endp[ep_num].doeptsiz), + readl(®->out_endp[ep_num].doepctl), + buf, pktcnt, length); + return 0; + +} + +static int setdma_tx(struct dwc2_ep *ep, struct dwc2_request *req) +{ + u32 *buf, ctrl = 0; + u32 length, pktcnt; + u32 ep_num = ep_index(ep); + + buf = req->req.buf + req->req.actual; + length = req->req.length - req->req.actual; + + if (ep_num == EP0_CON) + length = min(length, (u32)ep_maxpacket(ep)); + + ep->len = length; + ep->dma_buf = buf; + + flush_dcache_range((unsigned long) ep->dma_buf, + (unsigned long) ep->dma_buf + + ROUND(ep->len, CONFIG_SYS_CACHELINE_SIZE)); + + if (length == 0) + pktcnt = 1; + else + pktcnt = (length - 1)/(ep->ep.maxpacket) + 1; + + /* Flush the endpoint's Tx FIFO */ + writel(TX_FIFO_NUMBER(ep->fifo_num), ®->grstctl); + writel(TX_FIFO_NUMBER(ep->fifo_num) | TX_FIFO_FLUSH, ®->grstctl); + while (readl(®->grstctl) & TX_FIFO_FLUSH) + ; + + writel((unsigned long) ep->dma_buf, ®->in_endp[ep_num].diepdma); + writel(DIEPT_SIZ_PKT_CNT(pktcnt) | DIEPT_SIZ_XFER_SIZE(length), + ®->in_endp[ep_num].dieptsiz); + + ctrl = readl(®->in_endp[ep_num].diepctl); + + /* Write the FIFO number to be used for this endpoint */ + ctrl &= DIEPCTL_TX_FIFO_NUM_MASK; + ctrl |= DIEPCTL_TX_FIFO_NUM(ep->fifo_num); + + /* Clear reserved (Next EP) bits */ + ctrl = (ctrl&~(EP_MASK<in_endp[ep_num].diepctl); + + debug_cond(DEBUG_IN_EP, + "%s:EP%d TX DMA start : DIEPDMA0 = 0x%x," + "DIEPTSIZ0 = 0x%x, DIEPCTL0 = 0x%x\n" + "\tbuf = 0x%p, pktcnt = %d, xfersize = %d\n", + __func__, ep_num, + readl(®->in_endp[ep_num].diepdma), + readl(®->in_endp[ep_num].dieptsiz), + readl(®->in_endp[ep_num].diepctl), + buf, pktcnt, length); + + return length; +} + +static void complete_rx(struct dwc2_udc *dev, u8 ep_num) +{ + struct dwc2_ep *ep = &dev->ep[ep_num]; + struct dwc2_request *req = NULL; + u32 ep_tsr = 0, xfer_size = 0, is_short = 0; + + if (list_empty(&ep->queue)) { + debug_cond(DEBUG_OUT_EP != 0, + "%s: RX DMA done : NULL REQ on OUT EP-%d\n", + __func__, ep_num); + return; + + } + + req = list_entry(ep->queue.next, struct dwc2_request, queue); + ep_tsr = readl(®->out_endp[ep_num].doeptsiz); + + if (ep_num == EP0_CON) + xfer_size = (ep_tsr & DOEPT_SIZ_XFER_SIZE_MAX_EP0); + else + xfer_size = (ep_tsr & DOEPT_SIZ_XFER_SIZE_MAX_EP); + + xfer_size = ep->len - xfer_size; + + /* + * NOTE: + * + * Please be careful with proper buffer allocation for USB request, + * which needs to be aligned to CONFIG_SYS_CACHELINE_SIZE, not only + * with starting address, but also its size shall be a cache line + * multiplication. + * + * This will prevent from corruption of data allocated immediatelly + * before or after the buffer. + * + * For armv7, the cache_v7.c provides proper code to emit "ERROR" + * message to warn users. + */ + invalidate_dcache_range((unsigned long) ep->dma_buf, + (unsigned long) ep->dma_buf + + ROUND(xfer_size, CONFIG_SYS_CACHELINE_SIZE)); + + req->req.actual += min(xfer_size, req->req.length - req->req.actual); + is_short = (xfer_size < ep->ep.maxpacket); + + debug_cond(DEBUG_OUT_EP != 0, + "%s: RX DMA done : ep = %d, rx bytes = %d/%d, " + "is_short = %d, DOEPTSIZ = 0x%x, remained bytes = %d\n", + __func__, ep_num, req->req.actual, req->req.length, + is_short, ep_tsr, xfer_size); + + if (is_short || req->req.actual == req->req.length) { + if (ep_num == EP0_CON && dev->ep0state == DATA_STATE_RECV) { + debug_cond(DEBUG_OUT_EP != 0, " => Send ZLP\n"); + dwc2_udc_ep0_zlp(dev); + /* packet will be completed in complete_tx() */ + dev->ep0state = WAIT_FOR_IN_COMPLETE; + } else { + done(ep, req, 0); + + if (!list_empty(&ep->queue)) { + req = list_entry(ep->queue.next, + struct dwc2_request, queue); + debug_cond(DEBUG_OUT_EP != 0, + "%s: Next Rx request start...\n", + __func__); + setdma_rx(ep, req); + } + } + } else + setdma_rx(ep, req); +} + +static void complete_tx(struct dwc2_udc *dev, u8 ep_num) +{ + struct dwc2_ep *ep = &dev->ep[ep_num]; + struct dwc2_request *req; + u32 ep_tsr = 0, xfer_size = 0, is_short = 0; + u32 last; + + if (dev->ep0state == WAIT_FOR_NULL_COMPLETE) { + dev->ep0state = WAIT_FOR_OUT_COMPLETE; + dwc2_ep0_complete_out(); + return; + } + + if (list_empty(&ep->queue)) { + debug_cond(DEBUG_IN_EP, + "%s: TX DMA done : NULL REQ on IN EP-%d\n", + __func__, ep_num); + return; + + } + + req = list_entry(ep->queue.next, struct dwc2_request, queue); + + ep_tsr = readl(®->in_endp[ep_num].dieptsiz); + + xfer_size = ep->len; + is_short = (xfer_size < ep->ep.maxpacket); + req->req.actual += min(xfer_size, req->req.length - req->req.actual); + + debug_cond(DEBUG_IN_EP, + "%s: TX DMA done : ep = %d, tx bytes = %d/%d, " + "is_short = %d, DIEPTSIZ = 0x%x, remained bytes = %d\n", + __func__, ep_num, req->req.actual, req->req.length, + is_short, ep_tsr, xfer_size); + + if (ep_num == 0) { + if (dev->ep0state == DATA_STATE_XMIT) { + debug_cond(DEBUG_IN_EP, + "%s: ep_num = %d, ep0stat ==" + "DATA_STATE_XMIT\n", + __func__, ep_num); + last = write_fifo_ep0(ep, req); + if (last) + dev->ep0state = WAIT_FOR_COMPLETE; + } else if (dev->ep0state == WAIT_FOR_IN_COMPLETE) { + debug_cond(DEBUG_IN_EP, + "%s: ep_num = %d, completing request\n", + __func__, ep_num); + done(ep, req, 0); + dev->ep0state = WAIT_FOR_SETUP; + } else if (dev->ep0state == WAIT_FOR_COMPLETE) { + debug_cond(DEBUG_IN_EP, + "%s: ep_num = %d, completing request\n", + __func__, ep_num); + done(ep, req, 0); + dev->ep0state = WAIT_FOR_OUT_COMPLETE; + dwc2_ep0_complete_out(); + } else { + debug_cond(DEBUG_IN_EP, + "%s: ep_num = %d, invalid ep state\n", + __func__, ep_num); + } + return; + } + + if (req->req.actual == req->req.length) + done(ep, req, 0); + + if (!list_empty(&ep->queue)) { + req = list_entry(ep->queue.next, struct dwc2_request, queue); + debug_cond(DEBUG_IN_EP, + "%s: Next Tx request start...\n", __func__); + setdma_tx(ep, req); + } +} + +static inline void dwc2_udc_check_tx_queue(struct dwc2_udc *dev, u8 ep_num) +{ + struct dwc2_ep *ep = &dev->ep[ep_num]; + struct dwc2_request *req; + + debug_cond(DEBUG_IN_EP, + "%s: Check queue, ep_num = %d\n", __func__, ep_num); + + if (!list_empty(&ep->queue)) { + req = list_entry(ep->queue.next, struct dwc2_request, queue); + debug_cond(DEBUG_IN_EP, + "%s: Next Tx request(0x%p) start...\n", + __func__, req); + + if (ep_is_in(ep)) + setdma_tx(ep, req); + else + setdma_rx(ep, req); + } else { + debug_cond(DEBUG_IN_EP, + "%s: NULL REQ on IN EP-%d\n", __func__, ep_num); + + return; + } + +} + +static void process_ep_in_intr(struct dwc2_udc *dev) +{ + u32 ep_intr, ep_intr_status; + u8 ep_num = 0; + + ep_intr = readl(®->daint); + debug_cond(DEBUG_IN_EP, + "*** %s: EP In interrupt : DAINT = 0x%x\n", __func__, ep_intr); + + ep_intr &= DAINT_MASK; + + while (ep_intr) { + if (ep_intr & DAINT_IN_EP_INT(1)) { + ep_intr_status = readl(®->in_endp[ep_num].diepint); + debug_cond(DEBUG_IN_EP, + "\tEP%d-IN : DIEPINT = 0x%x\n", + ep_num, ep_intr_status); + + /* Interrupt Clear */ + writel(ep_intr_status, ®->in_endp[ep_num].diepint); + + if (ep_intr_status & TRANSFER_DONE) { + complete_tx(dev, ep_num); + + if (ep_num == 0) { + if (dev->ep0state == + WAIT_FOR_IN_COMPLETE) + dev->ep0state = WAIT_FOR_SETUP; + + if (dev->ep0state == WAIT_FOR_SETUP) + dwc2_udc_pre_setup(); + + /* continue transfer after + set_clear_halt for DMA mode */ + if (clear_feature_flag == 1) { + dwc2_udc_check_tx_queue(dev, + clear_feature_num); + clear_feature_flag = 0; + } + } + } + } + ep_num++; + ep_intr >>= 1; + } +} + +static void process_ep_out_intr(struct dwc2_udc *dev) +{ + u32 ep_intr, ep_intr_status; + u8 ep_num = 0; + + ep_intr = readl(®->daint); + debug_cond(DEBUG_OUT_EP != 0, + "*** %s: EP OUT interrupt : DAINT = 0x%x\n", + __func__, ep_intr); + + ep_intr = (ep_intr >> DAINT_OUT_BIT) & DAINT_MASK; + + while (ep_intr) { + if (ep_intr & 0x1) { + ep_intr_status = readl(®->out_endp[ep_num].doepint); + debug_cond(DEBUG_OUT_EP != 0, + "\tEP%d-OUT : DOEPINT = 0x%x\n", + ep_num, ep_intr_status); + + /* Interrupt Clear */ + writel(ep_intr_status, ®->out_endp[ep_num].doepint); + + if (ep_num == 0) { + if (ep_intr_status & TRANSFER_DONE) { + if (dev->ep0state != + WAIT_FOR_OUT_COMPLETE) + complete_rx(dev, ep_num); + else { + dev->ep0state = WAIT_FOR_SETUP; + dwc2_udc_pre_setup(); + } + } + + if (ep_intr_status & + CTRL_OUT_EP_SETUP_PHASE_DONE) { + debug_cond(DEBUG_OUT_EP != 0, + "SETUP packet arrived\n"); + dwc2_handle_ep0(dev); + } + } else { + if (ep_intr_status & TRANSFER_DONE) + complete_rx(dev, ep_num); + } + } + ep_num++; + ep_intr >>= 1; + } +} + +/* + * usb client interrupt handler. + */ +static int dwc2_udc_irq(int irq, void *_dev) +{ + struct dwc2_udc *dev = _dev; + u32 intr_status; + u32 usb_status, gintmsk; + unsigned long flags = 0; + + spin_lock_irqsave(&dev->lock, flags); + + intr_status = readl(®->gintsts); + gintmsk = readl(®->gintmsk); + + debug_cond(DEBUG_ISR, + "\n*** %s : GINTSTS=0x%x(on state %s), GINTMSK : 0x%x," + "DAINT : 0x%x, DAINTMSK : 0x%x\n", + __func__, intr_status, state_names[dev->ep0state], gintmsk, + readl(®->daint), readl(®->daintmsk)); + + if (!intr_status) { + spin_unlock_irqrestore(&dev->lock, flags); + return IRQ_HANDLED; + } + + if (intr_status & INT_ENUMDONE) { + debug_cond(DEBUG_ISR, "\tSpeed Detection interrupt\n"); + + writel(INT_ENUMDONE, ®->gintsts); + usb_status = (readl(®->dsts) & 0x6); + + if (usb_status & (USB_FULL_30_60MHZ | USB_FULL_48MHZ)) { + debug_cond(DEBUG_ISR, + "\t\tFull Speed Detection\n"); + set_max_pktsize(dev, USB_SPEED_FULL); + + } else { + debug_cond(DEBUG_ISR, + "\t\tHigh Speed Detection : 0x%x\n", + usb_status); + set_max_pktsize(dev, USB_SPEED_HIGH); + } + } + + if (intr_status & INT_EARLY_SUSPEND) { + debug_cond(DEBUG_ISR, "\tEarly suspend interrupt\n"); + writel(INT_EARLY_SUSPEND, ®->gintsts); + } + + if (intr_status & INT_SUSPEND) { + usb_status = readl(®->dsts); + debug_cond(DEBUG_ISR, + "\tSuspend interrupt :(DSTS):0x%x\n", usb_status); + writel(INT_SUSPEND, ®->gintsts); + + if (dev->gadget.speed != USB_SPEED_UNKNOWN + && dev->driver) { + if (dev->driver->suspend) + dev->driver->suspend(&dev->gadget); + + /* HACK to let gadget detect disconnected state */ + if (dev->driver->disconnect) { + spin_unlock_irqrestore(&dev->lock, flags); + dev->driver->disconnect(&dev->gadget); + spin_lock_irqsave(&dev->lock, flags); + } + } + } + + if (intr_status & INT_RESUME) { + debug_cond(DEBUG_ISR, "\tResume interrupt\n"); + writel(INT_RESUME, ®->gintsts); + + if (dev->gadget.speed != USB_SPEED_UNKNOWN + && dev->driver + && dev->driver->resume) { + + dev->driver->resume(&dev->gadget); + } + } + + if (intr_status & INT_RESET) { + usb_status = readl(®->gotgctl); + debug_cond(DEBUG_ISR, + "\tReset interrupt - (GOTGCTL):0x%x\n", usb_status); + writel(INT_RESET, ®->gintsts); + + if ((usb_status & 0xc0000) == (0x3 << 18)) { + if (reset_available) { + debug_cond(DEBUG_ISR, + "\t\tOTG core got reset (%d)!!\n", + reset_available); + reconfig_usbd(dev); + dev->ep0state = WAIT_FOR_SETUP; + reset_available = 0; + dwc2_udc_pre_setup(); + } else + reset_available = 1; + + } else { + reset_available = 1; + debug_cond(DEBUG_ISR, + "\t\tRESET handling skipped\n"); + } + } + + if (intr_status & INT_IN_EP) + process_ep_in_intr(dev); + + if (intr_status & INT_OUT_EP) + process_ep_out_intr(dev); + + spin_unlock_irqrestore(&dev->lock, flags); + + return IRQ_HANDLED; +} + +/** Queue one request + * Kickstart transfer if needed + */ +static int dwc2_queue(struct usb_ep *_ep, struct usb_request *_req, + gfp_t gfp_flags) +{ + struct dwc2_request *req; + struct dwc2_ep *ep; + struct dwc2_udc *dev; + unsigned long flags = 0; + u32 ep_num, gintsts; + + req = container_of(_req, struct dwc2_request, req); + if (unlikely(!_req || !_req->complete || !_req->buf + || !list_empty(&req->queue))) { + + debug("%s: bad params\n", __func__); + return -EINVAL; + } + + ep = container_of(_ep, struct dwc2_ep, ep); + + if (unlikely(!_ep || (!ep->desc && ep->ep.name != ep0name))) { + + debug("%s: bad ep: %s, %d, %p\n", __func__, + ep->ep.name, !ep->desc, _ep); + return -EINVAL; + } + + ep_num = ep_index(ep); + dev = ep->dev; + if (unlikely(!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN)) { + + debug("%s: bogus device state %p\n", __func__, dev->driver); + return -ESHUTDOWN; + } + + spin_lock_irqsave(&dev->lock, flags); + + _req->status = -EINPROGRESS; + _req->actual = 0; + + /* kickstart this i/o queue? */ + debug("\n*** %s: %s-%s req = %p, len = %d, buf = %p" + "Q empty = %d, stopped = %d\n", + __func__, _ep->name, ep_is_in(ep) ? "in" : "out", + _req, _req->length, _req->buf, + list_empty(&ep->queue), ep->stopped); + +#ifdef DEBUG + { + int i, len = _req->length; + + printf("pkt = "); + if (len > 64) + len = 64; + for (i = 0; i < len; i++) { + printf("%02x", ((u8 *)_req->buf)[i]); + if ((i & 7) == 7) + printf(" "); + } + printf("\n"); + } +#endif + + if (list_empty(&ep->queue) && !ep->stopped) { + + if (ep_num == 0) { + /* EP0 */ + list_add_tail(&req->queue, &ep->queue); + dwc2_ep0_kick(dev, ep); + req = 0; + + } else if (ep_is_in(ep)) { + gintsts = readl(®->gintsts); + debug_cond(DEBUG_IN_EP, + "%s: ep_is_in, S3C_UDC_OTG_GINTSTS=0x%x\n", + __func__, gintsts); + + setdma_tx(ep, req); + } else { + gintsts = readl(®->gintsts); + debug_cond(DEBUG_OUT_EP != 0, + "%s:ep_is_out, S3C_UDC_OTG_GINTSTS=0x%x\n", + __func__, gintsts); + + setdma_rx(ep, req); + } + } + + /* pio or dma irq handler advances the queue. */ + if (likely(req != 0)) + list_add_tail(&req->queue, &ep->queue); + + spin_unlock_irqrestore(&dev->lock, flags); + + return 0; +} + +/****************************************************************/ +/* End Point 0 related functions */ +/****************************************************************/ + +/* return: 0 = still running, 1 = completed, negative = errno */ +static int write_fifo_ep0(struct dwc2_ep *ep, struct dwc2_request *req) +{ + u32 max; + unsigned count; + int is_last; + + max = ep_maxpacket(ep); + + debug_cond(DEBUG_EP0 != 0, "%s: max = %d\n", __func__, max); + + count = setdma_tx(ep, req); + + /* last packet is usually short (or a zlp) */ + if (likely(count != max)) + is_last = 1; + else { + if (likely(req->req.length != req->req.actual + count) + || req->req.zero) + is_last = 0; + else + is_last = 1; + } + + debug_cond(DEBUG_EP0 != 0, + "%s: wrote %s %d bytes%s %d left %p\n", __func__, + ep->ep.name, count, + is_last ? "/L" : "", + req->req.length - req->req.actual - count, req); + + /* requests complete when all IN data is in the FIFO */ + if (is_last) { + ep->dev->ep0state = WAIT_FOR_SETUP; + return 1; + } + + return 0; +} + +static int dwc2_fifo_read(struct dwc2_ep *ep, u32 *cp, int max) +{ + invalidate_dcache_range((unsigned long)cp, (unsigned long)cp + + ROUND(max, CONFIG_SYS_CACHELINE_SIZE)); + + debug_cond(DEBUG_EP0 != 0, + "%s: bytes=%d, ep_index=%d 0x%p\n", __func__, + max, ep_index(ep), cp); + + return max; +} + +/** + * udc_set_address - set the USB address for this device + * @address: + * + * Called from control endpoint function + * after it decodes a set address setup packet. + */ +static void udc_set_address(struct dwc2_udc *dev, unsigned char address) +{ + u32 ctrl = readl(®->dcfg); + writel(DEVICE_ADDRESS(address) | ctrl, ®->dcfg); + + dwc2_udc_ep0_zlp(dev); + + debug_cond(DEBUG_EP0 != 0, + "%s: USB OTG 2.0 Device address=%d, DCFG=0x%x\n", + __func__, address, readl(®->dcfg)); + + dev->usb_address = address; +} + +static inline void dwc2_udc_ep0_set_stall(struct dwc2_ep *ep) +{ + struct dwc2_udc *dev; + u32 ep_ctrl = 0; + + dev = ep->dev; + ep_ctrl = readl(®->in_endp[EP0_CON].diepctl); + + /* set the disable and stall bits */ + if (ep_ctrl & DEPCTL_EPENA) + ep_ctrl |= DEPCTL_EPDIS; + + ep_ctrl |= DEPCTL_STALL; + + writel(ep_ctrl, ®->in_endp[EP0_CON].diepctl); + + debug_cond(DEBUG_EP0 != 0, + "%s: set ep%d stall, DIEPCTL0 = 0x%p\n", + __func__, ep_index(ep), ®->in_endp[EP0_CON].diepctl); + /* + * The application can only set this bit, and the core clears it, + * when a SETUP token is received for this endpoint + */ + dev->ep0state = WAIT_FOR_SETUP; + + dwc2_udc_pre_setup(); +} + +static void dwc2_ep0_read(struct dwc2_udc *dev) +{ + struct dwc2_request *req; + struct dwc2_ep *ep = &dev->ep[0]; + + if (!list_empty(&ep->queue)) { + req = list_entry(ep->queue.next, struct dwc2_request, queue); + + } else { + debug("%s: ---> BUG\n", __func__); + BUG(); + return; + } + + debug_cond(DEBUG_EP0 != 0, + "%s: req = %p, req.length = 0x%x, req.actual = 0x%x\n", + __func__, req, req->req.length, req->req.actual); + + if (req->req.length == 0) { + /* zlp for Set_configuration, Set_interface, + * or Bulk-Only mass storge reset */ + + ep->len = 0; + dwc2_udc_ep0_zlp(dev); + + debug_cond(DEBUG_EP0 != 0, + "%s: req.length = 0, bRequest = %d\n", + __func__, usb_ctrl->bRequest); + return; + } + + setdma_rx(ep, req); +} + +/* + * DATA_STATE_XMIT + */ +static int dwc2_ep0_write(struct dwc2_udc *dev) +{ + struct dwc2_request *req; + struct dwc2_ep *ep = &dev->ep[0]; + int ret, need_zlp = 0; + + if (list_empty(&ep->queue)) + req = 0; + else + req = list_entry(ep->queue.next, struct dwc2_request, queue); + + if (!req) { + debug_cond(DEBUG_EP0 != 0, "%s: NULL REQ\n", __func__); + return 0; + } + + debug_cond(DEBUG_EP0 != 0, + "%s: req = %p, req.length = 0x%x, req.actual = 0x%x\n", + __func__, req, req->req.length, req->req.actual); + + if (req->req.length - req->req.actual == ep0_fifo_size) { + /* Next write will end with the packet size, */ + /* so we need Zero-length-packet */ + need_zlp = 1; + } + + ret = write_fifo_ep0(ep, req); + + if ((ret == 1) && !need_zlp) { + /* Last packet */ + dev->ep0state = WAIT_FOR_COMPLETE; + debug_cond(DEBUG_EP0 != 0, + "%s: finished, waiting for status\n", __func__); + + } else { + dev->ep0state = DATA_STATE_XMIT; + debug_cond(DEBUG_EP0 != 0, + "%s: not finished\n", __func__); + } + + return 1; +} + +static int dwc2_udc_get_status(struct dwc2_udc *dev, + struct usb_ctrlrequest *crq) +{ + u8 ep_num = crq->wIndex & 0x7F; + u16 g_status = 0; + u32 ep_ctrl; + + debug_cond(DEBUG_SETUP != 0, + "%s: *** USB_REQ_GET_STATUS\n", __func__); + printf("crq->brequest:0x%x\n", crq->bRequestType & USB_RECIP_MASK); + switch (crq->bRequestType & USB_RECIP_MASK) { + case USB_RECIP_INTERFACE: + g_status = 0; + debug_cond(DEBUG_SETUP != 0, + "\tGET_STATUS:USB_RECIP_INTERFACE, g_stauts = %d\n", + g_status); + break; + + case USB_RECIP_DEVICE: + g_status = 0x1; /* Self powered */ + debug_cond(DEBUG_SETUP != 0, + "\tGET_STATUS: USB_RECIP_DEVICE, g_stauts = %d\n", + g_status); + break; + + case USB_RECIP_ENDPOINT: + if (crq->wLength > 2) { + debug_cond(DEBUG_SETUP != 0, + "\tGET_STATUS:Not support EP or wLength\n"); + return 1; + } + + g_status = dev->ep[ep_num].stopped; + debug_cond(DEBUG_SETUP != 0, + "\tGET_STATUS: USB_RECIP_ENDPOINT, g_stauts = %d\n", + g_status); + + break; + + default: + return 1; + } + + memcpy(usb_ctrl, &g_status, sizeof(g_status)); + + flush_dcache_range((unsigned long) usb_ctrl, + (unsigned long) usb_ctrl + + ROUND(sizeof(g_status), CONFIG_SYS_CACHELINE_SIZE)); + + writel(usb_ctrl_dma_addr, ®->in_endp[EP0_CON].diepdma); + writel(DIEPT_SIZ_PKT_CNT(1) | DIEPT_SIZ_XFER_SIZE(2), + ®->in_endp[EP0_CON].dieptsiz); + + ep_ctrl = readl(®->in_endp[EP0_CON].diepctl); + writel(ep_ctrl|DEPCTL_EPENA|DEPCTL_CNAK, + ®->in_endp[EP0_CON].diepctl); + dev->ep0state = WAIT_FOR_NULL_COMPLETE; + + return 0; +} + +static void dwc2_udc_set_nak(struct dwc2_ep *ep) +{ + u8 ep_num; + u32 ep_ctrl = 0; + + ep_num = ep_index(ep); + debug("%s: ep_num = %d, ep_type = %d\n", __func__, ep_num, ep->ep_type); + + if (ep_is_in(ep)) { + ep_ctrl = readl(®->in_endp[ep_num].diepctl); + ep_ctrl |= DEPCTL_SNAK; + writel(ep_ctrl, ®->in_endp[ep_num].diepctl); + debug("%s: set NAK, DIEPCTL%d = 0x%x\n", + __func__, ep_num, readl(®->in_endp[ep_num].diepctl)); + } else { + ep_ctrl = readl(®->out_endp[ep_num].doepctl); + ep_ctrl |= DEPCTL_SNAK; + writel(ep_ctrl, ®->out_endp[ep_num].doepctl); + debug("%s: set NAK, DOEPCTL%d = 0x%x\n", + __func__, ep_num, readl(®->out_endp[ep_num].doepctl)); + } + + return; +} + + +static void dwc2_udc_ep_set_stall(struct dwc2_ep *ep) +{ + u8 ep_num; + u32 ep_ctrl = 0; + + ep_num = ep_index(ep); + debug("%s: ep_num = %d, ep_type = %d\n", __func__, ep_num, ep->ep_type); + + if (ep_is_in(ep)) { + ep_ctrl = readl(®->in_endp[ep_num].diepctl); + + /* set the disable and stall bits */ + if (ep_ctrl & DEPCTL_EPENA) + ep_ctrl |= DEPCTL_EPDIS; + + ep_ctrl |= DEPCTL_STALL; + + writel(ep_ctrl, ®->in_endp[ep_num].diepctl); + debug("%s: set stall, DIEPCTL%d = 0x%x\n", + __func__, ep_num, readl(®->in_endp[ep_num].diepctl)); + + } else { + ep_ctrl = readl(®->out_endp[ep_num].doepctl); + + /* set the stall bit */ + ep_ctrl |= DEPCTL_STALL; + + writel(ep_ctrl, ®->out_endp[ep_num].doepctl); + debug("%s: set stall, DOEPCTL%d = 0x%x\n", + __func__, ep_num, readl(®->out_endp[ep_num].doepctl)); + } + + return; +} + +static void dwc2_udc_ep_clear_stall(struct dwc2_ep *ep) +{ + u8 ep_num; + u32 ep_ctrl = 0; + + ep_num = ep_index(ep); + debug("%s: ep_num = %d, ep_type = %d\n", __func__, ep_num, ep->ep_type); + + if (ep_is_in(ep)) { + ep_ctrl = readl(®->in_endp[ep_num].diepctl); + + /* clear stall bit */ + ep_ctrl &= ~DEPCTL_STALL; + + /* + * USB Spec 9.4.5: For endpoints using data toggle, regardless + * of whether an endpoint has the Halt feature set, a + * ClearFeature(ENDPOINT_HALT) request always results in the + * data toggle being reinitialized to DATA0. + */ + if (ep->bmAttributes == USB_ENDPOINT_XFER_INT + || ep->bmAttributes == USB_ENDPOINT_XFER_BULK) { + ep_ctrl |= DEPCTL_SETD0PID; /* DATA0 */ + } + + writel(ep_ctrl, ®->in_endp[ep_num].diepctl); + debug("%s: cleared stall, DIEPCTL%d = 0x%x\n", + __func__, ep_num, readl(®->in_endp[ep_num].diepctl)); + + } else { + ep_ctrl = readl(®->out_endp[ep_num].doepctl); + + /* clear stall bit */ + ep_ctrl &= ~DEPCTL_STALL; + + if (ep->bmAttributes == USB_ENDPOINT_XFER_INT + || ep->bmAttributes == USB_ENDPOINT_XFER_BULK) { + ep_ctrl |= DEPCTL_SETD0PID; /* DATA0 */ + } + + writel(ep_ctrl, ®->out_endp[ep_num].doepctl); + debug("%s: cleared stall, DOEPCTL%d = 0x%x\n", + __func__, ep_num, readl(®->out_endp[ep_num].doepctl)); + } + + return; +} + +static int dwc2_udc_set_halt(struct usb_ep *_ep, int value) +{ + struct dwc2_ep *ep; + struct dwc2_udc *dev; + unsigned long flags = 0; + u8 ep_num; + + ep = container_of(_ep, struct dwc2_ep, ep); + ep_num = ep_index(ep); + + if (unlikely(!_ep || !ep->desc || ep_num == EP0_CON || + ep->desc->bmAttributes == USB_ENDPOINT_XFER_ISOC)) { + debug("%s: %s bad ep or descriptor\n", __func__, ep->ep.name); + return -EINVAL; + } + + /* Attempt to halt IN ep will fail if any transfer requests + * are still queue */ + if (value && ep_is_in(ep) && !list_empty(&ep->queue)) { + debug("%s: %s queue not empty, req = %p\n", + __func__, ep->ep.name, + list_entry(ep->queue.next, struct dwc2_request, queue)); + + return -EAGAIN; + } + + dev = ep->dev; + debug("%s: ep_num = %d, value = %d\n", __func__, ep_num, value); + + spin_lock_irqsave(&dev->lock, flags); + + if (value == 0) { + ep->stopped = 0; + dwc2_udc_ep_clear_stall(ep); + } else { + if (ep_num == 0) + dev->ep0state = WAIT_FOR_SETUP; + + ep->stopped = 1; + dwc2_udc_ep_set_stall(ep); + } + + spin_unlock_irqrestore(&dev->lock, flags); + + return 0; +} + +static void dwc2_udc_ep_activate(struct dwc2_ep *ep) +{ + u8 ep_num; + u32 ep_ctrl = 0, daintmsk = 0; + + ep_num = ep_index(ep); + + /* Read DEPCTLn register */ + if (ep_is_in(ep)) { + ep_ctrl = readl(®->in_endp[ep_num].diepctl); + daintmsk = 1 << ep_num; + } else { + ep_ctrl = readl(®->out_endp[ep_num].doepctl); + daintmsk = (1 << ep_num) << DAINT_OUT_BIT; + } + + debug("%s: EPCTRL%d = 0x%x, ep_is_in = %d\n", + __func__, ep_num, ep_ctrl, ep_is_in(ep)); + + /* If the EP is already active don't change the EP Control + * register. */ + if (!(ep_ctrl & DEPCTL_USBACTEP)) { + ep_ctrl = (ep_ctrl & ~DEPCTL_TYPE_MASK) | + (ep->bmAttributes << DEPCTL_TYPE_BIT); + ep_ctrl = (ep_ctrl & ~DEPCTL_MPS_MASK) | + (ep->ep.maxpacket << DEPCTL_MPS_BIT); + ep_ctrl |= (DEPCTL_SETD0PID | DEPCTL_USBACTEP | DEPCTL_SNAK); + + if (ep_is_in(ep)) { + writel(ep_ctrl, ®->in_endp[ep_num].diepctl); + debug("%s: USB Ative EP%d, DIEPCTRL%d = 0x%x\n", + __func__, ep_num, ep_num, + readl(®->in_endp[ep_num].diepctl)); + } else { + writel(ep_ctrl, ®->out_endp[ep_num].doepctl); + debug("%s: USB Ative EP%d, DOEPCTRL%d = 0x%x\n", + __func__, ep_num, ep_num, + readl(®->out_endp[ep_num].doepctl)); + } + } + + /* Unmask EP Interrtupt */ + writel(readl(®->daintmsk)|daintmsk, ®->daintmsk); + debug("%s: DAINTMSK = 0x%x\n", __func__, readl(®->daintmsk)); + +} + +static int dwc2_udc_clear_feature(struct usb_ep *_ep) +{ + struct dwc2_udc *dev; + struct dwc2_ep *ep; + u8 ep_num; + + ep = container_of(_ep, struct dwc2_ep, ep); + ep_num = ep_index(ep); + + dev = ep->dev; + debug_cond(DEBUG_SETUP != 0, + "%s: ep_num = %d, is_in = %d, clear_feature_flag = %d\n", + __func__, ep_num, ep_is_in(ep), clear_feature_flag); + + if (usb_ctrl->wLength != 0) { + debug_cond(DEBUG_SETUP != 0, + "\tCLEAR_FEATURE: wLength is not zero.....\n"); + return 1; + } + + switch (usb_ctrl->bRequestType & USB_RECIP_MASK) { + case USB_RECIP_DEVICE: + switch (usb_ctrl->wValue) { + case USB_DEVICE_REMOTE_WAKEUP: + debug_cond(DEBUG_SETUP != 0, + "\tOFF:USB_DEVICE_REMOTE_WAKEUP\n"); + break; + + case USB_DEVICE_TEST_MODE: + debug_cond(DEBUG_SETUP != 0, + "\tCLEAR_FEATURE: USB_DEVICE_TEST_MODE\n"); + /** @todo Add CLEAR_FEATURE for TEST modes. */ + break; + } + + dwc2_udc_ep0_zlp(dev); + break; + + case USB_RECIP_ENDPOINT: + debug_cond(DEBUG_SETUP != 0, + "\tCLEAR_FEATURE:USB_RECIP_ENDPOINT, wValue = %d\n", + usb_ctrl->wValue); + + if (usb_ctrl->wValue == USB_ENDPOINT_HALT) { + if (ep_num == 0) { + dwc2_udc_ep0_set_stall(ep); + return 0; + } + + dwc2_udc_ep0_zlp(dev); + + dwc2_udc_ep_clear_stall(ep); + dwc2_udc_ep_activate(ep); + ep->stopped = 0; + + clear_feature_num = ep_num; + clear_feature_flag = 1; + } + break; + } + + return 0; +} + +static int dwc2_udc_set_feature(struct usb_ep *_ep) +{ + struct dwc2_udc *dev; + struct dwc2_ep *ep; + u8 ep_num; + + ep = container_of(_ep, struct dwc2_ep, ep); + ep_num = ep_index(ep); + dev = ep->dev; + + debug_cond(DEBUG_SETUP != 0, + "%s: *** USB_REQ_SET_FEATURE , ep_num = %d\n", + __func__, ep_num); + + if (usb_ctrl->wLength != 0) { + debug_cond(DEBUG_SETUP != 0, + "\tSET_FEATURE: wLength is not zero.....\n"); + return 1; + } + + switch (usb_ctrl->bRequestType & USB_RECIP_MASK) { + case USB_RECIP_DEVICE: + switch (usb_ctrl->wValue) { + case USB_DEVICE_REMOTE_WAKEUP: + debug_cond(DEBUG_SETUP != 0, + "\tSET_FEATURE:USB_DEVICE_REMOTE_WAKEUP\n"); + break; + case USB_DEVICE_B_HNP_ENABLE: + debug_cond(DEBUG_SETUP != 0, + "\tSET_FEATURE: USB_DEVICE_B_HNP_ENABLE\n"); + break; + + case USB_DEVICE_A_HNP_SUPPORT: + /* RH port supports HNP */ + debug_cond(DEBUG_SETUP != 0, + "\tSET_FEATURE:USB_DEVICE_A_HNP_SUPPORT\n"); + break; + + case USB_DEVICE_A_ALT_HNP_SUPPORT: + /* other RH port does */ + debug_cond(DEBUG_SETUP != 0, + "\tSET: USB_DEVICE_A_ALT_HNP_SUPPORT\n"); + break; + } + + dwc2_udc_ep0_zlp(dev); + return 0; + + case USB_RECIP_INTERFACE: + debug_cond(DEBUG_SETUP != 0, + "\tSET_FEATURE: USB_RECIP_INTERFACE\n"); + break; + + case USB_RECIP_ENDPOINT: + debug_cond(DEBUG_SETUP != 0, + "\tSET_FEATURE: USB_RECIP_ENDPOINT\n"); + if (usb_ctrl->wValue == USB_ENDPOINT_HALT) { + if (ep_num == 0) { + dwc2_udc_ep0_set_stall(ep); + return 0; + } + ep->stopped = 1; + dwc2_udc_ep_set_stall(ep); + } + + dwc2_udc_ep0_zlp(dev); + return 0; + } + + return 1; +} + +/* + * WAIT_FOR_SETUP (OUT_PKT_RDY) + */ +static void dwc2_ep0_setup(struct dwc2_udc *dev) +{ + struct dwc2_ep *ep = &dev->ep[0]; + int i; + u8 ep_num; + + /* Nuke all previous transfers */ + nuke(ep, -EPROTO); + + /* read control req from fifo (8 bytes) */ + dwc2_fifo_read(ep, (u32 *)usb_ctrl, 8); + + debug_cond(DEBUG_SETUP != 0, + "%s: bRequestType = 0x%x(%s), bRequest = 0x%x" + "\twLength = 0x%x, wValue = 0x%x, wIndex= 0x%x\n", + __func__, usb_ctrl->bRequestType, + (usb_ctrl->bRequestType & USB_DIR_IN) ? "IN" : "OUT", + usb_ctrl->bRequest, + usb_ctrl->wLength, usb_ctrl->wValue, usb_ctrl->wIndex); + +#ifdef DEBUG + { + int i, len = sizeof(*usb_ctrl); + char *p = (char *)usb_ctrl; + + printf("pkt = "); + for (i = 0; i < len; i++) { + printf("%02x", ((u8 *)p)[i]); + if ((i & 7) == 7) + printf(" "); + } + printf("\n"); + } +#endif + + if (usb_ctrl->bRequest == GET_MAX_LUN_REQUEST && + usb_ctrl->wLength != 1) { + debug_cond(DEBUG_SETUP != 0, + "\t%s:GET_MAX_LUN_REQUEST:invalid", + __func__); + debug_cond(DEBUG_SETUP != 0, + "wLength = %d, setup returned\n", + usb_ctrl->wLength); + + dwc2_udc_ep0_set_stall(ep); + dev->ep0state = WAIT_FOR_SETUP; + + return; + } else if (usb_ctrl->bRequest == BOT_RESET_REQUEST && + usb_ctrl->wLength != 0) { + /* Bulk-Only *mass storge reset of class-specific request */ + debug_cond(DEBUG_SETUP != 0, + "%s:BOT Rest:invalid wLength =%d, setup returned\n", + __func__, usb_ctrl->wLength); + + dwc2_udc_ep0_set_stall(ep); + dev->ep0state = WAIT_FOR_SETUP; + + return; + } + + /* Set direction of EP0 */ + if (likely(usb_ctrl->bRequestType & USB_DIR_IN)) { + ep->bEndpointAddress |= USB_DIR_IN; + } else { + ep->bEndpointAddress &= ~USB_DIR_IN; + } + /* cope with automagic for some standard requests. */ + dev->req_std = (usb_ctrl->bRequestType & USB_TYPE_MASK) + == USB_TYPE_STANDARD; + + dev->req_pending = 1; + + /* Handle some SETUP packets ourselves */ + if (dev->req_std) { + switch (usb_ctrl->bRequest) { + case USB_REQ_SET_ADDRESS: + debug_cond(DEBUG_SETUP != 0, + "%s: *** USB_REQ_SET_ADDRESS (%d)\n", + __func__, usb_ctrl->wValue); + if (usb_ctrl->bRequestType + != (USB_TYPE_STANDARD | USB_RECIP_DEVICE)) + break; + + udc_set_address(dev, usb_ctrl->wValue); + return; + + case USB_REQ_SET_CONFIGURATION: + debug_cond(DEBUG_SETUP != 0, + "=====================================\n"); + debug_cond(DEBUG_SETUP != 0, + "%s: USB_REQ_SET_CONFIGURATION (%d)\n", + __func__, usb_ctrl->wValue); + + if (usb_ctrl->bRequestType == USB_RECIP_DEVICE) + reset_available = 1; + + break; + + case USB_REQ_GET_DESCRIPTOR: + debug_cond(DEBUG_SETUP != 0, + "%s: *** USB_REQ_GET_DESCRIPTOR\n", + __func__); + break; + + case USB_REQ_SET_INTERFACE: + debug_cond(DEBUG_SETUP != 0, + "%s: *** USB_REQ_SET_INTERFACE (%d)\n", + __func__, usb_ctrl->wValue); + + if (usb_ctrl->bRequestType == USB_RECIP_INTERFACE) + reset_available = 1; + + break; + + case USB_REQ_GET_CONFIGURATION: + debug_cond(DEBUG_SETUP != 0, + "%s: *** USB_REQ_GET_CONFIGURATION\n", + __func__); + break; + + case USB_REQ_GET_STATUS: + if (!dwc2_udc_get_status(dev, usb_ctrl)) + return; + + break; + + case USB_REQ_CLEAR_FEATURE: + ep_num = usb_ctrl->wIndex & 0x7f; + + if (!dwc2_udc_clear_feature(&dev->ep[ep_num].ep)) + return; + + break; + + case USB_REQ_SET_FEATURE: + ep_num = usb_ctrl->wIndex & 0x7f; + + if (!dwc2_udc_set_feature(&dev->ep[ep_num].ep)) + return; + + break; + + default: + debug_cond(DEBUG_SETUP != 0, + "%s: *** Default of usb_ctrl->bRequest=0x%x" + "happened.\n", __func__, usb_ctrl->bRequest); + break; + } + } + + + if (likely(dev->driver)) { + /* device-2-host (IN) or no data setup command, + * process immediately */ + debug_cond(DEBUG_SETUP != 0, + "%s:usb_ctrlreq will be passed to fsg_setup()\n", + __func__); + + spin_unlock(&dev->lock); + i = dev->driver->setup(&dev->gadget, usb_ctrl); + spin_lock(&dev->lock); + + if (i < 0) { + /* setup processing failed, force stall */ + dwc2_udc_ep0_set_stall(ep); + dev->ep0state = WAIT_FOR_SETUP; + + debug_cond(DEBUG_SETUP != 0, + "\tdev->driver->setup failed (%d)," + " bRequest = %d\n", + i, usb_ctrl->bRequest); + + + } else if (dev->req_pending) { + dev->req_pending = 0; + debug_cond(DEBUG_SETUP != 0, + "\tdev->req_pending...\n"); + } + + debug_cond(DEBUG_SETUP != 0, + "\tep0state = %s\n", state_names[dev->ep0state]); + + } +} + +/* + * handle ep0 interrupt + */ +static void dwc2_handle_ep0(struct dwc2_udc *dev) +{ + if (dev->ep0state == WAIT_FOR_SETUP) { + debug_cond(DEBUG_OUT_EP != 0, + "%s: WAIT_FOR_SETUP\n", __func__); + dwc2_ep0_setup(dev); + + } else { + debug_cond(DEBUG_OUT_EP != 0, + "%s: strange state!!(state = %s)\n", + __func__, state_names[dev->ep0state]); + } +} + +static void dwc2_ep0_kick(struct dwc2_udc *dev, struct dwc2_ep *ep) +{ + debug_cond(DEBUG_EP0 != 0, + "%s: ep_is_in = %d\n", __func__, ep_is_in(ep)); + if (ep_is_in(ep)) { + dev->ep0state = DATA_STATE_XMIT; + dwc2_ep0_write(dev); + + } else { + dev->ep0state = DATA_STATE_RECV; + dwc2_ep0_read(dev); + } +} diff --git a/drivers/usb/gadget/s3c_udc_otg.c b/drivers/usb/gadget/s3c_udc_otg.c deleted file mode 100644 index 0bff63f..0000000 --- a/drivers/usb/gadget/s3c_udc_otg.c +++ /dev/null @@ -1,845 +0,0 @@ -/* - * drivers/usb/gadget/s3c_udc_otg.c - * Samsung S3C on-chip full/high speed USB OTG 2.0 device controllers - * - * Copyright (C) 2008 for Samsung Electronics - * - * BSP Support for Samsung's UDC driver - * available at: - * git://git.kernel.org/pub/scm/linux/kernel/git/kki_ap/linux-2.6-samsung.git - * - * State machine bugfixes: - * Marek Szyprowski - * - * Ported to u-boot: - * Marek Szyprowski - * Lukasz Majewski - * - * SPDX-License-Identifier: GPL-2.0+ - */ -#undef DEBUG -#include -#include -#include -#include - -#include -#include - -#include -#include -#include - -#include - -#include "dwc2_udc_otg_regs.h" -#include "dwc2_udc_otg_priv.h" -#include - -/***********************************************************/ - -#define OTG_DMA_MODE 1 - -#define DEBUG_SETUP 0 -#define DEBUG_EP0 0 -#define DEBUG_ISR 0 -#define DEBUG_OUT_EP 0 -#define DEBUG_IN_EP 0 - -#include - -#define EP0_CON 0 -#define EP_MASK 0xF - -static char *state_names[] = { - "WAIT_FOR_SETUP", - "DATA_STATE_XMIT", - "DATA_STATE_NEED_ZLP", - "WAIT_FOR_OUT_STATUS", - "DATA_STATE_RECV", - "WAIT_FOR_COMPLETE", - "WAIT_FOR_OUT_COMPLETE", - "WAIT_FOR_IN_COMPLETE", - "WAIT_FOR_NULL_COMPLETE", -}; - -#define DRIVER_DESC "DWC2 HS USB OTG Device Driver, (c) Samsung Electronics" -#define DRIVER_VERSION "15 March 2009" - -struct dwc2_udc *the_controller; - -static const char driver_name[] = "dwc2-udc"; -static const char driver_desc[] = DRIVER_DESC; -static const char ep0name[] = "ep0-control"; - -/* Max packet size*/ -static unsigned int ep0_fifo_size = 64; -static unsigned int ep_fifo_size = 512; -static unsigned int ep_fifo_size2 = 1024; -static int reset_available = 1; - -static struct usb_ctrlrequest *usb_ctrl; -static dma_addr_t usb_ctrl_dma_addr; - -/* - Local declarations. -*/ -static int dwc2_ep_enable(struct usb_ep *ep, - const struct usb_endpoint_descriptor *); -static int dwc2_ep_disable(struct usb_ep *ep); -static struct usb_request *dwc2_alloc_request(struct usb_ep *ep, - gfp_t gfp_flags); -static void dwc2_free_request(struct usb_ep *ep, struct usb_request *); - -static int dwc2_queue(struct usb_ep *ep, struct usb_request *, gfp_t gfp_flags); -static int dwc2_dequeue(struct usb_ep *ep, struct usb_request *); -static int dwc2_fifo_status(struct usb_ep *ep); -static void dwc2_fifo_flush(struct usb_ep *ep); -static void dwc2_ep0_read(struct dwc2_udc *dev); -static void dwc2_ep0_kick(struct dwc2_udc *dev, struct dwc2_ep *ep); -static void dwc2_handle_ep0(struct dwc2_udc *dev); -static int dwc2_ep0_write(struct dwc2_udc *dev); -static int write_fifo_ep0(struct dwc2_ep *ep, struct dwc2_request *req); -static void done(struct dwc2_ep *ep, struct dwc2_request *req, int status); -static void stop_activity(struct dwc2_udc *dev, - struct usb_gadget_driver *driver); -static int udc_enable(struct dwc2_udc *dev); -static void udc_set_address(struct dwc2_udc *dev, unsigned char address); -static void reconfig_usbd(struct dwc2_udc *dev); -static void set_max_pktsize(struct dwc2_udc *dev, enum usb_device_speed speed); -static void nuke(struct dwc2_ep *ep, int status); -static int dwc2_udc_set_halt(struct usb_ep *_ep, int value); -static void dwc2_udc_set_nak(struct dwc2_ep *ep); - -void set_udc_gadget_private_data(void *p) -{ - debug_cond(DEBUG_SETUP != 0, - "%s: the_controller: 0x%p, p: 0x%p\n", __func__, - the_controller, p); - the_controller->gadget.dev.device_data = p; -} - -void *get_udc_gadget_private_data(struct usb_gadget *gadget) -{ - return gadget->dev.device_data; -} - -static struct usb_ep_ops dwc2_ep_ops = { - .enable = dwc2_ep_enable, - .disable = dwc2_ep_disable, - - .alloc_request = dwc2_alloc_request, - .free_request = dwc2_free_request, - - .queue = dwc2_queue, - .dequeue = dwc2_dequeue, - - .set_halt = dwc2_udc_set_halt, - .fifo_status = dwc2_fifo_status, - .fifo_flush = dwc2_fifo_flush, -}; - -#define create_proc_files() do {} while (0) -#define remove_proc_files() do {} while (0) - -/***********************************************************/ - -void __iomem *regs_otg; -struct dwc2_usbotg_reg *reg; - -bool dfu_usb_get_reset(void) -{ - return !!(readl(®->gintsts) & INT_RESET); -} - -__weak void otg_phy_init(struct dwc2_udc *dev) {} -__weak void otg_phy_off(struct dwc2_udc *dev) {} - -/***********************************************************/ - -#include "s3c_udc_otg_xfer_dma.c" - -/* - * udc_disable - disable USB device controller - */ -static void udc_disable(struct dwc2_udc *dev) -{ - debug_cond(DEBUG_SETUP != 0, "%s: %p\n", __func__, dev); - - udc_set_address(dev, 0); - - dev->ep0state = WAIT_FOR_SETUP; - dev->gadget.speed = USB_SPEED_UNKNOWN; - dev->usb_address = 0; - - otg_phy_off(dev); -} - -/* - * udc_reinit - initialize software state - */ -static void udc_reinit(struct dwc2_udc *dev) -{ - unsigned int i; - - debug_cond(DEBUG_SETUP != 0, "%s: %p\n", __func__, dev); - - /* device/ep0 records init */ - INIT_LIST_HEAD(&dev->gadget.ep_list); - INIT_LIST_HEAD(&dev->gadget.ep0->ep_list); - dev->ep0state = WAIT_FOR_SETUP; - - /* basic endpoint records init */ - for (i = 0; i < S3C_MAX_ENDPOINTS; i++) { - struct dwc2_ep *ep = &dev->ep[i]; - - if (i != 0) - list_add_tail(&ep->ep.ep_list, &dev->gadget.ep_list); - - ep->desc = 0; - ep->stopped = 0; - INIT_LIST_HEAD(&ep->queue); - ep->pio_irqs = 0; - } - - /* the rest was statically initialized, and is read-only */ -} - -#define BYTES2MAXP(x) (x / 8) -#define MAXP2BYTES(x) (x * 8) - -/* until it's enabled, this UDC should be completely invisible - * to any USB host. - */ -static int udc_enable(struct dwc2_udc *dev) -{ - debug_cond(DEBUG_SETUP != 0, "%s: %p\n", __func__, dev); - - otg_phy_init(dev); - reconfig_usbd(dev); - - debug_cond(DEBUG_SETUP != 0, - "DWC2 USB 2.0 OTG Controller Core Initialized : 0x%x\n", - readl(®->gintmsk)); - - dev->gadget.speed = USB_SPEED_UNKNOWN; - - return 0; -} - -/* - Register entry point for the peripheral controller driver. -*/ -int usb_gadget_register_driver(struct usb_gadget_driver *driver) -{ - struct dwc2_udc *dev = the_controller; - int retval = 0; - unsigned long flags = 0; - - debug_cond(DEBUG_SETUP != 0, "%s: %s\n", __func__, "no name"); - - if (!driver - || (driver->speed != USB_SPEED_FULL - && driver->speed != USB_SPEED_HIGH) - || !driver->bind || !driver->disconnect || !driver->setup) - return -EINVAL; - if (!dev) - return -ENODEV; - if (dev->driver) - return -EBUSY; - - spin_lock_irqsave(&dev->lock, flags); - /* first hook up the driver ... */ - dev->driver = driver; - spin_unlock_irqrestore(&dev->lock, flags); - - if (retval) { /* TODO */ - printf("target device_add failed, error %d\n", retval); - return retval; - } - - retval = driver->bind(&dev->gadget); - if (retval) { - debug_cond(DEBUG_SETUP != 0, - "%s: bind to driver --> error %d\n", - dev->gadget.name, retval); - dev->driver = 0; - return retval; - } - - enable_irq(IRQ_OTG); - - debug_cond(DEBUG_SETUP != 0, - "Registered gadget driver %s\n", dev->gadget.name); - udc_enable(dev); - - return 0; -} - -/* - * Unregister entry point for the peripheral controller driver. - */ -int usb_gadget_unregister_driver(struct usb_gadget_driver *driver) -{ - struct dwc2_udc *dev = the_controller; - unsigned long flags = 0; - - if (!dev) - return -ENODEV; - if (!driver || driver != dev->driver) - return -EINVAL; - - spin_lock_irqsave(&dev->lock, flags); - dev->driver = 0; - stop_activity(dev, driver); - spin_unlock_irqrestore(&dev->lock, flags); - - driver->unbind(&dev->gadget); - - disable_irq(IRQ_OTG); - - udc_disable(dev); - return 0; -} - -/* - * done - retire a request; caller blocked irqs - */ -static void done(struct dwc2_ep *ep, struct dwc2_request *req, int status) -{ - unsigned int stopped = ep->stopped; - - debug("%s: %s %p, req = %p, stopped = %d\n", - __func__, ep->ep.name, ep, &req->req, stopped); - - list_del_init(&req->queue); - - if (likely(req->req.status == -EINPROGRESS)) - req->req.status = status; - else - status = req->req.status; - - if (status && status != -ESHUTDOWN) { - debug("complete %s req %p stat %d len %u/%u\n", - ep->ep.name, &req->req, status, - req->req.actual, req->req.length); - } - - /* don't modify queue heads during completion callback */ - ep->stopped = 1; - -#ifdef DEBUG - printf("calling complete callback\n"); - { - int i, len = req->req.length; - - printf("pkt[%d] = ", req->req.length); - if (len > 64) - len = 64; - for (i = 0; i < len; i++) { - printf("%02x", ((u8 *)req->req.buf)[i]); - if ((i & 7) == 7) - printf(" "); - } - printf("\n"); - } -#endif - spin_unlock(&ep->dev->lock); - req->req.complete(&ep->ep, &req->req); - spin_lock(&ep->dev->lock); - - debug("callback completed\n"); - - ep->stopped = stopped; -} - -/* - * nuke - dequeue ALL requests - */ -static void nuke(struct dwc2_ep *ep, int status) -{ - struct dwc2_request *req; - - debug("%s: %s %p\n", __func__, ep->ep.name, ep); - - /* called with irqs blocked */ - while (!list_empty(&ep->queue)) { - req = list_entry(ep->queue.next, struct dwc2_request, queue); - done(ep, req, status); - } -} - -static void stop_activity(struct dwc2_udc *dev, - struct usb_gadget_driver *driver) -{ - int i; - - /* don't disconnect drivers more than once */ - if (dev->gadget.speed == USB_SPEED_UNKNOWN) - driver = 0; - dev->gadget.speed = USB_SPEED_UNKNOWN; - - /* prevent new request submissions, kill any outstanding requests */ - for (i = 0; i < S3C_MAX_ENDPOINTS; i++) { - struct dwc2_ep *ep = &dev->ep[i]; - ep->stopped = 1; - nuke(ep, -ESHUTDOWN); - } - - /* report disconnect; the driver is already quiesced */ - if (driver) { - spin_unlock(&dev->lock); - driver->disconnect(&dev->gadget); - spin_lock(&dev->lock); - } - - /* re-init driver-visible data structures */ - udc_reinit(dev); -} - -static void reconfig_usbd(struct dwc2_udc *dev) -{ - /* 2. Soft-reset OTG Core and then unreset again. */ - int i; - unsigned int uTemp = writel(CORE_SOFT_RESET, ®->grstctl); - uint32_t dflt_gusbcfg; - - debug("Reseting OTG controller\n"); - - dflt_gusbcfg = - 0<<15 /* PHY Low Power Clock sel*/ - |1<<14 /* Non-Periodic TxFIFO Rewind Enable*/ - |0x5<<10 /* Turnaround time*/ - |0<<9 | 0<<8 /* [0:HNP disable,1:HNP enable][ 0:SRP disable*/ - /* 1:SRP enable] H1= 1,1*/ - |0<<7 /* Ulpi DDR sel*/ - |0<<6 /* 0: high speed utmi+, 1: full speed serial*/ - |0<<4 /* 0: utmi+, 1:ulpi*/ - |1<<3 /* phy i/f 0:8bit, 1:16bit*/ - |0x7<<0; /* HS/FS Timeout**/ - - if (dev->pdata->usb_gusbcfg) - dflt_gusbcfg = dev->pdata->usb_gusbcfg; - - writel(dflt_gusbcfg, ®->gusbcfg); - - /* 3. Put the OTG device core in the disconnected state.*/ - uTemp = readl(®->dctl); - uTemp |= SOFT_DISCONNECT; - writel(uTemp, ®->dctl); - - udelay(20); - - /* 4. Make the OTG device core exit from the disconnected state.*/ - uTemp = readl(®->dctl); - uTemp = uTemp & ~SOFT_DISCONNECT; - writel(uTemp, ®->dctl); - - /* 5. Configure OTG Core to initial settings of device mode.*/ - /* [][1: full speed(30Mhz) 0:high speed]*/ - writel(EP_MISS_CNT(1) | DEV_SPEED_HIGH_SPEED_20, ®->dcfg); - - mdelay(1); - - /* 6. Unmask the core interrupts*/ - writel(GINTMSK_INIT, ®->gintmsk); - - /* 7. Set NAK bit of EP0, EP1, EP2*/ - writel(DEPCTL_EPDIS|DEPCTL_SNAK, ®->out_endp[EP0_CON].doepctl); - writel(DEPCTL_EPDIS|DEPCTL_SNAK, ®->in_endp[EP0_CON].diepctl); - - for (i = 1; i < S3C_MAX_ENDPOINTS; i++) { - writel(DEPCTL_EPDIS|DEPCTL_SNAK, ®->out_endp[i].doepctl); - writel(DEPCTL_EPDIS|DEPCTL_SNAK, ®->in_endp[i].diepctl); - } - - /* 8. Unmask EPO interrupts*/ - writel(((1 << EP0_CON) << DAINT_OUT_BIT) - | (1 << EP0_CON), ®->daintmsk); - - /* 9. Unmask device OUT EP common interrupts*/ - writel(DOEPMSK_INIT, ®->doepmsk); - - /* 10. Unmask device IN EP common interrupts*/ - writel(DIEPMSK_INIT, ®->diepmsk); - - /* 11. Set Rx FIFO Size (in 32-bit words) */ - writel(RX_FIFO_SIZE >> 2, ®->grxfsiz); - - /* 12. Set Non Periodic Tx FIFO Size */ - writel((NPTX_FIFO_SIZE >> 2) << 16 | ((RX_FIFO_SIZE >> 2)) << 0, - ®->gnptxfsiz); - - for (i = 1; i < S3C_MAX_HW_ENDPOINTS; i++) - writel((PTX_FIFO_SIZE >> 2) << 16 | - ((RX_FIFO_SIZE + NPTX_FIFO_SIZE + - PTX_FIFO_SIZE*(i-1)) >> 2) << 0, - ®->dieptxf[i-1]); - - /* Flush the RX FIFO */ - writel(RX_FIFO_FLUSH, ®->grstctl); - while (readl(®->grstctl) & RX_FIFO_FLUSH) - debug("%s: waiting for S3C_UDC_OTG_GRSTCTL\n", __func__); - - /* Flush all the Tx FIFO's */ - writel(TX_FIFO_FLUSH_ALL, ®->grstctl); - writel(TX_FIFO_FLUSH_ALL | TX_FIFO_FLUSH, ®->grstctl); - while (readl(®->grstctl) & TX_FIFO_FLUSH) - debug("%s: waiting for S3C_UDC_OTG_GRSTCTL\n", __func__); - - /* 13. Clear NAK bit of EP0, EP1, EP2*/ - /* For Slave mode*/ - /* EP0: Control OUT */ - writel(DEPCTL_EPDIS | DEPCTL_CNAK, - ®->out_endp[EP0_CON].doepctl); - - /* 14. Initialize OTG Link Core.*/ - writel(GAHBCFG_INIT, ®->gahbcfg); -} - -static void set_max_pktsize(struct dwc2_udc *dev, enum usb_device_speed speed) -{ - unsigned int ep_ctrl; - int i; - - if (speed == USB_SPEED_HIGH) { - ep0_fifo_size = 64; - ep_fifo_size = 512; - ep_fifo_size2 = 1024; - dev->gadget.speed = USB_SPEED_HIGH; - } else { - ep0_fifo_size = 64; - ep_fifo_size = 64; - ep_fifo_size2 = 64; - dev->gadget.speed = USB_SPEED_FULL; - } - - dev->ep[0].ep.maxpacket = ep0_fifo_size; - for (i = 1; i < S3C_MAX_ENDPOINTS; i++) - dev->ep[i].ep.maxpacket = ep_fifo_size; - - /* EP0 - Control IN (64 bytes)*/ - ep_ctrl = readl(®->in_endp[EP0_CON].diepctl); - writel(ep_ctrl|(0<<0), ®->in_endp[EP0_CON].diepctl); - - /* EP0 - Control OUT (64 bytes)*/ - ep_ctrl = readl(®->out_endp[EP0_CON].doepctl); - writel(ep_ctrl|(0<<0), ®->out_endp[EP0_CON].doepctl); -} - -static int dwc2_ep_enable(struct usb_ep *_ep, - const struct usb_endpoint_descriptor *desc) -{ - struct dwc2_ep *ep; - struct dwc2_udc *dev; - unsigned long flags = 0; - - debug("%s: %p\n", __func__, _ep); - - ep = container_of(_ep, struct dwc2_ep, ep); - if (!_ep || !desc || ep->desc || _ep->name == ep0name - || desc->bDescriptorType != USB_DT_ENDPOINT - || ep->bEndpointAddress != desc->bEndpointAddress - || ep_maxpacket(ep) < - le16_to_cpu(get_unaligned(&desc->wMaxPacketSize))) { - - debug("%s: bad ep or descriptor\n", __func__); - return -EINVAL; - } - - /* xfer types must match, except that interrupt ~= bulk */ - if (ep->bmAttributes != desc->bmAttributes - && ep->bmAttributes != USB_ENDPOINT_XFER_BULK - && desc->bmAttributes != USB_ENDPOINT_XFER_INT) { - - debug("%s: %s type mismatch\n", __func__, _ep->name); - return -EINVAL; - } - - /* hardware _could_ do smaller, but driver doesn't */ - if ((desc->bmAttributes == USB_ENDPOINT_XFER_BULK - && le16_to_cpu(get_unaligned(&desc->wMaxPacketSize)) != - ep_maxpacket(ep)) || !get_unaligned(&desc->wMaxPacketSize)) { - - debug("%s: bad %s maxpacket\n", __func__, _ep->name); - return -ERANGE; - } - - dev = ep->dev; - if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) { - - debug("%s: bogus device state\n", __func__); - return -ESHUTDOWN; - } - - ep->stopped = 0; - ep->desc = desc; - ep->pio_irqs = 0; - ep->ep.maxpacket = le16_to_cpu(get_unaligned(&desc->wMaxPacketSize)); - - /* Reset halt state */ - dwc2_udc_set_nak(ep); - dwc2_udc_set_halt(_ep, 0); - - spin_lock_irqsave(&ep->dev->lock, flags); - dwc2_udc_ep_activate(ep); - spin_unlock_irqrestore(&ep->dev->lock, flags); - - debug("%s: enabled %s, stopped = %d, maxpacket = %d\n", - __func__, _ep->name, ep->stopped, ep->ep.maxpacket); - return 0; -} - -/* - * Disable EP - */ -static int dwc2_ep_disable(struct usb_ep *_ep) -{ - struct dwc2_ep *ep; - unsigned long flags = 0; - - debug("%s: %p\n", __func__, _ep); - - ep = container_of(_ep, struct dwc2_ep, ep); - if (!_ep || !ep->desc) { - debug("%s: %s not enabled\n", __func__, - _ep ? ep->ep.name : NULL); - return -EINVAL; - } - - spin_lock_irqsave(&ep->dev->lock, flags); - - /* Nuke all pending requests */ - nuke(ep, -ESHUTDOWN); - - ep->desc = 0; - ep->stopped = 1; - - spin_unlock_irqrestore(&ep->dev->lock, flags); - - debug("%s: disabled %s\n", __func__, _ep->name); - return 0; -} - -static struct usb_request *dwc2_alloc_request(struct usb_ep *ep, - gfp_t gfp_flags) -{ - struct dwc2_request *req; - - debug("%s: %s %p\n", __func__, ep->name, ep); - - req = memalign(CONFIG_SYS_CACHELINE_SIZE, sizeof(*req)); - if (!req) - return 0; - - memset(req, 0, sizeof *req); - INIT_LIST_HEAD(&req->queue); - - return &req->req; -} - -static void dwc2_free_request(struct usb_ep *ep, struct usb_request *_req) -{ - struct dwc2_request *req; - - debug("%s: %p\n", __func__, ep); - - req = container_of(_req, struct dwc2_request, req); - WARN_ON(!list_empty(&req->queue)); - kfree(req); -} - -/* dequeue JUST ONE request */ -static int dwc2_dequeue(struct usb_ep *_ep, struct usb_request *_req) -{ - struct dwc2_ep *ep; - struct dwc2_request *req; - unsigned long flags = 0; - - debug("%s: %p\n", __func__, _ep); - - ep = container_of(_ep, struct dwc2_ep, ep); - if (!_ep || ep->ep.name == ep0name) - return -EINVAL; - - spin_lock_irqsave(&ep->dev->lock, flags); - - /* make sure it's actually queued on this endpoint */ - list_for_each_entry(req, &ep->queue, queue) { - if (&req->req == _req) - break; - } - if (&req->req != _req) { - spin_unlock_irqrestore(&ep->dev->lock, flags); - return -EINVAL; - } - - done(ep, req, -ECONNRESET); - - spin_unlock_irqrestore(&ep->dev->lock, flags); - return 0; -} - -/* - * Return bytes in EP FIFO - */ -static int dwc2_fifo_status(struct usb_ep *_ep) -{ - int count = 0; - struct dwc2_ep *ep; - - ep = container_of(_ep, struct dwc2_ep, ep); - if (!_ep) { - debug("%s: bad ep\n", __func__); - return -ENODEV; - } - - debug("%s: %d\n", __func__, ep_index(ep)); - - /* LPD can't report unclaimed bytes from IN fifos */ - if (ep_is_in(ep)) - return -EOPNOTSUPP; - - return count; -} - -/* - * Flush EP FIFO - */ -static void dwc2_fifo_flush(struct usb_ep *_ep) -{ - struct dwc2_ep *ep; - - ep = container_of(_ep, struct dwc2_ep, ep); - if (unlikely(!_ep || (!ep->desc && ep->ep.name != ep0name))) { - debug("%s: bad ep\n", __func__); - return; - } - - debug("%s: %d\n", __func__, ep_index(ep)); -} - -static const struct usb_gadget_ops dwc2_udc_ops = { - /* current versions must always be self-powered */ -}; - -static struct dwc2_udc memory = { - .usb_address = 0, - .gadget = { - .ops = &dwc2_udc_ops, - .ep0 = &memory.ep[0].ep, - .name = driver_name, - }, - - /* control endpoint */ - .ep[0] = { - .ep = { - .name = ep0name, - .ops = &dwc2_ep_ops, - .maxpacket = EP0_FIFO_SIZE, - }, - .dev = &memory, - - .bEndpointAddress = 0, - .bmAttributes = 0, - - .ep_type = ep_control, - }, - - /* first group of endpoints */ - .ep[1] = { - .ep = { - .name = "ep1in-bulk", - .ops = &dwc2_ep_ops, - .maxpacket = EP_FIFO_SIZE, - }, - .dev = &memory, - - .bEndpointAddress = USB_DIR_IN | 1, - .bmAttributes = USB_ENDPOINT_XFER_BULK, - - .ep_type = ep_bulk_out, - .fifo_num = 1, - }, - - .ep[2] = { - .ep = { - .name = "ep2out-bulk", - .ops = &dwc2_ep_ops, - .maxpacket = EP_FIFO_SIZE, - }, - .dev = &memory, - - .bEndpointAddress = USB_DIR_OUT | 2, - .bmAttributes = USB_ENDPOINT_XFER_BULK, - - .ep_type = ep_bulk_in, - .fifo_num = 2, - }, - - .ep[3] = { - .ep = { - .name = "ep3in-int", - .ops = &dwc2_ep_ops, - .maxpacket = EP_FIFO_SIZE, - }, - .dev = &memory, - - .bEndpointAddress = USB_DIR_IN | 3, - .bmAttributes = USB_ENDPOINT_XFER_INT, - - .ep_type = ep_interrupt, - .fifo_num = 3, - }, -}; - -/* - * probe - binds to the platform device - */ - -int s3c_udc_probe(struct s3c_plat_otg_data *pdata) -{ - struct dwc2_udc *dev = &memory; - int retval = 0; - - debug("%s: %p\n", __func__, pdata); - - dev->pdata = pdata; - - reg = (struct dwc2_usbotg_reg *)pdata->regs_otg; - - /* regs_otg = (void *)pdata->regs_otg; */ - - dev->gadget.is_dualspeed = 1; /* Hack only*/ - dev->gadget.is_otg = 0; - dev->gadget.is_a_peripheral = 0; - dev->gadget.b_hnp_enable = 0; - dev->gadget.a_hnp_support = 0; - dev->gadget.a_alt_hnp_support = 0; - - the_controller = dev; - - usb_ctrl = memalign(CONFIG_SYS_CACHELINE_SIZE, - ROUND(sizeof(struct usb_ctrlrequest), - CONFIG_SYS_CACHELINE_SIZE)); - if (!usb_ctrl) { - error("No memory available for UDC!\n"); - return -ENOMEM; - } - - usb_ctrl_dma_addr = (dma_addr_t) usb_ctrl; - - udc_reinit(dev); - - return retval; -} - -int usb_gadget_handle_interrupts(int index) -{ - u32 intr_status = readl(®->gintsts); - u32 gintmsk = readl(®->gintmsk); - - if (intr_status & gintmsk) - return dwc2_udc_irq(1, (void *)the_controller); - return 0; -} diff --git a/drivers/usb/gadget/s3c_udc_otg_phy.c b/drivers/usb/gadget/s3c_udc_otg_phy.c deleted file mode 100644 index ab7515b..0000000 --- a/drivers/usb/gadget/s3c_udc_otg_phy.c +++ /dev/null @@ -1,102 +0,0 @@ -/* - * drivers/usb/gadget/s3c_udc_otg.c - * Samsung S3C on-chip full/high speed USB OTG 2.0 device controllers - * - * Copyright (C) 2008 for Samsung Electronics - * - * BSP Support for Samsung's UDC driver - * available at: - * git://git.kernel.org/pub/scm/linux/kernel/git/kki_ap/linux-2.6-samsung.git - * - * State machine bugfixes: - * Marek Szyprowski - * - * Ported to u-boot: - * Marek Szyprowski - * Lukasz Majewski - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include -#include -#include -#include - -#include -#include - -#include -#include -#include - -#include - -#include "dwc2_udc_otg_regs.h" -#include "dwc2_udc_otg_priv.h" -#include - -#include - -void otg_phy_init(struct dwc2_udc *dev) -{ - unsigned int usb_phy_ctrl = dev->pdata->usb_phy_ctrl; - struct dwc2_usbotg_phy *phy = - (struct dwc2_usbotg_phy *)dev->pdata->regs_phy; - - dev->pdata->phy_control(1); - - /* USB PHY0 Enable */ - printf("USB PHY0 Enable\n"); - - /* Enable PHY */ - writel(readl(usb_phy_ctrl) | USB_PHY_CTRL_EN0, usb_phy_ctrl); - - if (dev->pdata->usb_flags == PHY0_SLEEP) /* C210 Universal */ - writel((readl(&phy->phypwr) - &~(PHY_0_SLEEP | OTG_DISABLE_0 | ANALOG_PWRDOWN) - &~FORCE_SUSPEND_0), &phy->phypwr); - else /* C110 GONI */ - writel((readl(&phy->phypwr) &~(OTG_DISABLE_0 | ANALOG_PWRDOWN) - &~FORCE_SUSPEND_0), &phy->phypwr); - - if (s5p_cpu_id == 0x4412) - writel((readl(&phy->phyclk) & ~(EXYNOS4X12_ID_PULLUP0 | - EXYNOS4X12_COMMON_ON_N0)) | EXYNOS4X12_CLK_SEL_24MHZ, - &phy->phyclk); /* PLL 24Mhz */ - else - writel((readl(&phy->phyclk) & ~(ID_PULLUP0 | COMMON_ON_N0)) | - CLK_SEL_24MHZ, &phy->phyclk); /* PLL 24Mhz */ - - writel((readl(&phy->rstcon) &~(LINK_SW_RST | PHYLNK_SW_RST)) - | PHY_SW_RST0, &phy->rstcon); - udelay(10); - writel(readl(&phy->rstcon) - &~(PHY_SW_RST0 | LINK_SW_RST | PHYLNK_SW_RST), &phy->rstcon); - udelay(10); -} - -void otg_phy_off(struct dwc2_udc *dev) -{ - unsigned int usb_phy_ctrl = dev->pdata->usb_phy_ctrl; - struct dwc2_usbotg_phy *phy = - (struct dwc2_usbotg_phy *)dev->pdata->regs_phy; - - /* reset controller just in case */ - writel(PHY_SW_RST0, &phy->rstcon); - udelay(20); - writel(readl(&phy->phypwr) &~PHY_SW_RST0, &phy->rstcon); - udelay(20); - - writel(readl(&phy->phypwr) | OTG_DISABLE_0 | ANALOG_PWRDOWN - | FORCE_SUSPEND_0, &phy->phypwr); - - writel(readl(usb_phy_ctrl) &~USB_PHY_CTRL_EN0, usb_phy_ctrl); - - writel((readl(&phy->phyclk) & ~(ID_PULLUP0 | COMMON_ON_N0)), - &phy->phyclk); - - udelay(10000); - - dev->pdata->phy_control(0); -} diff --git a/drivers/usb/gadget/s3c_udc_otg_xfer_dma.c b/drivers/usb/gadget/s3c_udc_otg_xfer_dma.c deleted file mode 100644 index b8b2703..0000000 --- a/drivers/usb/gadget/s3c_udc_otg_xfer_dma.c +++ /dev/null @@ -1,1480 +0,0 @@ -/* - * drivers/usb/gadget/s3c_udc_otg_xfer_dma.c - * Samsung S3C on-chip full/high speed USB OTG 2.0 device controllers - * - * Copyright (C) 2009 for Samsung Electronics - * - * BSP Support for Samsung's UDC driver - * available at: - * git://git.kernel.org/pub/scm/linux/kernel/git/kki_ap/linux-2.6-samsung.git - * - * State machine bugfixes: - * Marek Szyprowski - * - * Ported to u-boot: - * Marek Szyprowski - * Lukasz Majewski - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -static u8 clear_feature_num; -int clear_feature_flag; - -/* Bulk-Only Mass Storage Reset (class-specific request) */ -#define GET_MAX_LUN_REQUEST 0xFE -#define BOT_RESET_REQUEST 0xFF - -static inline void dwc2_udc_ep0_zlp(struct dwc2_udc *dev) -{ - u32 ep_ctrl; - - writel(usb_ctrl_dma_addr, ®->in_endp[EP0_CON].diepdma); - writel(DIEPT_SIZ_PKT_CNT(1), ®->in_endp[EP0_CON].dieptsiz); - - ep_ctrl = readl(®->in_endp[EP0_CON].diepctl); - writel(ep_ctrl|DEPCTL_EPENA|DEPCTL_CNAK, - ®->in_endp[EP0_CON].diepctl); - - debug_cond(DEBUG_EP0 != 0, "%s:EP0 ZLP DIEPCTL0 = 0x%x\n", - __func__, readl(®->in_endp[EP0_CON].diepctl)); - dev->ep0state = WAIT_FOR_IN_COMPLETE; -} - -static void dwc2_udc_pre_setup(void) -{ - u32 ep_ctrl; - - debug_cond(DEBUG_IN_EP, - "%s : Prepare Setup packets.\n", __func__); - - writel(DOEPT_SIZ_PKT_CNT(1) | sizeof(struct usb_ctrlrequest), - ®->out_endp[EP0_CON].doeptsiz); - writel(usb_ctrl_dma_addr, ®->out_endp[EP0_CON].doepdma); - - ep_ctrl = readl(®->out_endp[EP0_CON].doepctl); - writel(ep_ctrl|DEPCTL_EPENA, ®->out_endp[EP0_CON].doepctl); - - debug_cond(DEBUG_EP0 != 0, "%s:EP0 ZLP DIEPCTL0 = 0x%x\n", - __func__, readl(®->in_endp[EP0_CON].diepctl)); - debug_cond(DEBUG_EP0 != 0, "%s:EP0 ZLP DOEPCTL0 = 0x%x\n", - __func__, readl(®->out_endp[EP0_CON].doepctl)); - -} - -static inline void dwc2_ep0_complete_out(void) -{ - u32 ep_ctrl; - - debug_cond(DEBUG_EP0 != 0, "%s:EP0 ZLP DIEPCTL0 = 0x%x\n", - __func__, readl(®->in_endp[EP0_CON].diepctl)); - debug_cond(DEBUG_EP0 != 0, "%s:EP0 ZLP DOEPCTL0 = 0x%x\n", - __func__, readl(®->out_endp[EP0_CON].doepctl)); - - debug_cond(DEBUG_IN_EP, - "%s : Prepare Complete Out packet.\n", __func__); - - writel(DOEPT_SIZ_PKT_CNT(1) | sizeof(struct usb_ctrlrequest), - ®->out_endp[EP0_CON].doeptsiz); - writel(usb_ctrl_dma_addr, ®->out_endp[EP0_CON].doepdma); - - ep_ctrl = readl(®->out_endp[EP0_CON].doepctl); - writel(ep_ctrl|DEPCTL_EPENA|DEPCTL_CNAK, - ®->out_endp[EP0_CON].doepctl); - - debug_cond(DEBUG_EP0 != 0, "%s:EP0 ZLP DIEPCTL0 = 0x%x\n", - __func__, readl(®->in_endp[EP0_CON].diepctl)); - debug_cond(DEBUG_EP0 != 0, "%s:EP0 ZLP DOEPCTL0 = 0x%x\n", - __func__, readl(®->out_endp[EP0_CON].doepctl)); - -} - - -static int setdma_rx(struct dwc2_ep *ep, struct dwc2_request *req) -{ - u32 *buf, ctrl; - u32 length, pktcnt; - u32 ep_num = ep_index(ep); - - buf = req->req.buf + req->req.actual; - length = min_t(u32, req->req.length - req->req.actual, - ep_num ? DMA_BUFFER_SIZE : ep->ep.maxpacket); - - ep->len = length; - ep->dma_buf = buf; - - if (ep_num == EP0_CON || length == 0) - pktcnt = 1; - else - pktcnt = (length - 1)/(ep->ep.maxpacket) + 1; - - ctrl = readl(®->out_endp[ep_num].doepctl); - - writel((unsigned int) ep->dma_buf, ®->out_endp[ep_num].doepdma); - writel(DOEPT_SIZ_PKT_CNT(pktcnt) | DOEPT_SIZ_XFER_SIZE(length), - ®->out_endp[ep_num].doeptsiz); - writel(DEPCTL_EPENA|DEPCTL_CNAK|ctrl, ®->out_endp[ep_num].doepctl); - - debug_cond(DEBUG_OUT_EP != 0, - "%s: EP%d RX DMA start : DOEPDMA = 0x%x," - "DOEPTSIZ = 0x%x, DOEPCTL = 0x%x\n" - "\tbuf = 0x%p, pktcnt = %d, xfersize = %d\n", - __func__, ep_num, - readl(®->out_endp[ep_num].doepdma), - readl(®->out_endp[ep_num].doeptsiz), - readl(®->out_endp[ep_num].doepctl), - buf, pktcnt, length); - return 0; - -} - -static int setdma_tx(struct dwc2_ep *ep, struct dwc2_request *req) -{ - u32 *buf, ctrl = 0; - u32 length, pktcnt; - u32 ep_num = ep_index(ep); - - buf = req->req.buf + req->req.actual; - length = req->req.length - req->req.actual; - - if (ep_num == EP0_CON) - length = min(length, (u32)ep_maxpacket(ep)); - - ep->len = length; - ep->dma_buf = buf; - - flush_dcache_range((unsigned long) ep->dma_buf, - (unsigned long) ep->dma_buf + - ROUND(ep->len, CONFIG_SYS_CACHELINE_SIZE)); - - if (length == 0) - pktcnt = 1; - else - pktcnt = (length - 1)/(ep->ep.maxpacket) + 1; - - /* Flush the endpoint's Tx FIFO */ - writel(TX_FIFO_NUMBER(ep->fifo_num), ®->grstctl); - writel(TX_FIFO_NUMBER(ep->fifo_num) | TX_FIFO_FLUSH, ®->grstctl); - while (readl(®->grstctl) & TX_FIFO_FLUSH) - ; - - writel((unsigned long) ep->dma_buf, ®->in_endp[ep_num].diepdma); - writel(DIEPT_SIZ_PKT_CNT(pktcnt) | DIEPT_SIZ_XFER_SIZE(length), - ®->in_endp[ep_num].dieptsiz); - - ctrl = readl(®->in_endp[ep_num].diepctl); - - /* Write the FIFO number to be used for this endpoint */ - ctrl &= DIEPCTL_TX_FIFO_NUM_MASK; - ctrl |= DIEPCTL_TX_FIFO_NUM(ep->fifo_num); - - /* Clear reserved (Next EP) bits */ - ctrl = (ctrl&~(EP_MASK<in_endp[ep_num].diepctl); - - debug_cond(DEBUG_IN_EP, - "%s:EP%d TX DMA start : DIEPDMA0 = 0x%x," - "DIEPTSIZ0 = 0x%x, DIEPCTL0 = 0x%x\n" - "\tbuf = 0x%p, pktcnt = %d, xfersize = %d\n", - __func__, ep_num, - readl(®->in_endp[ep_num].diepdma), - readl(®->in_endp[ep_num].dieptsiz), - readl(®->in_endp[ep_num].diepctl), - buf, pktcnt, length); - - return length; -} - -static void complete_rx(struct dwc2_udc *dev, u8 ep_num) -{ - struct dwc2_ep *ep = &dev->ep[ep_num]; - struct dwc2_request *req = NULL; - u32 ep_tsr = 0, xfer_size = 0, is_short = 0; - - if (list_empty(&ep->queue)) { - debug_cond(DEBUG_OUT_EP != 0, - "%s: RX DMA done : NULL REQ on OUT EP-%d\n", - __func__, ep_num); - return; - - } - - req = list_entry(ep->queue.next, struct dwc2_request, queue); - ep_tsr = readl(®->out_endp[ep_num].doeptsiz); - - if (ep_num == EP0_CON) - xfer_size = (ep_tsr & DOEPT_SIZ_XFER_SIZE_MAX_EP0); - else - xfer_size = (ep_tsr & DOEPT_SIZ_XFER_SIZE_MAX_EP); - - xfer_size = ep->len - xfer_size; - - /* - * NOTE: - * - * Please be careful with proper buffer allocation for USB request, - * which needs to be aligned to CONFIG_SYS_CACHELINE_SIZE, not only - * with starting address, but also its size shall be a cache line - * multiplication. - * - * This will prevent from corruption of data allocated immediatelly - * before or after the buffer. - * - * For armv7, the cache_v7.c provides proper code to emit "ERROR" - * message to warn users. - */ - invalidate_dcache_range((unsigned long) ep->dma_buf, - (unsigned long) ep->dma_buf + - ROUND(xfer_size, CONFIG_SYS_CACHELINE_SIZE)); - - req->req.actual += min(xfer_size, req->req.length - req->req.actual); - is_short = (xfer_size < ep->ep.maxpacket); - - debug_cond(DEBUG_OUT_EP != 0, - "%s: RX DMA done : ep = %d, rx bytes = %d/%d, " - "is_short = %d, DOEPTSIZ = 0x%x, remained bytes = %d\n", - __func__, ep_num, req->req.actual, req->req.length, - is_short, ep_tsr, xfer_size); - - if (is_short || req->req.actual == req->req.length) { - if (ep_num == EP0_CON && dev->ep0state == DATA_STATE_RECV) { - debug_cond(DEBUG_OUT_EP != 0, " => Send ZLP\n"); - dwc2_udc_ep0_zlp(dev); - /* packet will be completed in complete_tx() */ - dev->ep0state = WAIT_FOR_IN_COMPLETE; - } else { - done(ep, req, 0); - - if (!list_empty(&ep->queue)) { - req = list_entry(ep->queue.next, - struct dwc2_request, queue); - debug_cond(DEBUG_OUT_EP != 0, - "%s: Next Rx request start...\n", - __func__); - setdma_rx(ep, req); - } - } - } else - setdma_rx(ep, req); -} - -static void complete_tx(struct dwc2_udc *dev, u8 ep_num) -{ - struct dwc2_ep *ep = &dev->ep[ep_num]; - struct dwc2_request *req; - u32 ep_tsr = 0, xfer_size = 0, is_short = 0; - u32 last; - - if (dev->ep0state == WAIT_FOR_NULL_COMPLETE) { - dev->ep0state = WAIT_FOR_OUT_COMPLETE; - dwc2_ep0_complete_out(); - return; - } - - if (list_empty(&ep->queue)) { - debug_cond(DEBUG_IN_EP, - "%s: TX DMA done : NULL REQ on IN EP-%d\n", - __func__, ep_num); - return; - - } - - req = list_entry(ep->queue.next, struct dwc2_request, queue); - - ep_tsr = readl(®->in_endp[ep_num].dieptsiz); - - xfer_size = ep->len; - is_short = (xfer_size < ep->ep.maxpacket); - req->req.actual += min(xfer_size, req->req.length - req->req.actual); - - debug_cond(DEBUG_IN_EP, - "%s: TX DMA done : ep = %d, tx bytes = %d/%d, " - "is_short = %d, DIEPTSIZ = 0x%x, remained bytes = %d\n", - __func__, ep_num, req->req.actual, req->req.length, - is_short, ep_tsr, xfer_size); - - if (ep_num == 0) { - if (dev->ep0state == DATA_STATE_XMIT) { - debug_cond(DEBUG_IN_EP, - "%s: ep_num = %d, ep0stat ==" - "DATA_STATE_XMIT\n", - __func__, ep_num); - last = write_fifo_ep0(ep, req); - if (last) - dev->ep0state = WAIT_FOR_COMPLETE; - } else if (dev->ep0state == WAIT_FOR_IN_COMPLETE) { - debug_cond(DEBUG_IN_EP, - "%s: ep_num = %d, completing request\n", - __func__, ep_num); - done(ep, req, 0); - dev->ep0state = WAIT_FOR_SETUP; - } else if (dev->ep0state == WAIT_FOR_COMPLETE) { - debug_cond(DEBUG_IN_EP, - "%s: ep_num = %d, completing request\n", - __func__, ep_num); - done(ep, req, 0); - dev->ep0state = WAIT_FOR_OUT_COMPLETE; - dwc2_ep0_complete_out(); - } else { - debug_cond(DEBUG_IN_EP, - "%s: ep_num = %d, invalid ep state\n", - __func__, ep_num); - } - return; - } - - if (req->req.actual == req->req.length) - done(ep, req, 0); - - if (!list_empty(&ep->queue)) { - req = list_entry(ep->queue.next, struct dwc2_request, queue); - debug_cond(DEBUG_IN_EP, - "%s: Next Tx request start...\n", __func__); - setdma_tx(ep, req); - } -} - -static inline void dwc2_udc_check_tx_queue(struct dwc2_udc *dev, u8 ep_num) -{ - struct dwc2_ep *ep = &dev->ep[ep_num]; - struct dwc2_request *req; - - debug_cond(DEBUG_IN_EP, - "%s: Check queue, ep_num = %d\n", __func__, ep_num); - - if (!list_empty(&ep->queue)) { - req = list_entry(ep->queue.next, struct dwc2_request, queue); - debug_cond(DEBUG_IN_EP, - "%s: Next Tx request(0x%p) start...\n", - __func__, req); - - if (ep_is_in(ep)) - setdma_tx(ep, req); - else - setdma_rx(ep, req); - } else { - debug_cond(DEBUG_IN_EP, - "%s: NULL REQ on IN EP-%d\n", __func__, ep_num); - - return; - } - -} - -static void process_ep_in_intr(struct dwc2_udc *dev) -{ - u32 ep_intr, ep_intr_status; - u8 ep_num = 0; - - ep_intr = readl(®->daint); - debug_cond(DEBUG_IN_EP, - "*** %s: EP In interrupt : DAINT = 0x%x\n", __func__, ep_intr); - - ep_intr &= DAINT_MASK; - - while (ep_intr) { - if (ep_intr & DAINT_IN_EP_INT(1)) { - ep_intr_status = readl(®->in_endp[ep_num].diepint); - debug_cond(DEBUG_IN_EP, - "\tEP%d-IN : DIEPINT = 0x%x\n", - ep_num, ep_intr_status); - - /* Interrupt Clear */ - writel(ep_intr_status, ®->in_endp[ep_num].diepint); - - if (ep_intr_status & TRANSFER_DONE) { - complete_tx(dev, ep_num); - - if (ep_num == 0) { - if (dev->ep0state == - WAIT_FOR_IN_COMPLETE) - dev->ep0state = WAIT_FOR_SETUP; - - if (dev->ep0state == WAIT_FOR_SETUP) - dwc2_udc_pre_setup(); - - /* continue transfer after - set_clear_halt for DMA mode */ - if (clear_feature_flag == 1) { - dwc2_udc_check_tx_queue(dev, - clear_feature_num); - clear_feature_flag = 0; - } - } - } - } - ep_num++; - ep_intr >>= 1; - } -} - -static void process_ep_out_intr(struct dwc2_udc *dev) -{ - u32 ep_intr, ep_intr_status; - u8 ep_num = 0; - - ep_intr = readl(®->daint); - debug_cond(DEBUG_OUT_EP != 0, - "*** %s: EP OUT interrupt : DAINT = 0x%x\n", - __func__, ep_intr); - - ep_intr = (ep_intr >> DAINT_OUT_BIT) & DAINT_MASK; - - while (ep_intr) { - if (ep_intr & 0x1) { - ep_intr_status = readl(®->out_endp[ep_num].doepint); - debug_cond(DEBUG_OUT_EP != 0, - "\tEP%d-OUT : DOEPINT = 0x%x\n", - ep_num, ep_intr_status); - - /* Interrupt Clear */ - writel(ep_intr_status, ®->out_endp[ep_num].doepint); - - if (ep_num == 0) { - if (ep_intr_status & TRANSFER_DONE) { - if (dev->ep0state != - WAIT_FOR_OUT_COMPLETE) - complete_rx(dev, ep_num); - else { - dev->ep0state = WAIT_FOR_SETUP; - dwc2_udc_pre_setup(); - } - } - - if (ep_intr_status & - CTRL_OUT_EP_SETUP_PHASE_DONE) { - debug_cond(DEBUG_OUT_EP != 0, - "SETUP packet arrived\n"); - dwc2_handle_ep0(dev); - } - } else { - if (ep_intr_status & TRANSFER_DONE) - complete_rx(dev, ep_num); - } - } - ep_num++; - ep_intr >>= 1; - } -} - -/* - * usb client interrupt handler. - */ -static int dwc2_udc_irq(int irq, void *_dev) -{ - struct dwc2_udc *dev = _dev; - u32 intr_status; - u32 usb_status, gintmsk; - unsigned long flags = 0; - - spin_lock_irqsave(&dev->lock, flags); - - intr_status = readl(®->gintsts); - gintmsk = readl(®->gintmsk); - - debug_cond(DEBUG_ISR, - "\n*** %s : GINTSTS=0x%x(on state %s), GINTMSK : 0x%x," - "DAINT : 0x%x, DAINTMSK : 0x%x\n", - __func__, intr_status, state_names[dev->ep0state], gintmsk, - readl(®->daint), readl(®->daintmsk)); - - if (!intr_status) { - spin_unlock_irqrestore(&dev->lock, flags); - return IRQ_HANDLED; - } - - if (intr_status & INT_ENUMDONE) { - debug_cond(DEBUG_ISR, "\tSpeed Detection interrupt\n"); - - writel(INT_ENUMDONE, ®->gintsts); - usb_status = (readl(®->dsts) & 0x6); - - if (usb_status & (USB_FULL_30_60MHZ | USB_FULL_48MHZ)) { - debug_cond(DEBUG_ISR, - "\t\tFull Speed Detection\n"); - set_max_pktsize(dev, USB_SPEED_FULL); - - } else { - debug_cond(DEBUG_ISR, - "\t\tHigh Speed Detection : 0x%x\n", - usb_status); - set_max_pktsize(dev, USB_SPEED_HIGH); - } - } - - if (intr_status & INT_EARLY_SUSPEND) { - debug_cond(DEBUG_ISR, "\tEarly suspend interrupt\n"); - writel(INT_EARLY_SUSPEND, ®->gintsts); - } - - if (intr_status & INT_SUSPEND) { - usb_status = readl(®->dsts); - debug_cond(DEBUG_ISR, - "\tSuspend interrupt :(DSTS):0x%x\n", usb_status); - writel(INT_SUSPEND, ®->gintsts); - - if (dev->gadget.speed != USB_SPEED_UNKNOWN - && dev->driver) { - if (dev->driver->suspend) - dev->driver->suspend(&dev->gadget); - - /* HACK to let gadget detect disconnected state */ - if (dev->driver->disconnect) { - spin_unlock_irqrestore(&dev->lock, flags); - dev->driver->disconnect(&dev->gadget); - spin_lock_irqsave(&dev->lock, flags); - } - } - } - - if (intr_status & INT_RESUME) { - debug_cond(DEBUG_ISR, "\tResume interrupt\n"); - writel(INT_RESUME, ®->gintsts); - - if (dev->gadget.speed != USB_SPEED_UNKNOWN - && dev->driver - && dev->driver->resume) { - - dev->driver->resume(&dev->gadget); - } - } - - if (intr_status & INT_RESET) { - usb_status = readl(®->gotgctl); - debug_cond(DEBUG_ISR, - "\tReset interrupt - (GOTGCTL):0x%x\n", usb_status); - writel(INT_RESET, ®->gintsts); - - if ((usb_status & 0xc0000) == (0x3 << 18)) { - if (reset_available) { - debug_cond(DEBUG_ISR, - "\t\tOTG core got reset (%d)!!\n", - reset_available); - reconfig_usbd(dev); - dev->ep0state = WAIT_FOR_SETUP; - reset_available = 0; - dwc2_udc_pre_setup(); - } else - reset_available = 1; - - } else { - reset_available = 1; - debug_cond(DEBUG_ISR, - "\t\tRESET handling skipped\n"); - } - } - - if (intr_status & INT_IN_EP) - process_ep_in_intr(dev); - - if (intr_status & INT_OUT_EP) - process_ep_out_intr(dev); - - spin_unlock_irqrestore(&dev->lock, flags); - - return IRQ_HANDLED; -} - -/** Queue one request - * Kickstart transfer if needed - */ -static int dwc2_queue(struct usb_ep *_ep, struct usb_request *_req, - gfp_t gfp_flags) -{ - struct dwc2_request *req; - struct dwc2_ep *ep; - struct dwc2_udc *dev; - unsigned long flags = 0; - u32 ep_num, gintsts; - - req = container_of(_req, struct dwc2_request, req); - if (unlikely(!_req || !_req->complete || !_req->buf - || !list_empty(&req->queue))) { - - debug("%s: bad params\n", __func__); - return -EINVAL; - } - - ep = container_of(_ep, struct dwc2_ep, ep); - - if (unlikely(!_ep || (!ep->desc && ep->ep.name != ep0name))) { - - debug("%s: bad ep: %s, %d, %p\n", __func__, - ep->ep.name, !ep->desc, _ep); - return -EINVAL; - } - - ep_num = ep_index(ep); - dev = ep->dev; - if (unlikely(!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN)) { - - debug("%s: bogus device state %p\n", __func__, dev->driver); - return -ESHUTDOWN; - } - - spin_lock_irqsave(&dev->lock, flags); - - _req->status = -EINPROGRESS; - _req->actual = 0; - - /* kickstart this i/o queue? */ - debug("\n*** %s: %s-%s req = %p, len = %d, buf = %p" - "Q empty = %d, stopped = %d\n", - __func__, _ep->name, ep_is_in(ep) ? "in" : "out", - _req, _req->length, _req->buf, - list_empty(&ep->queue), ep->stopped); - -#ifdef DEBUG - { - int i, len = _req->length; - - printf("pkt = "); - if (len > 64) - len = 64; - for (i = 0; i < len; i++) { - printf("%02x", ((u8 *)_req->buf)[i]); - if ((i & 7) == 7) - printf(" "); - } - printf("\n"); - } -#endif - - if (list_empty(&ep->queue) && !ep->stopped) { - - if (ep_num == 0) { - /* EP0 */ - list_add_tail(&req->queue, &ep->queue); - dwc2_ep0_kick(dev, ep); - req = 0; - - } else if (ep_is_in(ep)) { - gintsts = readl(®->gintsts); - debug_cond(DEBUG_IN_EP, - "%s: ep_is_in, S3C_UDC_OTG_GINTSTS=0x%x\n", - __func__, gintsts); - - setdma_tx(ep, req); - } else { - gintsts = readl(®->gintsts); - debug_cond(DEBUG_OUT_EP != 0, - "%s:ep_is_out, S3C_UDC_OTG_GINTSTS=0x%x\n", - __func__, gintsts); - - setdma_rx(ep, req); - } - } - - /* pio or dma irq handler advances the queue. */ - if (likely(req != 0)) - list_add_tail(&req->queue, &ep->queue); - - spin_unlock_irqrestore(&dev->lock, flags); - - return 0; -} - -/****************************************************************/ -/* End Point 0 related functions */ -/****************************************************************/ - -/* return: 0 = still running, 1 = completed, negative = errno */ -static int write_fifo_ep0(struct dwc2_ep *ep, struct dwc2_request *req) -{ - u32 max; - unsigned count; - int is_last; - - max = ep_maxpacket(ep); - - debug_cond(DEBUG_EP0 != 0, "%s: max = %d\n", __func__, max); - - count = setdma_tx(ep, req); - - /* last packet is usually short (or a zlp) */ - if (likely(count != max)) - is_last = 1; - else { - if (likely(req->req.length != req->req.actual + count) - || req->req.zero) - is_last = 0; - else - is_last = 1; - } - - debug_cond(DEBUG_EP0 != 0, - "%s: wrote %s %d bytes%s %d left %p\n", __func__, - ep->ep.name, count, - is_last ? "/L" : "", - req->req.length - req->req.actual - count, req); - - /* requests complete when all IN data is in the FIFO */ - if (is_last) { - ep->dev->ep0state = WAIT_FOR_SETUP; - return 1; - } - - return 0; -} - -static int dwc2_fifo_read(struct dwc2_ep *ep, u32 *cp, int max) -{ - invalidate_dcache_range((unsigned long)cp, (unsigned long)cp + - ROUND(max, CONFIG_SYS_CACHELINE_SIZE)); - - debug_cond(DEBUG_EP0 != 0, - "%s: bytes=%d, ep_index=%d 0x%p\n", __func__, - max, ep_index(ep), cp); - - return max; -} - -/** - * udc_set_address - set the USB address for this device - * @address: - * - * Called from control endpoint function - * after it decodes a set address setup packet. - */ -static void udc_set_address(struct dwc2_udc *dev, unsigned char address) -{ - u32 ctrl = readl(®->dcfg); - writel(DEVICE_ADDRESS(address) | ctrl, ®->dcfg); - - dwc2_udc_ep0_zlp(dev); - - debug_cond(DEBUG_EP0 != 0, - "%s: USB OTG 2.0 Device address=%d, DCFG=0x%x\n", - __func__, address, readl(®->dcfg)); - - dev->usb_address = address; -} - -static inline void dwc2_udc_ep0_set_stall(struct dwc2_ep *ep) -{ - struct dwc2_udc *dev; - u32 ep_ctrl = 0; - - dev = ep->dev; - ep_ctrl = readl(®->in_endp[EP0_CON].diepctl); - - /* set the disable and stall bits */ - if (ep_ctrl & DEPCTL_EPENA) - ep_ctrl |= DEPCTL_EPDIS; - - ep_ctrl |= DEPCTL_STALL; - - writel(ep_ctrl, ®->in_endp[EP0_CON].diepctl); - - debug_cond(DEBUG_EP0 != 0, - "%s: set ep%d stall, DIEPCTL0 = 0x%p\n", - __func__, ep_index(ep), ®->in_endp[EP0_CON].diepctl); - /* - * The application can only set this bit, and the core clears it, - * when a SETUP token is received for this endpoint - */ - dev->ep0state = WAIT_FOR_SETUP; - - dwc2_udc_pre_setup(); -} - -static void dwc2_ep0_read(struct dwc2_udc *dev) -{ - struct dwc2_request *req; - struct dwc2_ep *ep = &dev->ep[0]; - - if (!list_empty(&ep->queue)) { - req = list_entry(ep->queue.next, struct dwc2_request, queue); - - } else { - debug("%s: ---> BUG\n", __func__); - BUG(); - return; - } - - debug_cond(DEBUG_EP0 != 0, - "%s: req = %p, req.length = 0x%x, req.actual = 0x%x\n", - __func__, req, req->req.length, req->req.actual); - - if (req->req.length == 0) { - /* zlp for Set_configuration, Set_interface, - * or Bulk-Only mass storge reset */ - - ep->len = 0; - dwc2_udc_ep0_zlp(dev); - - debug_cond(DEBUG_EP0 != 0, - "%s: req.length = 0, bRequest = %d\n", - __func__, usb_ctrl->bRequest); - return; - } - - setdma_rx(ep, req); -} - -/* - * DATA_STATE_XMIT - */ -static int dwc2_ep0_write(struct dwc2_udc *dev) -{ - struct dwc2_request *req; - struct dwc2_ep *ep = &dev->ep[0]; - int ret, need_zlp = 0; - - if (list_empty(&ep->queue)) - req = 0; - else - req = list_entry(ep->queue.next, struct dwc2_request, queue); - - if (!req) { - debug_cond(DEBUG_EP0 != 0, "%s: NULL REQ\n", __func__); - return 0; - } - - debug_cond(DEBUG_EP0 != 0, - "%s: req = %p, req.length = 0x%x, req.actual = 0x%x\n", - __func__, req, req->req.length, req->req.actual); - - if (req->req.length - req->req.actual == ep0_fifo_size) { - /* Next write will end with the packet size, */ - /* so we need Zero-length-packet */ - need_zlp = 1; - } - - ret = write_fifo_ep0(ep, req); - - if ((ret == 1) && !need_zlp) { - /* Last packet */ - dev->ep0state = WAIT_FOR_COMPLETE; - debug_cond(DEBUG_EP0 != 0, - "%s: finished, waiting for status\n", __func__); - - } else { - dev->ep0state = DATA_STATE_XMIT; - debug_cond(DEBUG_EP0 != 0, - "%s: not finished\n", __func__); - } - - return 1; -} - -static int dwc2_udc_get_status(struct dwc2_udc *dev, - struct usb_ctrlrequest *crq) -{ - u8 ep_num = crq->wIndex & 0x7F; - u16 g_status = 0; - u32 ep_ctrl; - - debug_cond(DEBUG_SETUP != 0, - "%s: *** USB_REQ_GET_STATUS\n", __func__); - printf("crq->brequest:0x%x\n", crq->bRequestType & USB_RECIP_MASK); - switch (crq->bRequestType & USB_RECIP_MASK) { - case USB_RECIP_INTERFACE: - g_status = 0; - debug_cond(DEBUG_SETUP != 0, - "\tGET_STATUS:USB_RECIP_INTERFACE, g_stauts = %d\n", - g_status); - break; - - case USB_RECIP_DEVICE: - g_status = 0x1; /* Self powered */ - debug_cond(DEBUG_SETUP != 0, - "\tGET_STATUS: USB_RECIP_DEVICE, g_stauts = %d\n", - g_status); - break; - - case USB_RECIP_ENDPOINT: - if (crq->wLength > 2) { - debug_cond(DEBUG_SETUP != 0, - "\tGET_STATUS:Not support EP or wLength\n"); - return 1; - } - - g_status = dev->ep[ep_num].stopped; - debug_cond(DEBUG_SETUP != 0, - "\tGET_STATUS: USB_RECIP_ENDPOINT, g_stauts = %d\n", - g_status); - - break; - - default: - return 1; - } - - memcpy(usb_ctrl, &g_status, sizeof(g_status)); - - flush_dcache_range((unsigned long) usb_ctrl, - (unsigned long) usb_ctrl + - ROUND(sizeof(g_status), CONFIG_SYS_CACHELINE_SIZE)); - - writel(usb_ctrl_dma_addr, ®->in_endp[EP0_CON].diepdma); - writel(DIEPT_SIZ_PKT_CNT(1) | DIEPT_SIZ_XFER_SIZE(2), - ®->in_endp[EP0_CON].dieptsiz); - - ep_ctrl = readl(®->in_endp[EP0_CON].diepctl); - writel(ep_ctrl|DEPCTL_EPENA|DEPCTL_CNAK, - ®->in_endp[EP0_CON].diepctl); - dev->ep0state = WAIT_FOR_NULL_COMPLETE; - - return 0; -} - -static void dwc2_udc_set_nak(struct dwc2_ep *ep) -{ - u8 ep_num; - u32 ep_ctrl = 0; - - ep_num = ep_index(ep); - debug("%s: ep_num = %d, ep_type = %d\n", __func__, ep_num, ep->ep_type); - - if (ep_is_in(ep)) { - ep_ctrl = readl(®->in_endp[ep_num].diepctl); - ep_ctrl |= DEPCTL_SNAK; - writel(ep_ctrl, ®->in_endp[ep_num].diepctl); - debug("%s: set NAK, DIEPCTL%d = 0x%x\n", - __func__, ep_num, readl(®->in_endp[ep_num].diepctl)); - } else { - ep_ctrl = readl(®->out_endp[ep_num].doepctl); - ep_ctrl |= DEPCTL_SNAK; - writel(ep_ctrl, ®->out_endp[ep_num].doepctl); - debug("%s: set NAK, DOEPCTL%d = 0x%x\n", - __func__, ep_num, readl(®->out_endp[ep_num].doepctl)); - } - - return; -} - - -static void dwc2_udc_ep_set_stall(struct dwc2_ep *ep) -{ - u8 ep_num; - u32 ep_ctrl = 0; - - ep_num = ep_index(ep); - debug("%s: ep_num = %d, ep_type = %d\n", __func__, ep_num, ep->ep_type); - - if (ep_is_in(ep)) { - ep_ctrl = readl(®->in_endp[ep_num].diepctl); - - /* set the disable and stall bits */ - if (ep_ctrl & DEPCTL_EPENA) - ep_ctrl |= DEPCTL_EPDIS; - - ep_ctrl |= DEPCTL_STALL; - - writel(ep_ctrl, ®->in_endp[ep_num].diepctl); - debug("%s: set stall, DIEPCTL%d = 0x%x\n", - __func__, ep_num, readl(®->in_endp[ep_num].diepctl)); - - } else { - ep_ctrl = readl(®->out_endp[ep_num].doepctl); - - /* set the stall bit */ - ep_ctrl |= DEPCTL_STALL; - - writel(ep_ctrl, ®->out_endp[ep_num].doepctl); - debug("%s: set stall, DOEPCTL%d = 0x%x\n", - __func__, ep_num, readl(®->out_endp[ep_num].doepctl)); - } - - return; -} - -static void dwc2_udc_ep_clear_stall(struct dwc2_ep *ep) -{ - u8 ep_num; - u32 ep_ctrl = 0; - - ep_num = ep_index(ep); - debug("%s: ep_num = %d, ep_type = %d\n", __func__, ep_num, ep->ep_type); - - if (ep_is_in(ep)) { - ep_ctrl = readl(®->in_endp[ep_num].diepctl); - - /* clear stall bit */ - ep_ctrl &= ~DEPCTL_STALL; - - /* - * USB Spec 9.4.5: For endpoints using data toggle, regardless - * of whether an endpoint has the Halt feature set, a - * ClearFeature(ENDPOINT_HALT) request always results in the - * data toggle being reinitialized to DATA0. - */ - if (ep->bmAttributes == USB_ENDPOINT_XFER_INT - || ep->bmAttributes == USB_ENDPOINT_XFER_BULK) { - ep_ctrl |= DEPCTL_SETD0PID; /* DATA0 */ - } - - writel(ep_ctrl, ®->in_endp[ep_num].diepctl); - debug("%s: cleared stall, DIEPCTL%d = 0x%x\n", - __func__, ep_num, readl(®->in_endp[ep_num].diepctl)); - - } else { - ep_ctrl = readl(®->out_endp[ep_num].doepctl); - - /* clear stall bit */ - ep_ctrl &= ~DEPCTL_STALL; - - if (ep->bmAttributes == USB_ENDPOINT_XFER_INT - || ep->bmAttributes == USB_ENDPOINT_XFER_BULK) { - ep_ctrl |= DEPCTL_SETD0PID; /* DATA0 */ - } - - writel(ep_ctrl, ®->out_endp[ep_num].doepctl); - debug("%s: cleared stall, DOEPCTL%d = 0x%x\n", - __func__, ep_num, readl(®->out_endp[ep_num].doepctl)); - } - - return; -} - -static int dwc2_udc_set_halt(struct usb_ep *_ep, int value) -{ - struct dwc2_ep *ep; - struct dwc2_udc *dev; - unsigned long flags = 0; - u8 ep_num; - - ep = container_of(_ep, struct dwc2_ep, ep); - ep_num = ep_index(ep); - - if (unlikely(!_ep || !ep->desc || ep_num == EP0_CON || - ep->desc->bmAttributes == USB_ENDPOINT_XFER_ISOC)) { - debug("%s: %s bad ep or descriptor\n", __func__, ep->ep.name); - return -EINVAL; - } - - /* Attempt to halt IN ep will fail if any transfer requests - * are still queue */ - if (value && ep_is_in(ep) && !list_empty(&ep->queue)) { - debug("%s: %s queue not empty, req = %p\n", - __func__, ep->ep.name, - list_entry(ep->queue.next, struct dwc2_request, queue)); - - return -EAGAIN; - } - - dev = ep->dev; - debug("%s: ep_num = %d, value = %d\n", __func__, ep_num, value); - - spin_lock_irqsave(&dev->lock, flags); - - if (value == 0) { - ep->stopped = 0; - dwc2_udc_ep_clear_stall(ep); - } else { - if (ep_num == 0) - dev->ep0state = WAIT_FOR_SETUP; - - ep->stopped = 1; - dwc2_udc_ep_set_stall(ep); - } - - spin_unlock_irqrestore(&dev->lock, flags); - - return 0; -} - -static void dwc2_udc_ep_activate(struct dwc2_ep *ep) -{ - u8 ep_num; - u32 ep_ctrl = 0, daintmsk = 0; - - ep_num = ep_index(ep); - - /* Read DEPCTLn register */ - if (ep_is_in(ep)) { - ep_ctrl = readl(®->in_endp[ep_num].diepctl); - daintmsk = 1 << ep_num; - } else { - ep_ctrl = readl(®->out_endp[ep_num].doepctl); - daintmsk = (1 << ep_num) << DAINT_OUT_BIT; - } - - debug("%s: EPCTRL%d = 0x%x, ep_is_in = %d\n", - __func__, ep_num, ep_ctrl, ep_is_in(ep)); - - /* If the EP is already active don't change the EP Control - * register. */ - if (!(ep_ctrl & DEPCTL_USBACTEP)) { - ep_ctrl = (ep_ctrl & ~DEPCTL_TYPE_MASK) | - (ep->bmAttributes << DEPCTL_TYPE_BIT); - ep_ctrl = (ep_ctrl & ~DEPCTL_MPS_MASK) | - (ep->ep.maxpacket << DEPCTL_MPS_BIT); - ep_ctrl |= (DEPCTL_SETD0PID | DEPCTL_USBACTEP | DEPCTL_SNAK); - - if (ep_is_in(ep)) { - writel(ep_ctrl, ®->in_endp[ep_num].diepctl); - debug("%s: USB Ative EP%d, DIEPCTRL%d = 0x%x\n", - __func__, ep_num, ep_num, - readl(®->in_endp[ep_num].diepctl)); - } else { - writel(ep_ctrl, ®->out_endp[ep_num].doepctl); - debug("%s: USB Ative EP%d, DOEPCTRL%d = 0x%x\n", - __func__, ep_num, ep_num, - readl(®->out_endp[ep_num].doepctl)); - } - } - - /* Unmask EP Interrtupt */ - writel(readl(®->daintmsk)|daintmsk, ®->daintmsk); - debug("%s: DAINTMSK = 0x%x\n", __func__, readl(®->daintmsk)); - -} - -static int dwc2_udc_clear_feature(struct usb_ep *_ep) -{ - struct dwc2_udc *dev; - struct dwc2_ep *ep; - u8 ep_num; - - ep = container_of(_ep, struct dwc2_ep, ep); - ep_num = ep_index(ep); - - dev = ep->dev; - debug_cond(DEBUG_SETUP != 0, - "%s: ep_num = %d, is_in = %d, clear_feature_flag = %d\n", - __func__, ep_num, ep_is_in(ep), clear_feature_flag); - - if (usb_ctrl->wLength != 0) { - debug_cond(DEBUG_SETUP != 0, - "\tCLEAR_FEATURE: wLength is not zero.....\n"); - return 1; - } - - switch (usb_ctrl->bRequestType & USB_RECIP_MASK) { - case USB_RECIP_DEVICE: - switch (usb_ctrl->wValue) { - case USB_DEVICE_REMOTE_WAKEUP: - debug_cond(DEBUG_SETUP != 0, - "\tOFF:USB_DEVICE_REMOTE_WAKEUP\n"); - break; - - case USB_DEVICE_TEST_MODE: - debug_cond(DEBUG_SETUP != 0, - "\tCLEAR_FEATURE: USB_DEVICE_TEST_MODE\n"); - /** @todo Add CLEAR_FEATURE for TEST modes. */ - break; - } - - dwc2_udc_ep0_zlp(dev); - break; - - case USB_RECIP_ENDPOINT: - debug_cond(DEBUG_SETUP != 0, - "\tCLEAR_FEATURE:USB_RECIP_ENDPOINT, wValue = %d\n", - usb_ctrl->wValue); - - if (usb_ctrl->wValue == USB_ENDPOINT_HALT) { - if (ep_num == 0) { - dwc2_udc_ep0_set_stall(ep); - return 0; - } - - dwc2_udc_ep0_zlp(dev); - - dwc2_udc_ep_clear_stall(ep); - dwc2_udc_ep_activate(ep); - ep->stopped = 0; - - clear_feature_num = ep_num; - clear_feature_flag = 1; - } - break; - } - - return 0; -} - -static int dwc2_udc_set_feature(struct usb_ep *_ep) -{ - struct dwc2_udc *dev; - struct dwc2_ep *ep; - u8 ep_num; - - ep = container_of(_ep, struct dwc2_ep, ep); - ep_num = ep_index(ep); - dev = ep->dev; - - debug_cond(DEBUG_SETUP != 0, - "%s: *** USB_REQ_SET_FEATURE , ep_num = %d\n", - __func__, ep_num); - - if (usb_ctrl->wLength != 0) { - debug_cond(DEBUG_SETUP != 0, - "\tSET_FEATURE: wLength is not zero.....\n"); - return 1; - } - - switch (usb_ctrl->bRequestType & USB_RECIP_MASK) { - case USB_RECIP_DEVICE: - switch (usb_ctrl->wValue) { - case USB_DEVICE_REMOTE_WAKEUP: - debug_cond(DEBUG_SETUP != 0, - "\tSET_FEATURE:USB_DEVICE_REMOTE_WAKEUP\n"); - break; - case USB_DEVICE_B_HNP_ENABLE: - debug_cond(DEBUG_SETUP != 0, - "\tSET_FEATURE: USB_DEVICE_B_HNP_ENABLE\n"); - break; - - case USB_DEVICE_A_HNP_SUPPORT: - /* RH port supports HNP */ - debug_cond(DEBUG_SETUP != 0, - "\tSET_FEATURE:USB_DEVICE_A_HNP_SUPPORT\n"); - break; - - case USB_DEVICE_A_ALT_HNP_SUPPORT: - /* other RH port does */ - debug_cond(DEBUG_SETUP != 0, - "\tSET: USB_DEVICE_A_ALT_HNP_SUPPORT\n"); - break; - } - - dwc2_udc_ep0_zlp(dev); - return 0; - - case USB_RECIP_INTERFACE: - debug_cond(DEBUG_SETUP != 0, - "\tSET_FEATURE: USB_RECIP_INTERFACE\n"); - break; - - case USB_RECIP_ENDPOINT: - debug_cond(DEBUG_SETUP != 0, - "\tSET_FEATURE: USB_RECIP_ENDPOINT\n"); - if (usb_ctrl->wValue == USB_ENDPOINT_HALT) { - if (ep_num == 0) { - dwc2_udc_ep0_set_stall(ep); - return 0; - } - ep->stopped = 1; - dwc2_udc_ep_set_stall(ep); - } - - dwc2_udc_ep0_zlp(dev); - return 0; - } - - return 1; -} - -/* - * WAIT_FOR_SETUP (OUT_PKT_RDY) - */ -static void dwc2_ep0_setup(struct dwc2_udc *dev) -{ - struct dwc2_ep *ep = &dev->ep[0]; - int i; - u8 ep_num; - - /* Nuke all previous transfers */ - nuke(ep, -EPROTO); - - /* read control req from fifo (8 bytes) */ - dwc2_fifo_read(ep, (u32 *)usb_ctrl, 8); - - debug_cond(DEBUG_SETUP != 0, - "%s: bRequestType = 0x%x(%s), bRequest = 0x%x" - "\twLength = 0x%x, wValue = 0x%x, wIndex= 0x%x\n", - __func__, usb_ctrl->bRequestType, - (usb_ctrl->bRequestType & USB_DIR_IN) ? "IN" : "OUT", - usb_ctrl->bRequest, - usb_ctrl->wLength, usb_ctrl->wValue, usb_ctrl->wIndex); - -#ifdef DEBUG - { - int i, len = sizeof(*usb_ctrl); - char *p = (char *)usb_ctrl; - - printf("pkt = "); - for (i = 0; i < len; i++) { - printf("%02x", ((u8 *)p)[i]); - if ((i & 7) == 7) - printf(" "); - } - printf("\n"); - } -#endif - - if (usb_ctrl->bRequest == GET_MAX_LUN_REQUEST && - usb_ctrl->wLength != 1) { - debug_cond(DEBUG_SETUP != 0, - "\t%s:GET_MAX_LUN_REQUEST:invalid", - __func__); - debug_cond(DEBUG_SETUP != 0, - "wLength = %d, setup returned\n", - usb_ctrl->wLength); - - dwc2_udc_ep0_set_stall(ep); - dev->ep0state = WAIT_FOR_SETUP; - - return; - } else if (usb_ctrl->bRequest == BOT_RESET_REQUEST && - usb_ctrl->wLength != 0) { - /* Bulk-Only *mass storge reset of class-specific request */ - debug_cond(DEBUG_SETUP != 0, - "%s:BOT Rest:invalid wLength =%d, setup returned\n", - __func__, usb_ctrl->wLength); - - dwc2_udc_ep0_set_stall(ep); - dev->ep0state = WAIT_FOR_SETUP; - - return; - } - - /* Set direction of EP0 */ - if (likely(usb_ctrl->bRequestType & USB_DIR_IN)) { - ep->bEndpointAddress |= USB_DIR_IN; - } else { - ep->bEndpointAddress &= ~USB_DIR_IN; - } - /* cope with automagic for some standard requests. */ - dev->req_std = (usb_ctrl->bRequestType & USB_TYPE_MASK) - == USB_TYPE_STANDARD; - - dev->req_pending = 1; - - /* Handle some SETUP packets ourselves */ - if (dev->req_std) { - switch (usb_ctrl->bRequest) { - case USB_REQ_SET_ADDRESS: - debug_cond(DEBUG_SETUP != 0, - "%s: *** USB_REQ_SET_ADDRESS (%d)\n", - __func__, usb_ctrl->wValue); - if (usb_ctrl->bRequestType - != (USB_TYPE_STANDARD | USB_RECIP_DEVICE)) - break; - - udc_set_address(dev, usb_ctrl->wValue); - return; - - case USB_REQ_SET_CONFIGURATION: - debug_cond(DEBUG_SETUP != 0, - "=====================================\n"); - debug_cond(DEBUG_SETUP != 0, - "%s: USB_REQ_SET_CONFIGURATION (%d)\n", - __func__, usb_ctrl->wValue); - - if (usb_ctrl->bRequestType == USB_RECIP_DEVICE) - reset_available = 1; - - break; - - case USB_REQ_GET_DESCRIPTOR: - debug_cond(DEBUG_SETUP != 0, - "%s: *** USB_REQ_GET_DESCRIPTOR\n", - __func__); - break; - - case USB_REQ_SET_INTERFACE: - debug_cond(DEBUG_SETUP != 0, - "%s: *** USB_REQ_SET_INTERFACE (%d)\n", - __func__, usb_ctrl->wValue); - - if (usb_ctrl->bRequestType == USB_RECIP_INTERFACE) - reset_available = 1; - - break; - - case USB_REQ_GET_CONFIGURATION: - debug_cond(DEBUG_SETUP != 0, - "%s: *** USB_REQ_GET_CONFIGURATION\n", - __func__); - break; - - case USB_REQ_GET_STATUS: - if (!dwc2_udc_get_status(dev, usb_ctrl)) - return; - - break; - - case USB_REQ_CLEAR_FEATURE: - ep_num = usb_ctrl->wIndex & 0x7f; - - if (!dwc2_udc_clear_feature(&dev->ep[ep_num].ep)) - return; - - break; - - case USB_REQ_SET_FEATURE: - ep_num = usb_ctrl->wIndex & 0x7f; - - if (!dwc2_udc_set_feature(&dev->ep[ep_num].ep)) - return; - - break; - - default: - debug_cond(DEBUG_SETUP != 0, - "%s: *** Default of usb_ctrl->bRequest=0x%x" - "happened.\n", __func__, usb_ctrl->bRequest); - break; - } - } - - - if (likely(dev->driver)) { - /* device-2-host (IN) or no data setup command, - * process immediately */ - debug_cond(DEBUG_SETUP != 0, - "%s:usb_ctrlreq will be passed to fsg_setup()\n", - __func__); - - spin_unlock(&dev->lock); - i = dev->driver->setup(&dev->gadget, usb_ctrl); - spin_lock(&dev->lock); - - if (i < 0) { - /* setup processing failed, force stall */ - dwc2_udc_ep0_set_stall(ep); - dev->ep0state = WAIT_FOR_SETUP; - - debug_cond(DEBUG_SETUP != 0, - "\tdev->driver->setup failed (%d)," - " bRequest = %d\n", - i, usb_ctrl->bRequest); - - - } else if (dev->req_pending) { - dev->req_pending = 0; - debug_cond(DEBUG_SETUP != 0, - "\tdev->req_pending...\n"); - } - - debug_cond(DEBUG_SETUP != 0, - "\tep0state = %s\n", state_names[dev->ep0state]); - - } -} - -/* - * handle ep0 interrupt - */ -static void dwc2_handle_ep0(struct dwc2_udc *dev) -{ - if (dev->ep0state == WAIT_FOR_SETUP) { - debug_cond(DEBUG_OUT_EP != 0, - "%s: WAIT_FOR_SETUP\n", __func__); - dwc2_ep0_setup(dev); - - } else { - debug_cond(DEBUG_OUT_EP != 0, - "%s: strange state!!(state = %s)\n", - __func__, state_names[dev->ep0state]); - } -} - -static void dwc2_ep0_kick(struct dwc2_udc *dev, struct dwc2_ep *ep) -{ - debug_cond(DEBUG_EP0 != 0, - "%s: ep_is_in = %d\n", __func__, ep_is_in(ep)); - if (ep_is_in(ep)) { - dev->ep0state = DATA_STATE_XMIT; - dwc2_ep0_write(dev); - - } else { - dev->ep0state = DATA_STATE_RECV; - dwc2_ep0_read(dev); - } -} -- cgit v1.1 From 507e677bc4f25b15d81d599c3d8b669ab9846493 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Fri, 4 Dec 2015 02:44:33 +0100 Subject: usb: s3c-otg: Rename remaining macros The driver is actually for the Designware DWC2 controller. This patch renames the remaining S3C_* macros to match the DWC2 naming. Signed-off-by: Marek Vasut --- drivers/usb/gadget/dwc2_udc_otg.c | 14 +++++++------- drivers/usb/gadget/dwc2_udc_otg_priv.h | 6 +++--- drivers/usb/gadget/dwc2_udc_otg_regs.h | 20 ++++++++++---------- drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c | 4 ++-- 4 files changed, 22 insertions(+), 22 deletions(-) diff --git a/drivers/usb/gadget/dwc2_udc_otg.c b/drivers/usb/gadget/dwc2_udc_otg.c index 40a7125..93514a9 100644 --- a/drivers/usb/gadget/dwc2_udc_otg.c +++ b/drivers/usb/gadget/dwc2_udc_otg.c @@ -190,7 +190,7 @@ static void udc_reinit(struct dwc2_udc *dev) dev->ep0state = WAIT_FOR_SETUP; /* basic endpoint records init */ - for (i = 0; i < S3C_MAX_ENDPOINTS; i++) { + for (i = 0; i < DWC2_MAX_ENDPOINTS; i++) { struct dwc2_ep *ep = &dev->ep[i]; if (i != 0) @@ -380,7 +380,7 @@ static void stop_activity(struct dwc2_udc *dev, dev->gadget.speed = USB_SPEED_UNKNOWN; /* prevent new request submissions, kill any outstanding requests */ - for (i = 0; i < S3C_MAX_ENDPOINTS; i++) { + for (i = 0; i < DWC2_MAX_ENDPOINTS; i++) { struct dwc2_ep *ep = &dev->ep[i]; ep->stopped = 1; nuke(ep, -ESHUTDOWN); @@ -448,7 +448,7 @@ static void reconfig_usbd(struct dwc2_udc *dev) writel(DEPCTL_EPDIS|DEPCTL_SNAK, ®->out_endp[EP0_CON].doepctl); writel(DEPCTL_EPDIS|DEPCTL_SNAK, ®->in_endp[EP0_CON].diepctl); - for (i = 1; i < S3C_MAX_ENDPOINTS; i++) { + for (i = 1; i < DWC2_MAX_ENDPOINTS; i++) { writel(DEPCTL_EPDIS|DEPCTL_SNAK, ®->out_endp[i].doepctl); writel(DEPCTL_EPDIS|DEPCTL_SNAK, ®->in_endp[i].diepctl); } @@ -470,7 +470,7 @@ static void reconfig_usbd(struct dwc2_udc *dev) writel((NPTX_FIFO_SIZE >> 2) << 16 | ((RX_FIFO_SIZE >> 2)) << 0, ®->gnptxfsiz); - for (i = 1; i < S3C_MAX_HW_ENDPOINTS; i++) + for (i = 1; i < DWC2_MAX_HW_ENDPOINTS; i++) writel((PTX_FIFO_SIZE >> 2) << 16 | ((RX_FIFO_SIZE + NPTX_FIFO_SIZE + PTX_FIFO_SIZE*(i-1)) >> 2) << 0, @@ -479,13 +479,13 @@ static void reconfig_usbd(struct dwc2_udc *dev) /* Flush the RX FIFO */ writel(RX_FIFO_FLUSH, ®->grstctl); while (readl(®->grstctl) & RX_FIFO_FLUSH) - debug("%s: waiting for S3C_UDC_OTG_GRSTCTL\n", __func__); + debug("%s: waiting for DWC2_UDC_OTG_GRSTCTL\n", __func__); /* Flush all the Tx FIFO's */ writel(TX_FIFO_FLUSH_ALL, ®->grstctl); writel(TX_FIFO_FLUSH_ALL | TX_FIFO_FLUSH, ®->grstctl); while (readl(®->grstctl) & TX_FIFO_FLUSH) - debug("%s: waiting for S3C_UDC_OTG_GRSTCTL\n", __func__); + debug("%s: waiting for DWC2_UDC_OTG_GRSTCTL\n", __func__); /* 13. Clear NAK bit of EP0, EP1, EP2*/ /* For Slave mode*/ @@ -515,7 +515,7 @@ static void set_max_pktsize(struct dwc2_udc *dev, enum usb_device_speed speed) } dev->ep[0].ep.maxpacket = ep0_fifo_size; - for (i = 1; i < S3C_MAX_ENDPOINTS; i++) + for (i = 1; i < DWC2_MAX_ENDPOINTS; i++) dev->ep[i].ep.maxpacket = ep_fifo_size; /* EP0 - Control IN (64 bytes)*/ diff --git a/drivers/usb/gadget/dwc2_udc_otg_priv.h b/drivers/usb/gadget/dwc2_udc_otg_priv.h index 1dcb277..5126a9d 100644 --- a/drivers/usb/gadget/dwc2_udc_otg_priv.h +++ b/drivers/usb/gadget/dwc2_udc_otg_priv.h @@ -24,8 +24,8 @@ #define EP_FIFO_SIZE 512 #define EP_FIFO_SIZE2 1024 /* ep0-control, ep1in-bulk, ep2out-bulk, ep3in-int */ -#define S3C_MAX_ENDPOINTS 4 -#define S3C_MAX_HW_ENDPOINTS 16 +#define DWC2_MAX_ENDPOINTS 4 +#define DWC2_MAX_HW_ENDPOINTS 16 #define WAIT_FOR_SETUP 0 #define DATA_STATE_XMIT 1 @@ -81,7 +81,7 @@ struct dwc2_udc { struct s3c_plat_otg_data *pdata; int ep0state; - struct dwc2_ep ep[S3C_MAX_ENDPOINTS]; + struct dwc2_ep ep[DWC2_MAX_ENDPOINTS]; unsigned char usb_address; diff --git a/drivers/usb/gadget/dwc2_udc_otg_regs.h b/drivers/usb/gadget/dwc2_udc_otg_regs.h index 57affcb..78ec90e 100644 --- a/drivers/usb/gadget/dwc2_udc_otg_regs.h +++ b/drivers/usb/gadget/dwc2_udc_otg_regs.h @@ -83,11 +83,11 @@ struct dwc2_usbotg_reg { /*===================================================================== */ /*definitions related to CSR setting */ -/* S3C_UDC_OTG_GOTGCTL */ +/* DWC2_UDC_OTG_GOTGCTL */ #define B_SESSION_VALID (0x1<<19) #define A_SESSION_VALID (0x1<<18) -/* S3C_UDC_OTG_GAHBCFG */ +/* DWC2_UDC_OTG_GAHBCFG */ #define PTXFE_HALF (0<<8) #define PTXFE_ZERO (1<<8) #define NPTXFE_HALF (0<<7) @@ -102,11 +102,11 @@ struct dwc2_usbotg_reg { #define GBL_INT_UNMASK (1<<0) #define GBL_INT_MASK (0<<0) -/* S3C_UDC_OTG_GRSTCTL */ +/* DWC2_UDC_OTG_GRSTCTL */ #define AHB_MASTER_IDLE (1u<<31) #define CORE_SOFT_RESET (0x1<<0) -/* S3C_UDC_OTG_GINTSTS/S3C_UDC_OTG_GINTMSK core interrupt register */ +/* DWC2_UDC_OTG_GINTSTS/DWC2_UDC_OTG_GINTMSK core interrupt register */ #define INT_RESUME (1u<<31) #define INT_DISCONN (0x1<<29) #define INT_CONN_ID_STS_CNG (0x1<<28) @@ -146,22 +146,22 @@ struct dwc2_usbotg_reg { #define USB_LOW_6MHZ (0x2<<1) #define USB_FULL_48MHZ (0x3<<1) -/* S3C_UDC_OTG_GRXSTSP STATUS */ +/* DWC2_UDC_OTG_GRXSTSP STATUS */ #define OUT_PKT_RECEIVED (0x2<<17) #define OUT_TRANSFER_COMPLELTED (0x3<<17) #define SETUP_TRANSACTION_COMPLETED (0x4<<17) #define SETUP_PKT_RECEIVED (0x6<<17) #define GLOBAL_OUT_NAK (0x1<<17) -/* S3C_UDC_OTG_DCTL device control register */ +/* DWC2_UDC_OTG_DCTL device control register */ #define NORMAL_OPERATION (0x1<<0) #define SOFT_DISCONNECT (0x1<<1) -/* S3C_UDC_OTG_DAINT device all endpoint interrupt register */ +/* DWC2_UDC_OTG_DAINT device all endpoint interrupt register */ #define DAINT_OUT_BIT (16) #define DAINT_MASK (0xFFFF) -/* S3C_UDC_OTG_DIEPCTL0/DOEPCTL0 device +/* DWC2_UDC_OTG_DIEPCTL0/DOEPCTL0 device control IN/OUT endpoint 0 control register */ #define DEPCTL_EPENA (0x1<<31) #define DEPCTL_EPDIS (0x1<<30) @@ -191,9 +191,9 @@ struct dwc2_usbotg_reg { #define DIEPCTL0_NEXT_EP_BIT (11) -/* S3C_UDC_OTG_DIEPMSK/DOEPMSK device IN/OUT endpoint +/* DWC2_UDC_OTG_DIEPMSK/DOEPMSK device IN/OUT endpoint common interrupt mask register */ -/* S3C_UDC_OTG_DIEPINTn/DOEPINTn device IN/OUT endpoint interrupt register */ +/* DWC2_UDC_OTG_DIEPINTn/DOEPINTn device IN/OUT endpoint interrupt register */ #define BACK2BACK_SETUP_RECEIVED (0x1<<6) #define INTKNEPMIS (0x1<<5) #define INTKN_TXFEMP (0x1<<4) diff --git a/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c b/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c index fe02c0f..d56d401c 100644 --- a/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c +++ b/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c @@ -652,14 +652,14 @@ static int dwc2_queue(struct usb_ep *_ep, struct usb_request *_req, } else if (ep_is_in(ep)) { gintsts = readl(®->gintsts); debug_cond(DEBUG_IN_EP, - "%s: ep_is_in, S3C_UDC_OTG_GINTSTS=0x%x\n", + "%s: ep_is_in, DWC2_UDC_OTG_GINTSTS=0x%x\n", __func__, gintsts); setdma_tx(ep, req); } else { gintsts = readl(®->gintsts); debug_cond(DEBUG_OUT_EP != 0, - "%s:ep_is_out, S3C_UDC_OTG_GINTSTS=0x%x\n", + "%s:ep_is_out, DWC2_UDC_OTG_GINTSTS=0x%x\n", __func__, gintsts); setdma_rx(ep, req); -- cgit v1.1 From e179cedd09325f6e83107d6f437600de0fc81553 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Fri, 4 Dec 2015 02:55:37 +0100 Subject: usb: s3c-otg: Tweak the comments The driver is actually for the Designware DWC2 controller. Tweak the comments in the driver to reflect this fact. Signed-off-by: Marek Vasut --- drivers/usb/gadget/dwc2_udc_otg.c | 2 +- drivers/usb/gadget/dwc2_udc_otg_phy.c | 2 +- drivers/usb/gadget/dwc2_udc_otg_priv.h | 2 +- drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c | 2 +- include/usb/s3c_udc.h | 2 +- 5 files changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/usb/gadget/dwc2_udc_otg.c b/drivers/usb/gadget/dwc2_udc_otg.c index 93514a9..772d948 100644 --- a/drivers/usb/gadget/dwc2_udc_otg.c +++ b/drivers/usb/gadget/dwc2_udc_otg.c @@ -1,6 +1,6 @@ /* * drivers/usb/gadget/dwc2_udc_otg.c - * Samsung S3C on-chip full/high speed USB OTG 2.0 device controllers + * Designware DWC2 on-chip full/high speed USB OTG 2.0 device controllers * * Copyright (C) 2008 for Samsung Electronics * diff --git a/drivers/usb/gadget/dwc2_udc_otg_phy.c b/drivers/usb/gadget/dwc2_udc_otg_phy.c index eedfe37..d3e9840 100644 --- a/drivers/usb/gadget/dwc2_udc_otg_phy.c +++ b/drivers/usb/gadget/dwc2_udc_otg_phy.c @@ -1,6 +1,6 @@ /* * drivers/usb/gadget/dwc2_udc_otg.c - * Samsung S3C on-chip full/high speed USB OTG 2.0 device controllers + * Designware DWC2 on-chip full/high speed USB OTG 2.0 device controllers * * Copyright (C) 2008 for Samsung Electronics * diff --git a/drivers/usb/gadget/dwc2_udc_otg_priv.h b/drivers/usb/gadget/dwc2_udc_otg_priv.h index 5126a9d..3642882 100644 --- a/drivers/usb/gadget/dwc2_udc_otg_priv.h +++ b/drivers/usb/gadget/dwc2_udc_otg_priv.h @@ -1,5 +1,5 @@ /* - * Samsung S3C on-chip full/high speed USB device controllers + * Designware DWC2 on-chip full/high speed USB device controllers * Copyright (C) 2005 for Samsung Electronics * * SPDX-License-Identifier: GPL-2.0+ diff --git a/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c b/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c index d56d401c..bce9c30 100644 --- a/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c +++ b/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c @@ -1,6 +1,6 @@ /* * drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c - * Samsung S3C on-chip full/high speed USB OTG 2.0 device controllers + * Designware DWC2 on-chip full/high speed USB OTG 2.0 device controllers * * Copyright (C) 2009 for Samsung Electronics * diff --git a/include/usb/s3c_udc.h b/include/usb/s3c_udc.h index 20af629..497248d 100644 --- a/include/usb/s3c_udc.h +++ b/include/usb/s3c_udc.h @@ -1,6 +1,6 @@ /* * drivers/usb/gadget/s3c_udc.h - * Samsung S3C on-chip full/high speed USB device controllers + * Designware DWC2 on-chip full/high speed USB device controllers * Copyright (C) 2005 for Samsung Electronics * * SPDX-License-Identifier: GPL-2.0+ -- cgit v1.1 From e30824f439c81070d97cff3f9a31952b58eb9ad3 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Wed, 19 Aug 2015 23:27:26 +0200 Subject: usb: s3c-otg: Rename USB_GADGET_S3C_UDC_OTG* to USB_GADGET_DWC2_OTG* The s3c-otg IP block is in fact a DWC2 OTG one, so finally rename the config option to make it less misleading. No functional change, just a mechanical change done using the following script: git grep USB_GADGET_S3C_UDC_OTG | cut -d : -f 1 | sort -u | \ while read line ; do sed -i "s/USB_GADGET_S3C_UDC_OTG/USB_GADGET_DWC2_OTG/g" $line ; done Signed-off-by: Marek Vasut --- drivers/usb/gadget/Makefile | 4 ++-- include/configs/bcm28155_ap.h | 2 +- include/configs/exynos4-common.h | 4 ++-- include/configs/s5p_goni.h | 4 ++-- include/configs/s5pc210_universal.h | 4 ++-- include/configs/smdkv310.h | 4 ++-- include/configs/socfpga_common.h | 2 +- 7 files changed, 12 insertions(+), 12 deletions(-) diff --git a/drivers/usb/gadget/Makefile b/drivers/usb/gadget/Makefile index dd4df00..c915c79 100644 --- a/drivers/usb/gadget/Makefile +++ b/drivers/usb/gadget/Makefile @@ -13,8 +13,8 @@ ifdef CONFIG_USB_GADGET obj-$(CONFIG_USB_GADGET_AT91) += at91_udc.o obj-$(CONFIG_USB_GADGET_ATMEL_USBA) += atmel_usba_udc.o obj-$(CONFIG_USB_GADGET_BCM_UDC_OTG_PHY) += bcm_udc_otg_phy.o -obj-$(CONFIG_USB_GADGET_S3C_UDC_OTG) += dwc2_udc_otg.o -obj-$(CONFIG_USB_GADGET_S3C_UDC_OTG_PHY) += dwc2_udc_otg_phy.o +obj-$(CONFIG_USB_GADGET_DWC2_OTG) += dwc2_udc_otg.o +obj-$(CONFIG_USB_GADGET_DWC2_OTG_PHY) += dwc2_udc_otg_phy.o obj-$(CONFIG_USB_GADGET_FOTG210) += fotg210.o obj-$(CONFIG_CI_UDC) += ci_udc.o obj-$(CONFIG_USB_GADGET_DOWNLOAD) += g_dnl.o diff --git a/include/configs/bcm28155_ap.h b/include/configs/bcm28155_ap.h index 131f613..a257084 100644 --- a/include/configs/bcm28155_ap.h +++ b/include/configs/bcm28155_ap.h @@ -142,7 +142,7 @@ #define CONFIG_USB_GADGET #define CONFIG_USB_GADGET_DUALSPEED #define CONFIG_USB_GADGET_VBUS_DRAW 0 -#define CONFIG_USB_GADGET_S3C_UDC_OTG +#define CONFIG_USB_GADGET_DWC2_OTG #define CONFIG_USB_GADGET_BCM_UDC_OTG_PHY #define CONFIG_USB_GADGET_DOWNLOAD #define CONFIG_USBID_ADDR 0x34052c46 diff --git a/include/configs/exynos4-common.h b/include/configs/exynos4-common.h index ec1f882..d101a77 100644 --- a/include/configs/exynos4-common.h +++ b/include/configs/exynos4-common.h @@ -51,8 +51,8 @@ #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ #define CONFIG_USB_GADGET -#define CONFIG_USB_GADGET_S3C_UDC_OTG -#define CONFIG_USB_GADGET_S3C_UDC_OTG_PHY +#define CONFIG_USB_GADGET_DWC2_OTG +#define CONFIG_USB_GADGET_DWC2_OTG_PHY #define CONFIG_USB_GADGET_DUALSPEED #define CONFIG_USB_GADGET_VBUS_DRAW 2 diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h index 2877e19..8f65d7e 100644 --- a/include/configs/s5p_goni.h +++ b/include/configs/s5p_goni.h @@ -269,8 +269,8 @@ #define CONFIG_SYS_MAX_I2C_BUS 7 #define CONFIG_USB_GADGET -#define CONFIG_USB_GADGET_S3C_UDC_OTG -#define CONFIG_USB_GADGET_S3C_UDC_OTG_PHY +#define CONFIG_USB_GADGET_DWC2_OTG +#define CONFIG_USB_GADGET_DWC2_OTG_PHY #define CONFIG_USB_GADGET_DUALSPEED #define CONFIG_USB_GADGET_VBUS_DRAW 2 #define CONFIG_CMD_USB_MASS_STORAGE diff --git a/include/configs/s5pc210_universal.h b/include/configs/s5pc210_universal.h index 35fef2b..7bb62ca 100644 --- a/include/configs/s5pc210_universal.h +++ b/include/configs/s5pc210_universal.h @@ -177,8 +177,8 @@ #define CONFIG_POWER_MAX8998 #define CONFIG_USB_GADGET -#define CONFIG_USB_GADGET_S3C_UDC_OTG -#define CONFIG_USB_GADGET_S3C_UDC_OTG_PHY +#define CONFIG_USB_GADGET_DWC2_OTG +#define CONFIG_USB_GADGET_DWC2_OTG_PHY #define CONFIG_USB_GADGET_DUALSPEED /* diff --git a/include/configs/smdkv310.h b/include/configs/smdkv310.h index 217cfc0..2492f99 100644 --- a/include/configs/smdkv310.h +++ b/include/configs/smdkv310.h @@ -13,8 +13,8 @@ #undef CONFIG_BOARD_COMMON #undef CONFIG_USB_GADGET -#undef CONFIG_USB_GADGET_S3C_UDC_OTG -#undef CONFIG_USB_GADGET_S3C_UDC_OTG_PHY +#undef CONFIG_USB_GADGET_DWC2_OTG +#undef CONFIG_USB_GADGET_DWC2_OTG_PHY #undef CONFIG_CMD_USB_MASS_STORAGE #undef CONFIG_REVISION_TAG #undef CONFIG_CMD_THOR_DOWNLOAD diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index b3f65b6..b0bc689 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -243,7 +243,7 @@ unsigned int cm_get_qspi_controller_clk_hz(void); */ #if defined(CONFIG_CMD_DFU) || defined(CONFIG_CMD_USB_MASS_STORAGE) #define CONFIG_USB_GADGET -#define CONFIG_USB_GADGET_S3C_UDC_OTG +#define CONFIG_USB_GADGET_DWC2_OTG #define CONFIG_USB_GADGET_DUALSPEED #define CONFIG_USB_GADGET_VBUS_DRAW 2 -- cgit v1.1 From c0982871df3ea6af1658cbf0f2fe38938b1780c7 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Fri, 4 Dec 2015 02:23:29 +0100 Subject: usb: s3c-otg: Rename struct s3c_plat_otg_data The driver is actually for the Designware DWC2 controller. This patch is the first to rename global symbol, the struct s3c_plat_otg_data. The rename is done automatically: $ sed -i "s/s3c_plat_otg_data/dwc2_plat_otg_data/g" \ `git grep s3c_plat_otg_data | cut -d : -f 1` Signed-off-by: Marek Vasut --- board/altera/arria5-socdk/socfpga.c | 2 +- board/altera/cyclone5-socdk/socfpga.c | 2 +- board/broadcom/bcm28155_ap/bcm28155_ap.c | 2 +- board/denx/mcvevk/socfpga.c | 2 +- board/ebv/socrates/socfpga.c | 2 +- board/samsung/goni/goni.c | 2 +- board/samsung/odroid/odroid.c | 2 +- board/samsung/trats/trats.c | 4 ++-- board/samsung/trats2/trats2.c | 2 +- board/samsung/universal_c210/universal.c | 2 +- board/terasic/sockit/socfpga.c | 2 +- drivers/usb/gadget/dwc2_udc_otg.c | 2 +- drivers/usb/gadget/dwc2_udc_otg_priv.h | 2 +- include/usb/s3c_udc.h | 4 ++-- 14 files changed, 16 insertions(+), 16 deletions(-) diff --git a/board/altera/arria5-socdk/socfpga.c b/board/altera/arria5-socdk/socfpga.c index a1dbc49..10f8f68 100644 --- a/board/altera/arria5-socdk/socfpga.c +++ b/board/altera/arria5-socdk/socfpga.c @@ -68,7 +68,7 @@ int board_phy_config(struct phy_device *phydev) #endif #ifdef CONFIG_USB_GADGET -struct s3c_plat_otg_data socfpga_otg_data = { +struct dwc2_plat_otg_data socfpga_otg_data = { .regs_otg = CONFIG_USB_DWC2_REG_ADDR, .usb_gusbcfg = 0x1417, }; diff --git a/board/altera/cyclone5-socdk/socfpga.c b/board/altera/cyclone5-socdk/socfpga.c index a1dbc49..10f8f68 100644 --- a/board/altera/cyclone5-socdk/socfpga.c +++ b/board/altera/cyclone5-socdk/socfpga.c @@ -68,7 +68,7 @@ int board_phy_config(struct phy_device *phydev) #endif #ifdef CONFIG_USB_GADGET -struct s3c_plat_otg_data socfpga_otg_data = { +struct dwc2_plat_otg_data socfpga_otg_data = { .regs_otg = CONFIG_USB_DWC2_REG_ADDR, .usb_gusbcfg = 0x1417, }; diff --git a/board/broadcom/bcm28155_ap/bcm28155_ap.c b/board/broadcom/bcm28155_ap/bcm28155_ap.c index 20eb191..e517db3 100644 --- a/board/broadcom/bcm28155_ap/bcm28155_ap.c +++ b/board/broadcom/bcm28155_ap/bcm28155_ap.c @@ -95,7 +95,7 @@ int board_mmc_init(bd_t *bis) #endif #ifdef CONFIG_USB_GADGET -static struct s3c_plat_otg_data bcm_otg_data = { +static struct dwc2_plat_otg_data bcm_otg_data = { .regs_otg = HSOTG_BASE_ADDR }; diff --git a/board/denx/mcvevk/socfpga.c b/board/denx/mcvevk/socfpga.c index 1a23a7d..f27b64e 100644 --- a/board/denx/mcvevk/socfpga.c +++ b/board/denx/mcvevk/socfpga.c @@ -28,7 +28,7 @@ int board_init(void) } #ifdef CONFIG_USB_GADGET -struct s3c_plat_otg_data socfpga_otg_data = { +struct dwc2_plat_otg_data socfpga_otg_data = { .regs_otg = CONFIG_USB_DWC2_REG_ADDR, .usb_gusbcfg = 0x1417, }; diff --git a/board/ebv/socrates/socfpga.c b/board/ebv/socrates/socfpga.c index a1dbc49..10f8f68 100644 --- a/board/ebv/socrates/socfpga.c +++ b/board/ebv/socrates/socfpga.c @@ -68,7 +68,7 @@ int board_phy_config(struct phy_device *phydev) #endif #ifdef CONFIG_USB_GADGET -struct s3c_plat_otg_data socfpga_otg_data = { +struct dwc2_plat_otg_data socfpga_otg_data = { .regs_otg = CONFIG_USB_DWC2_REG_ADDR, .usb_gusbcfg = 0x1417, }; diff --git a/board/samsung/goni/goni.c b/board/samsung/goni/goni.c index d943d63..2ba556e 100644 --- a/board/samsung/goni/goni.c +++ b/board/samsung/goni/goni.c @@ -183,7 +183,7 @@ static int s5pc1xx_phy_control(int on) return 0; } -struct s3c_plat_otg_data s5pc110_otg_data = { +struct dwc2_plat_otg_data s5pc110_otg_data = { .phy_control = s5pc1xx_phy_control, .regs_phy = S5PC110_PHY_BASE, .regs_otg = S5PC110_OTG_BASE, diff --git a/board/samsung/odroid/odroid.c b/board/samsung/odroid/odroid.c index 36d493d5..58cbb72 100644 --- a/board/samsung/odroid/odroid.c +++ b/board/samsung/odroid/odroid.c @@ -452,7 +452,7 @@ static int s5pc210_phy_control(int on) return regulator_set_mode(dev, OPMODE_LPM); } -struct s3c_plat_otg_data s5pc210_otg_data = { +struct dwc2_plat_otg_data s5pc210_otg_data = { .phy_control = s5pc210_phy_control, .regs_phy = EXYNOS4X12_USBPHY_BASE, .regs_otg = EXYNOS4X12_USBOTG_BASE, diff --git a/board/samsung/trats/trats.c b/board/samsung/trats/trats.c index e163e45..3a553c1 100644 --- a/board/samsung/trats/trats.c +++ b/board/samsung/trats/trats.c @@ -41,7 +41,7 @@ u32 get_board_rev(void) #endif static void check_hw_revision(void); -struct s3c_plat_otg_data s5pc210_otg_data; +struct dwc2_plat_otg_data s5pc210_otg_data; int exynos_init(void) { @@ -419,7 +419,7 @@ static int s5pc210_phy_control(int on) return 0; } -struct s3c_plat_otg_data s5pc210_otg_data = { +struct dwc2_plat_otg_data s5pc210_otg_data = { .phy_control = s5pc210_phy_control, .regs_phy = EXYNOS4_USBPHY_BASE, .regs_otg = EXYNOS4_USBOTG_BASE, diff --git a/board/samsung/trats2/trats2.c b/board/samsung/trats2/trats2.c index a737749..e52a817 100644 --- a/board/samsung/trats2/trats2.c +++ b/board/samsung/trats2/trats2.c @@ -303,7 +303,7 @@ static int s5pc210_phy_control(int on) return 0; } -struct s3c_plat_otg_data s5pc210_otg_data = { +struct dwc2_plat_otg_data s5pc210_otg_data = { .phy_control = s5pc210_phy_control, .regs_phy = EXYNOS4X12_USBPHY_BASE, .regs_otg = EXYNOS4X12_USBOTG_BASE, diff --git a/board/samsung/universal_c210/universal.c b/board/samsung/universal_c210/universal.c index df46713..747d556 100644 --- a/board/samsung/universal_c210/universal.c +++ b/board/samsung/universal_c210/universal.c @@ -179,7 +179,7 @@ static int s5pc210_phy_control(int on) return 0; } -struct s3c_plat_otg_data s5pc210_otg_data = { +struct dwc2_plat_otg_data s5pc210_otg_data = { .phy_control = s5pc210_phy_control, .regs_phy = EXYNOS4_USBPHY_BASE, .regs_otg = EXYNOS4_USBOTG_BASE, diff --git a/board/terasic/sockit/socfpga.c b/board/terasic/sockit/socfpga.c index a1dbc49..10f8f68 100644 --- a/board/terasic/sockit/socfpga.c +++ b/board/terasic/sockit/socfpga.c @@ -68,7 +68,7 @@ int board_phy_config(struct phy_device *phydev) #endif #ifdef CONFIG_USB_GADGET -struct s3c_plat_otg_data socfpga_otg_data = { +struct dwc2_plat_otg_data socfpga_otg_data = { .regs_otg = CONFIG_USB_DWC2_REG_ADDR, .usb_gusbcfg = 0x1417, }; diff --git a/drivers/usb/gadget/dwc2_udc_otg.c b/drivers/usb/gadget/dwc2_udc_otg.c index 772d948..2e2dfe1 100644 --- a/drivers/usb/gadget/dwc2_udc_otg.c +++ b/drivers/usb/gadget/dwc2_udc_otg.c @@ -797,7 +797,7 @@ static struct dwc2_udc memory = { * probe - binds to the platform device */ -int s3c_udc_probe(struct s3c_plat_otg_data *pdata) +int s3c_udc_probe(struct dwc2_plat_otg_data *pdata) { struct dwc2_udc *dev = &memory; int retval = 0; diff --git a/drivers/usb/gadget/dwc2_udc_otg_priv.h b/drivers/usb/gadget/dwc2_udc_otg_priv.h index 3642882..c5e9dc2 100644 --- a/drivers/usb/gadget/dwc2_udc_otg_priv.h +++ b/drivers/usb/gadget/dwc2_udc_otg_priv.h @@ -78,7 +78,7 @@ struct dwc2_udc { struct usb_gadget gadget; struct usb_gadget_driver *driver; - struct s3c_plat_otg_data *pdata; + struct dwc2_plat_otg_data *pdata; int ep0state; struct dwc2_ep ep[DWC2_MAX_ENDPOINTS]; diff --git a/include/usb/s3c_udc.h b/include/usb/s3c_udc.h index 497248d..3e83f7c 100644 --- a/include/usb/s3c_udc.h +++ b/include/usb/s3c_udc.h @@ -11,7 +11,7 @@ #define PHY0_SLEEP (1 << 5) -struct s3c_plat_otg_data { +struct dwc2_plat_otg_data { int (*phy_control)(int on); unsigned int regs_phy; unsigned int regs_otg; @@ -20,6 +20,6 @@ struct s3c_plat_otg_data { unsigned int usb_gusbcfg; }; -int s3c_udc_probe(struct s3c_plat_otg_data *pdata); +int s3c_udc_probe(struct dwc2_plat_otg_data *pdata); #endif -- cgit v1.1 From a4bb9b3636fe6dfd1cadaf34c42f4fb3b1ebe46c Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Fri, 4 Dec 2015 02:26:33 +0100 Subject: usb: s3c-otg: Rename s3c_udc_probe() function The driver is actually for the Designware DWC2 controller. This patch is the second and final to rename global symbol, the s3c_udc_probe() function. The rename is done automatically: $ sed -i "s/s3c_udc_probe/dwc2_udc_probe/g" \ `git grep s3c_udc_probe | cut -d : -f 1` Signed-off-by: Marek Vasut --- board/altera/arria5-socdk/socfpga.c | 2 +- board/altera/cyclone5-socdk/socfpga.c | 2 +- board/broadcom/bcm28155_ap/bcm28155_ap.c | 4 ++-- board/denx/mcvevk/socfpga.c | 2 +- board/ebv/socrates/socfpga.c | 2 +- board/samsung/goni/goni.c | 2 +- board/samsung/odroid/odroid.c | 2 +- board/samsung/trats/trats.c | 2 +- board/samsung/trats2/trats2.c | 2 +- board/samsung/universal_c210/universal.c | 2 +- board/terasic/sockit/socfpga.c | 2 +- drivers/usb/gadget/dwc2_udc_otg.c | 2 +- include/usb/s3c_udc.h | 2 +- 13 files changed, 14 insertions(+), 14 deletions(-) diff --git a/board/altera/arria5-socdk/socfpga.c b/board/altera/arria5-socdk/socfpga.c index 10f8f68..e640d8c 100644 --- a/board/altera/arria5-socdk/socfpga.c +++ b/board/altera/arria5-socdk/socfpga.c @@ -75,7 +75,7 @@ struct dwc2_plat_otg_data socfpga_otg_data = { int board_usb_init(int index, enum usb_init_type init) { - return s3c_udc_probe(&socfpga_otg_data); + return dwc2_udc_probe(&socfpga_otg_data); } int g_dnl_board_usb_cable_connected(void) diff --git a/board/altera/cyclone5-socdk/socfpga.c b/board/altera/cyclone5-socdk/socfpga.c index 10f8f68..e640d8c 100644 --- a/board/altera/cyclone5-socdk/socfpga.c +++ b/board/altera/cyclone5-socdk/socfpga.c @@ -75,7 +75,7 @@ struct dwc2_plat_otg_data socfpga_otg_data = { int board_usb_init(int index, enum usb_init_type init) { - return s3c_udc_probe(&socfpga_otg_data); + return dwc2_udc_probe(&socfpga_otg_data); } int g_dnl_board_usb_cable_connected(void) diff --git a/board/broadcom/bcm28155_ap/bcm28155_ap.c b/board/broadcom/bcm28155_ap/bcm28155_ap.c index e517db3..09397fc 100644 --- a/board/broadcom/bcm28155_ap/bcm28155_ap.c +++ b/board/broadcom/bcm28155_ap/bcm28155_ap.c @@ -101,8 +101,8 @@ static struct dwc2_plat_otg_data bcm_otg_data = { int board_usb_init(int index, enum usb_init_type init) { - debug("%s: performing s3c_udc_probe\n", __func__); - return s3c_udc_probe(&bcm_otg_data); + debug("%s: performing dwc2_udc_probe\n", __func__); + return dwc2_udc_probe(&bcm_otg_data); } int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name) diff --git a/board/denx/mcvevk/socfpga.c b/board/denx/mcvevk/socfpga.c index f27b64e..3870b0b 100644 --- a/board/denx/mcvevk/socfpga.c +++ b/board/denx/mcvevk/socfpga.c @@ -35,7 +35,7 @@ struct dwc2_plat_otg_data socfpga_otg_data = { int board_usb_init(int index, enum usb_init_type init) { - return s3c_udc_probe(&socfpga_otg_data); + return dwc2_udc_probe(&socfpga_otg_data); } int g_dnl_board_usb_cable_connected(void) diff --git a/board/ebv/socrates/socfpga.c b/board/ebv/socrates/socfpga.c index 10f8f68..e640d8c 100644 --- a/board/ebv/socrates/socfpga.c +++ b/board/ebv/socrates/socfpga.c @@ -75,7 +75,7 @@ struct dwc2_plat_otg_data socfpga_otg_data = { int board_usb_init(int index, enum usb_init_type init) { - return s3c_udc_probe(&socfpga_otg_data); + return dwc2_udc_probe(&socfpga_otg_data); } int g_dnl_board_usb_cable_connected(void) diff --git a/board/samsung/goni/goni.c b/board/samsung/goni/goni.c index 2ba556e..2725a46 100644 --- a/board/samsung/goni/goni.c +++ b/board/samsung/goni/goni.c @@ -193,7 +193,7 @@ struct dwc2_plat_otg_data s5pc110_otg_data = { int board_usb_init(int index, enum usb_init_type init) { debug("USB_udc_probe\n"); - return s3c_udc_probe(&s5pc110_otg_data); + return dwc2_udc_probe(&s5pc110_otg_data); } #endif diff --git a/board/samsung/odroid/odroid.c b/board/samsung/odroid/odroid.c index 58cbb72..a3ee159 100644 --- a/board/samsung/odroid/odroid.c +++ b/board/samsung/odroid/odroid.c @@ -510,6 +510,6 @@ int board_usb_init(int index, enum usb_init_type init) } #endif debug("USB_udc_probe\n"); - return s3c_udc_probe(&s5pc210_otg_data); + return dwc2_udc_probe(&s5pc210_otg_data); } #endif diff --git a/board/samsung/trats/trats.c b/board/samsung/trats/trats.c index 3a553c1..6f711a8 100644 --- a/board/samsung/trats/trats.c +++ b/board/samsung/trats/trats.c @@ -430,7 +430,7 @@ struct dwc2_plat_otg_data s5pc210_otg_data = { int board_usb_init(int index, enum usb_init_type init) { debug("USB_udc_probe\n"); - return s3c_udc_probe(&s5pc210_otg_data); + return dwc2_udc_probe(&s5pc210_otg_data); } int g_dnl_board_usb_cable_connected(void) diff --git a/board/samsung/trats2/trats2.c b/board/samsung/trats2/trats2.c index e52a817..dd7a606 100644 --- a/board/samsung/trats2/trats2.c +++ b/board/samsung/trats2/trats2.c @@ -314,7 +314,7 @@ struct dwc2_plat_otg_data s5pc210_otg_data = { int board_usb_init(int index, enum usb_init_type init) { debug("USB_udc_probe\n"); - return s3c_udc_probe(&s5pc210_otg_data); + return dwc2_udc_probe(&s5pc210_otg_data); } int g_dnl_board_usb_cable_connected(void) diff --git a/board/samsung/universal_c210/universal.c b/board/samsung/universal_c210/universal.c index 747d556..0c1b9d8 100644 --- a/board/samsung/universal_c210/universal.c +++ b/board/samsung/universal_c210/universal.c @@ -191,7 +191,7 @@ struct dwc2_plat_otg_data s5pc210_otg_data = { int board_usb_init(int index, enum usb_init_type init) { debug("USB_udc_probe\n"); - return s3c_udc_probe(&s5pc210_otg_data); + return dwc2_udc_probe(&s5pc210_otg_data); } int exynos_early_init_f(void) diff --git a/board/terasic/sockit/socfpga.c b/board/terasic/sockit/socfpga.c index 10f8f68..e640d8c 100644 --- a/board/terasic/sockit/socfpga.c +++ b/board/terasic/sockit/socfpga.c @@ -75,7 +75,7 @@ struct dwc2_plat_otg_data socfpga_otg_data = { int board_usb_init(int index, enum usb_init_type init) { - return s3c_udc_probe(&socfpga_otg_data); + return dwc2_udc_probe(&socfpga_otg_data); } int g_dnl_board_usb_cable_connected(void) diff --git a/drivers/usb/gadget/dwc2_udc_otg.c b/drivers/usb/gadget/dwc2_udc_otg.c index 2e2dfe1..ad9ed33 100644 --- a/drivers/usb/gadget/dwc2_udc_otg.c +++ b/drivers/usb/gadget/dwc2_udc_otg.c @@ -797,7 +797,7 @@ static struct dwc2_udc memory = { * probe - binds to the platform device */ -int s3c_udc_probe(struct dwc2_plat_otg_data *pdata) +int dwc2_udc_probe(struct dwc2_plat_otg_data *pdata) { struct dwc2_udc *dev = &memory; int retval = 0; diff --git a/include/usb/s3c_udc.h b/include/usb/s3c_udc.h index 3e83f7c..9bc1aad 100644 --- a/include/usb/s3c_udc.h +++ b/include/usb/s3c_udc.h @@ -20,6 +20,6 @@ struct dwc2_plat_otg_data { unsigned int usb_gusbcfg; }; -int s3c_udc_probe(struct dwc2_plat_otg_data *pdata); +int dwc2_udc_probe(struct dwc2_plat_otg_data *pdata); #endif -- cgit v1.1 From 5d5716eebccaa9b9ab977b7d5a9fae2abb7a8829 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Fri, 4 Dec 2015 02:51:20 +0100 Subject: usb: s3c-otg: Rename usb/s3c_udc.h to usb/dwc2_udc.h The driver is actually for the Designware DWC2 controller. This patch renames the global s3c_udc.h header to dwc2_udc.h. The rename is done automatically: $ sed -i "s/s3c_udc\.h/dwc2_udc.h/g" \ `git grep "s3c_udc\.h" | cut -d : -f 1` Signed-off-by: Marek Vasut --- board/altera/arria5-socdk/socfpga.c | 2 +- board/altera/cyclone5-socdk/socfpga.c | 2 +- board/broadcom/bcm28155_ap/bcm28155_ap.c | 2 +- board/denx/mcvevk/socfpga.c | 2 +- board/ebv/socrates/socfpga.c | 2 +- board/samsung/goni/goni.c | 2 +- board/samsung/odroid/odroid.c | 2 +- board/samsung/trats/trats.c | 2 +- board/samsung/trats2/trats2.c | 2 +- board/samsung/universal_c210/universal.c | 2 +- board/terasic/sockit/socfpga.c | 2 +- drivers/usb/gadget/dwc2_udc_otg.c | 2 +- drivers/usb/gadget/dwc2_udc_otg_phy.c | 2 +- drivers/usb/gadget/dwc2_udc_otg_priv.h | 2 +- include/usb/dwc2_udc.h | 25 +++++++++++++++++++++++++ include/usb/s3c_udc.h | 25 ------------------------- 16 files changed, 39 insertions(+), 39 deletions(-) create mode 100644 include/usb/dwc2_udc.h delete mode 100644 include/usb/s3c_udc.h diff --git a/board/altera/arria5-socdk/socfpga.c b/board/altera/arria5-socdk/socfpga.c index e640d8c..0fbbc34 100644 --- a/board/altera/arria5-socdk/socfpga.c +++ b/board/altera/arria5-socdk/socfpga.c @@ -9,7 +9,7 @@ #include #include -#include +#include #include #include diff --git a/board/altera/cyclone5-socdk/socfpga.c b/board/altera/cyclone5-socdk/socfpga.c index e640d8c..0fbbc34 100644 --- a/board/altera/cyclone5-socdk/socfpga.c +++ b/board/altera/cyclone5-socdk/socfpga.c @@ -9,7 +9,7 @@ #include #include -#include +#include #include #include diff --git a/board/broadcom/bcm28155_ap/bcm28155_ap.c b/board/broadcom/bcm28155_ap/bcm28155_ap.c index 09397fc..b3a4a41 100644 --- a/board/broadcom/bcm28155_ap/bcm28155_ap.c +++ b/board/broadcom/bcm28155_ap/bcm28155_ap.c @@ -13,7 +13,7 @@ #include #include -#include +#include #include #define SECWATCHDOG_SDOGCR_OFFSET 0x00000000 diff --git a/board/denx/mcvevk/socfpga.c b/board/denx/mcvevk/socfpga.c index 3870b0b..0f93722 100644 --- a/board/denx/mcvevk/socfpga.c +++ b/board/denx/mcvevk/socfpga.c @@ -9,7 +9,7 @@ #include #include -#include +#include #include DECLARE_GLOBAL_DATA_PTR; diff --git a/board/ebv/socrates/socfpga.c b/board/ebv/socrates/socfpga.c index e640d8c..0fbbc34 100644 --- a/board/ebv/socrates/socfpga.c +++ b/board/ebv/socrates/socfpga.c @@ -9,7 +9,7 @@ #include #include -#include +#include #include #include diff --git a/board/samsung/goni/goni.c b/board/samsung/goni/goni.c index 2725a46..1600568 100644 --- a/board/samsung/goni/goni.c +++ b/board/samsung/goni/goni.c @@ -10,7 +10,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/board/samsung/odroid/odroid.c b/board/samsung/odroid/odroid.c index a3ee159..b4cb332 100644 --- a/board/samsung/odroid/odroid.c +++ b/board/samsung/odroid/odroid.c @@ -19,7 +19,7 @@ #include #include #include -#include +#include #include #include "setup.h" diff --git a/board/samsung/trats/trats.c b/board/samsung/trats/trats.c index 6f711a8..54d01ec 100644 --- a/board/samsung/trats/trats.c +++ b/board/samsung/trats/trats.c @@ -18,7 +18,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/board/samsung/trats2/trats2.c b/board/samsung/trats2/trats2.c index dd7a606..7b28ae8 100644 --- a/board/samsung/trats2/trats2.c +++ b/board/samsung/trats2/trats2.c @@ -21,7 +21,7 @@ #include #include #include -#include +#include #include DECLARE_GLOBAL_DATA_PTR; diff --git a/board/samsung/universal_c210/universal.c b/board/samsung/universal_c210/universal.c index 0c1b9d8..c25b486 100644 --- a/board/samsung/universal_c210/universal.c +++ b/board/samsung/universal_c210/universal.c @@ -17,7 +17,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/board/terasic/sockit/socfpga.c b/board/terasic/sockit/socfpga.c index e640d8c..0fbbc34 100644 --- a/board/terasic/sockit/socfpga.c +++ b/board/terasic/sockit/socfpga.c @@ -9,7 +9,7 @@ #include #include -#include +#include #include #include diff --git a/drivers/usb/gadget/dwc2_udc_otg.c b/drivers/usb/gadget/dwc2_udc_otg.c index ad9ed33..ffe2952 100644 --- a/drivers/usb/gadget/dwc2_udc_otg.c +++ b/drivers/usb/gadget/dwc2_udc_otg.c @@ -46,7 +46,7 @@ #define DEBUG_OUT_EP 0 #define DEBUG_IN_EP 0 -#include +#include #define EP0_CON 0 #define EP_MASK 0xF diff --git a/drivers/usb/gadget/dwc2_udc_otg_phy.c b/drivers/usb/gadget/dwc2_udc_otg_phy.c index d3e9840..e0cbbc0 100644 --- a/drivers/usb/gadget/dwc2_udc_otg_phy.c +++ b/drivers/usb/gadget/dwc2_udc_otg_phy.c @@ -36,7 +36,7 @@ #include "dwc2_udc_otg_priv.h" #include -#include +#include void otg_phy_init(struct dwc2_udc *dev) { diff --git a/drivers/usb/gadget/dwc2_udc_otg_priv.h b/drivers/usb/gadget/dwc2_udc_otg_priv.h index c5e9dc2..b2c1fc4 100644 --- a/drivers/usb/gadget/dwc2_udc_otg_priv.h +++ b/drivers/usb/gadget/dwc2_udc_otg_priv.h @@ -14,7 +14,7 @@ #include #include #include -#include +#include /*-------------------------------------------------------------------------*/ /* DMA bounce buffer size, 16K is enough even for mass storage */ diff --git a/include/usb/dwc2_udc.h b/include/usb/dwc2_udc.h new file mode 100644 index 0000000..302e9a3 --- /dev/null +++ b/include/usb/dwc2_udc.h @@ -0,0 +1,25 @@ +/* + * drivers/usb/gadget/dwc2_udc.h + * Designware DWC2 on-chip full/high speed USB device controllers + * Copyright (C) 2005 for Samsung Electronics + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __DWC2_USB_GADGET +#define __DWC2_USB_GADGET + +#define PHY0_SLEEP (1 << 5) + +struct dwc2_plat_otg_data { + int (*phy_control)(int on); + unsigned int regs_phy; + unsigned int regs_otg; + unsigned int usb_phy_ctrl; + unsigned int usb_flags; + unsigned int usb_gusbcfg; +}; + +int dwc2_udc_probe(struct dwc2_plat_otg_data *pdata); + +#endif /* __DWC2_USB_GADGET */ diff --git a/include/usb/s3c_udc.h b/include/usb/s3c_udc.h deleted file mode 100644 index 9bc1aad..0000000 --- a/include/usb/s3c_udc.h +++ /dev/null @@ -1,25 +0,0 @@ -/* - * drivers/usb/gadget/s3c_udc.h - * Designware DWC2 on-chip full/high speed USB device controllers - * Copyright (C) 2005 for Samsung Electronics - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __S3C_USB_GADGET -#define __S3C_USB_GADGET - -#define PHY0_SLEEP (1 << 5) - -struct dwc2_plat_otg_data { - int (*phy_control)(int on); - unsigned int regs_phy; - unsigned int regs_otg; - unsigned int usb_phy_ctrl; - unsigned int usb_flags; - unsigned int usb_gusbcfg; -}; - -int dwc2_udc_probe(struct dwc2_plat_otg_data *pdata); - -#endif -- cgit v1.1 From 70cc443d5833b27dd4dd4a48a771778c39734f75 Mon Sep 17 00:00:00 2001 From: Lukasz Majewski Date: Thu, 10 Dec 2015 16:32:25 +0100 Subject: usb: host: ehci: samsung: Move hcor initialization after usb phy setup With the old order of initialization the hcor pointer has been setup to the same address as Exynos EHCI base address (0x12110000 instead of 0x12110010). Such behaviour was caused by reading value of 0 instead of 0x10 from EHCI HCCPBASE register without doing proper clock initialization before. To fix this problem hcor initialization has been moved after USB PHY setup. Now ehci_readl(&ctx->hcd->cr_capbase) returns correct value. Signed-off-by: Lukasz Majewski --- drivers/usb/host/ehci-exynos.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/usb/host/ehci-exynos.c b/drivers/usb/host/ehci-exynos.c index 18e9251..bede04b 100644 --- a/drivers/usb/host/ehci-exynos.c +++ b/drivers/usb/host/ehci-exynos.c @@ -219,14 +219,14 @@ static int ehci_usb_probe(struct udevice *dev) ctx->hcd = (struct ehci_hccr *)plat->hcd_base; ctx->usb = (struct exynos_usb_phy *)plat->phy_base; - hcor = (struct ehci_hcor *)((uint32_t)ctx->hcd + - HC_LENGTH(ehci_readl(&ctx->hcd->cr_capbase))); /* setup the Vbus gpio here */ if (dm_gpio_is_valid(&plat->vbus_gpio)) dm_gpio_set_value(&plat->vbus_gpio, 1); setup_usb_phy(ctx->usb); + hcor = (struct ehci_hcor *)((uint32_t)ctx->hcd + + HC_LENGTH(ehci_readl(&ctx->hcd->cr_capbase))); return ehci_register(dev, ctx->hcd, hcor, NULL, 0, USB_INIT_HOST); } -- cgit v1.1 From fee331f66c923bd1b481b4a72fe7814e5436daed Mon Sep 17 00:00:00 2001 From: Alexey Brodkin Date: Mon, 14 Dec 2015 17:18:50 +0300 Subject: usb: add support of generic OHCI devices This driver is meant to be used with any OHCI-compatible host controller in case if there's no need for platform-specific glue such as setup of controller or PHY's power mode via GPIOs etc. Signed-off-by: Alexey Brodkin Cc: Simon Glass Cc: Marek Vasut --- drivers/usb/host/Kconfig | 8 ++++++++ drivers/usb/host/Makefile | 1 + drivers/usb/host/ohci-generic.c | 45 +++++++++++++++++++++++++++++++++++++++++ 3 files changed, 54 insertions(+) create mode 100644 drivers/usb/host/ohci-generic.c diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig index 0096a2f..39f7185 100644 --- a/drivers/usb/host/Kconfig +++ b/drivers/usb/host/Kconfig @@ -26,6 +26,14 @@ config USB_XHCI_UNIPHIER endif +config USB_OHCI_GENERIC + bool "Support for generic OHCI USB controller" + depends on OF_CONTROL + depends on DM_USB + default n + ---help--- + Enables support for generic OHCI controller. + config USB_EHCI_HCD bool "EHCI HCD (USB 2.0) support" ---help--- diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile index 0b4b458..6183b80 100644 --- a/drivers/usb/host/Makefile +++ b/drivers/usb/host/Makefile @@ -21,6 +21,7 @@ obj-$(CONFIG_USB_OHCI_S3C24XX) += ohci-s3c24xx.o obj-$(CONFIG_USB_OHCI_EP93XX) += ohci-ep93xx.o obj-$(CONFIG_USB_OHCI_SUNXI) += ohci-sunxi.o obj-$(CONFIG_USB_OHCI_LPC32XX) += ohci-lpc32xx.o +obj-$(CONFIG_USB_OHCI_GENERIC) += ohci-generic.o # echi obj-$(CONFIG_USB_EHCI) += ehci-hcd.o diff --git a/drivers/usb/host/ohci-generic.c b/drivers/usb/host/ohci-generic.c new file mode 100644 index 0000000..f3307f4 --- /dev/null +++ b/drivers/usb/host/ohci-generic.c @@ -0,0 +1,45 @@ +/* + * Copyright (C) 2015 Alexey Brodkin + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include "ohci.h" + +#if !defined(CONFIG_USB_OHCI_NEW) +# error "Generic OHCI driver requires CONFIG_USB_OHCI_NEW" +#endif + +struct generic_ohci { + ohci_t ohci; +}; + +static int ohci_usb_probe(struct udevice *dev) +{ + struct ohci_regs *regs = (struct ohci_regs *)dev_get_addr(dev); + + return ohci_register(dev, regs); +} + +static int ohci_usb_remove(struct udevice *dev) +{ + return ohci_deregister(dev); +} + +static const struct udevice_id ohci_usb_ids[] = { + { .compatible = "generic-ohci" }, + { } +}; + +U_BOOT_DRIVER(ohci_generic) = { + .name = "ohci_generic", + .id = UCLASS_USB, + .of_match = ohci_usb_ids, + .probe = ohci_usb_probe, + .remove = ohci_usb_remove, + .ops = &ohci_usb_ops, + .priv_auto_alloc_size = sizeof(struct generic_ohci), + .flags = DM_FLAG_ALLOC_PRIV_DMA, +}; -- cgit v1.1 From e4b70d80350c1238fa07872d71c19e3ddbf53b76 Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Fri, 13 Nov 2015 13:34:09 -0700 Subject: usb: kbd: don't use int xfers when polling via ctrl xfers When CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP is enabled, use a GET_REPORT control transfer to retrieve the initial state of the keyboard. This matches the technique used to poll the keyboard state. This is useful since it eliminates the remaining use of interrupt transfers from the USB keyboard driver, which allows it to work with USB HCD that don't support interrupt transfers. Cc: Hans de Goede Signed-off-by: Stephen Warren --- common/usb_kbd.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/common/usb_kbd.c b/common/usb_kbd.c index 069fbd2..9617a48 100644 --- a/common/usb_kbd.c +++ b/common/usb_kbd.c @@ -476,6 +476,9 @@ static int usb_kbd_probe_dev(struct usb_device *dev, unsigned int ifnum) USB_KBD_BOOT_REPORT_SIZE, data->new, data->intinterval); if (!data->intq) { +#elif defined(CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP) + if (usb_get_report(dev, iface->desc.bInterfaceNumber, + 1, 0, data->new, USB_KBD_BOOT_REPORT_SIZE) < 0) { #else if (usb_submit_int_msg(dev, data->intpipe, data->new, data->intpktsize, data->intinterval) < 0) { -- cgit v1.1