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2022-05-25Merge tag 'xilinx-for-v2022.07-rc4' of ↵WIP/25May2022Tom Rini1-2/+0
https://source.denx.de/u-boot/custodians/u-boot-microblaze Xilinx changes for v2022.07-rc4 zynqmp: - Fix DP PLL configuration for zcu102/zcu106 and SOM - Fix split mode for starting R5s - DT fixes - Remove firmware node for mini configurations - Wire TEE for multi DTB fit image xilinx: - Handle board_get_usable_ram_top(0) properly phy: - Extend psgtr timeout mmc: - Fix mini configuration which misses zynqmp_pm_is_function_supported()
2022-05-24Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sunxiWIP/24May2022Tom Rini9-23/+21
The bulk of it is (finally!) some DT sync from the kernel. We refrained from syncing one incompatible change, as this would spoil booting Linux kernels before v5.13 with U-Boot's DT (via UEFI, for instance). I test booted Linux v5.18 and v5.4 with that new DT on some boards, and the headless peripherals (MMC, USB, Ethernet) seemed to work. The rest are fixes: - silencing missing clock warnings due to the new pinctrl driver - fixing "UART0 on PortF", allowing UART access through the SD card pins - add an F1C100s clock driver, to enable MMC support (SPI comes later) - some cleanups for CONS_INDEX_n in Kconfig Tested on BananaPi-M1, Pine64-LTS, Pine-H64, X96-Mate (H616) and OrangePi-Zero.
2022-05-24clk: sunxi: add and use dummy gate clocksAndre Przywara1-0/+5
Some devices enumerate various clocks in their DT, and many drivers just blanketly try to enable all of them. This creates problems since we only model a few gate clocks, and the clock driver outputs a warning when a clock is not described: ========= sunxi_set_gate: (CLK#3) unhandled ========= Some clocks don't have an enable bit, or are already enabled in a different way, so we might want to just ignore them. Add a CCU_CLK_F_DUMMY_GATE flag that indicates that case, and define a GATE_DUMMY macro that can be used in the clock description array. Define a few clocks, used by some pinctrl devices, that way to suppress the runtime warnings. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Samuel Holland <samuel@sholland.org>
2022-05-23arm: socfpga: Add the terasic de10-standard boardHumberto Naves1-0/+18
Use the de10-nano files as templates for the de10-standard board. The files in qts directory are generated by quartus from the GHRD design. Signed-off-by: Humberto Naves <hsnaves@gmail.com> Reviewed-by: Marek Vasut <marex@denx.de>
2022-05-23net: fix phy_string_for_interfaceTim Harvey1-1/+1
commit ffb0f6f488b9 ("treewide: Rename PHY_INTERFACE_MODE_NONE to PHY_INTERFACE_MODE_NA") broke the phy_string_for_interface function. Fix it. Fixes ffb0f6f488b9 ("treewide: Rename PHY_INTERFACE_MODE_NONE to PHY_INTERFACE_MODE_NA") Signed-off-by: Tim Harvey <tharvey@gateworks.com> Cc: Marek Behún <marek.behun@nic.cz> Cc: Stefan Roese <sr@denx.de> Cc: Ramon Fried <rfried.dev@gmail.com> Cc: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2022-05-23spi: spi_flash_probe_bus_cs() rely on DT for spi speed and modePatrice Chotard1-1/+0
Now, spi_flash_probe_bus_cs() relies on DT for spi speed and mode and logically calls spi_get_bus_and_cs(). In case spi mode and speed are not read from DT, make usage of spi_flash_probe() instead. To sum-up: - Previous call tree was: spi_flash_probe() -> spi_flash_probe_bus_cs() -> spi_get_bus_and_cs() - Current call tree is: spi_flash_probe() -> _spi_get_bus_and_cs() spi_flash_probe_bus_cs() -> spi_get_bus_and_cs() This patch impacts the following : - cmd/sf.c: if spi mode and/or speed is passed in argument of do_spi_flash_probe(), call spi_flash_probe() otherwise call spi_flash_probe_bus_cs(). - drivers/net/fm/fm.c: as by default spi speed and mode was set to 0 and a comment indicates that speed and mode are read from DT, use spi_flash_probe_bus_cs(). - drivers/net/pfe_eth/pfe_firmware.c: spi speed and mode are not read from DT by all platforms using this driver, so keep legacy and replace spi_flash_probe_bus_cs() by spi_flash_probe(); - drivers/net/sni_netsec.c : spi speed and mode are not read from DT, so replace spi_flash_probe_bus_cs() by spi_flash_probe(). - drivers/usb/gadget/max3420_udc.c: Can't find any platform which make usage of this driver, nevertheless, keep legacy and replace spi_get_bus_and_cs() by _spi_get_bus_and_cs(). - env/sf.c: a comment indicates that speed and mode are read from DT. So use spi_flash_probe_bus_cs(). Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Marek Behun <marek.behun@nic.cz> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Ramon Fried <rfried.dev@gmail.com> Cc: Lukasz Majewski <lukma@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Stefan Roese <sr@denx.de> Cc: "Pali Rohár" <pali@kernel.org> Cc: Konstantin Porotchkin <kostap@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Pratyush Yadav <p.yadav@ti.com> Cc: Sean Anderson <seanga2@gmail.com> Cc: Anji J <anji.jagarlmudi@nxp.com> Cc: Biwen Li <biwen.li@nxp.com> Cc: Priyanka Jain <priyanka.jain@nxp.com> Cc: Chaitanya Sakinam <chaitanya.sakinam@nxp.com>
2022-05-23spi: spi-uclass: Add new spi_get_bus_and_cs() implementationPatrice Chotard1-1/+18
Move legacy spi_get_bus_and_cs() code to _spi_get_bus_and_cs(). Add new spi_get_bus_and_cs() implementation which rely on DT for speed and mode and don't need any drv_name nor dev_name parameters. This will prepare the ground for next patch. Update all callers to use _spi_get_bus_and_cs() to keep the same behavior. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Marek Behun <marek.behun@nic.cz> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Ramon Fried <rfried.dev@gmail.com> Cc: Lukasz Majewski <lukma@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Stefan Roese <sr@denx.de> Cc: "Pali Rohár" <pali@kernel.org> Cc: Konstantin Porotchkin <kostap@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Pratyush Yadav <p.yadav@ti.com> Cc: Sean Anderson <seanga2@gmail.com> Cc: Anji J <anji.jagarlmudi@nxp.com> Cc: Biwen Li <biwen.li@nxp.com> Cc: Priyanka Jain <priyanka.jain@nxp.com> Cc: Chaitanya Sakinam <chaitanya.sakinam@nxp.com>
2022-05-23Merge tag 'u-boot-imx-20220523' of ↵Tom Rini31-54/+276
https://gitlab.denx.de/u-boot/custodians/u-boot-imx u-boot-imx-20220523 ------------------- CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/12087 Additionally to u-boot-imx20200520: - DH MX8MP - i.MX GPIO: reading GPIO when direction is output - Menlo i.MX53: switch to DM And from u-boot-imx20200520: - fix Verdin hang - add pca9450 regulator - conversion to DM_SERIAL - NAND block handling - fix crypto - enable cache on some boards - add ACC board (MX6)
2022-05-23ARM: dts: imx: Add support for DH electronics i.MX8M Plus DHCOM and PDK2Marek Vasut1-0/+113
Add support for DH electronics i.MX8M Plus DHCOM SoM on PDK2 carrier board. Currently supported are serial console, EQoS and FEC ethernets, eMMC, SD, SPI NOR and USB 3.0 host. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@denx.de> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
2022-05-23dt-bindings: sunxi: Update clock/reset binding headersSamuel Holland8-23/+16
Some devicetree updates make use of newly-exposed clocks and resets. To support that, copy the binding headers from the Linux v5.18-rc1 tag. Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-20ARM: imx6: Remove CONFIG_FEC_MXC_PHYADDR from DH headerPhilip Oberfichtner1-3/+0
Use phy address from device tree instead of CONFIG_FEC_MXC_PHYADDR from board header. This is required, because the DH picoITX and DRC02 boards require different settings than PDK2. The corresponding 'phy-handle' device tree properties are already there. I tested this change on picoITX and DRC02, but on PDK2 it is untested. Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Philip Oberfichtner <pro@denx.de>
2022-05-20pmic: pca9450: Add regulator driverMarek Vasut1-0/+11
Add PCA9450 regulator driver. This is complementary driver for the BUCKn and LDOn regulators provided by the PCA9450 PMIC driver. Currently the driver permits reading the settngs and configuring the BUCKn and LDOn regulators. Reviewed-by: Fabio Estevam <festevam@denx.de> Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@denx.de> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
2022-05-20imx: imx8mp_rsb3720a1: convert to DM_SERIALPeng Fan1-2/+0
Enable CONFIG_DM_SERIAL. uart2 and its pinmux was already marked with u-boot,dm-spl. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-05-20bosch: Add initial board support for ACCPhilip Oberfichtner1-0/+122
The Bosch ACC (Air Center Control) Board is based on the i.MX6D. The device tree is copied from Linux, see [1]. The only difference compared to the Linux DT is the removal of usbphynop properties. They are defined in the Linux version of imx6qdl.dtsi, but not in the u-boot version. [1] Commit 6192cf8ac082 from git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux.git Signed-off-by: Philip Oberfichtner <pro@denx.de>
2022-05-20usb: xhci-dwc3: Support role switch default roleMark Kettenis1-0/+10
When the device tree indicates support for role switching through the "usb-role-switch" property, take the "role-switch-default-mode" property into account when deciding which role to put the controller into. This makes USB devices work on Apple M1 systems where the device tree may include a "dr_mode" property that is set to "otg", but where we need to put the controller into "host" mode to see devices connected to the type-C ports. Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
2022-05-20imx: imx8mm_edm_sbc: Enable SPL_DM_SERIALPeng Fan1-2/+0
Enable CONFIG_SPL_DM_SERIAL. uart and its pinmux was already marked with u-boot,dm-spl. Move preloader_console_init after spl_early_init to make sure driver model work. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-05-20imx: imx8mm_mx8menlo: Enable DM_SERIALPeng Fan1-3/+0
Enable CONFIG_DM_SERIAL. uart2 and its pinmux was already marked with u-boot,dm-spl. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-05-20configs: remove FEC_QUIRK_ENET_MAC from imx8m configsTim Harvey15-20/+0
FEC_QUIRK_ENET_MAC is defined in the imx-regs.h include file and thus does not need to be defined in the various board config includes. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2022-05-20configs: imx8mp_venice: add FEC_QUIRK_ENET_MACTim Harvey1-0/+4
The IMX8MP SoC FEC needs to have the FEC_QUIRK_ENET_MAC defined. Fixes: commit 2395625209cc ("board: gateworks: venice: add imx8mp-venice-gw740x support") Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2022-05-20configs: imx8m{m, n}_venice: remove unneeded CONFIG_FEC_MXC_PHYADDRTim Harvey2-2/+0
The IMX8M based Venice boards all have device-tree fec nodes that use proper dt with a phy-handle pointing to a phy with reg assigned to the proper phy address. There is no need to keep using the CONFIG_FEC_MXC_PHYADDR hack when a proper dt is used - remove it. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2022-05-20ARM: imx: imx27: Introduce and use UART_BASE_ADDR(n)Marek Vasut1-1/+1
Introduce helper macro UART_BASE_ADDR(n), which returns Nth UART base address. Convert all board configurations to this new macro. This is the first step toward switching CONFIG_MXC_UART_BASE to Kconfig. This is a clean up, no functional change. The new macro contains compile-time test to verify N is in suitable range. The test works such that it multiplies constant N by constant double-negation of size of a non-empty structure, i.e. it multiplies constant N by constant 1 in each successful compilation case. The non-empty structure may contain C11 _Static_assert(), make use of this and place the kernel variant of static assert in there, so that it performs the compile-time check for N in the correct range. Note that it is not possible to directly use static_assert in compound statements, hence this convoluted construct. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@denx.de> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
2022-05-20ARM: imx: imx8m: Introduce and use UART_BASE_ADDR(n)Marek Vasut21-21/+21
Introduce helper macro UART_BASE_ADDR(n), which returns Nth UART base address. Convert all board configurations to this new macro. This is the first step toward switching CONFIG_MXC_UART_BASE to Kconfig. This is a clean up, no functional change. The new macro contains compile-time test to verify N is in suitable range. The test works such that it multiplies constant N by constant double-negation of size of a non-empty structure, i.e. it multiplies constant N by constant 1 in each successful compilation case. The non-empty structure may contain C11 _Static_assert(), make use of this and place the kernel variant of static assert in there, so that it performs the compile-time check for N in the correct range. Note that it is not possible to directly use static_assert in compound statements, hence this convoluted construct. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@denx.de> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
2022-05-19i.MX6SX: crypto/fsl: fix entropy delay valueGaurav Jain1-1/+5
RNG Hardware error is reported due to incorrect entropy delay rng self test are run to determine the correct ent_dly. test is executed with different voltage and temperature to identify the worst case value for ent_dly. after adding a margin value(1000), ent_dly should be at least 12000. Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com> Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-05-18xilinx: zynqmp: Do not guard SPL_FS_LOAD_PAYLOAD_NAME by SDHCI driverMichal Simek1-2/+0
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME is used by set_dfu_alt_info() for string generation. It doesn't depend on SDHCI because the same file can be stored to other non volatile memories like qspi. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/97434e122c6f8f042330b60d3e8de4c31f3e3f93.1652192580.git.michal.simek@amd.com Link: https://lore.kernel.org/r/718de136c68c9a76fc7b4e536a727f401b05bfb9.1652702625.git.michal.simek@amd.com
2022-05-11Convert CONFIG_MTD_CONCAT to KconfigChris Packham2-2/+0
This converts the following to Kconfig: CONFIG_MTD_CONCAT Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Stefan Roese <sr@denx.de>
2022-05-10Merge tag 'u-boot-stm32-20220510' of ↵WIP/10May2022Tom Rini2-1/+10
https://source.denx.de/u-boot/custodians/u-boot-stm Add new STM32 MCU boards and Documentation STM32 programmer improvements video: support several LTDC HW versions and fix data enable polarity board: fix stboard error message, consider USB cable connected when boot device is USB configs: stm32mp1: set console variable for extlinux.conf configs: stm32mp1: add support for baudrate higher than 115200 for ST-Link ARM: stm32mp: Fix Silicon version handling and ft_system_setup() phy: stm32-usbphyc: Add DT phy tuning support arm: dts: stm32mp15: alignment with v5.18 ram: Conditionally enable ASR mach-stm32mp: psci: retain MCUDIVR, PLL3CR, PLL4CR, MSSCKSELR across suspend configs: Use TFTP_TSIZE on DHSOM and STMicroelectronics boards ARM: stm32: Use default CONFIG_TFTP_BLOCKSIZE on DHSOM pinctrl: stm32: rework GPIO holes management
2022-05-10configs: stm32f746-disco: use CONFIG_DEFAULT_DEVICE_TREE as fdtfilePatrice Chotard1-1/+1
As stm32f46-disco, stm32f769-disco and stm32746g-eval are very similar except their respective device tree file. These 3 boards uses the same TARGET_STM32F746_DISCO flag (so same include/configs/stm32f746-disco.h and same board file board/st/stm32f746-disco/stm32f746-disco.c) To be able to compile these 3 boards, replace the hard-coded device-tree name in include/configs/stm32f746-disco.h by CONFIG_DEFAULT_DEVICE_TREE which is set in each board defconfig file with the correct value. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-05-10configs: stm32f746-disco: Concatenate spl and u-boot binariesPatrice Chotard1-0/+1
This allows to concatenate spl and u-boot binaries together. Previously, both binaries has to be flashed separately at the correct offset (spl at offset 0 and u-boot at offset 0x8000). With this patch, only one binary is generated (u-boot-with-spl.bin) and has to be copied in flash at offset 0 using openocd for example or simply copied in exported mass storage. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-05-10configs: stm32mp1: Add support for baudrates higher than 115200 for st-linkPatrick Delaunay1-0/+5
On STMicroelectronics boards, the UART can reliably go up to 2000000 bauds when connected to the on-board ST-LINK-V2 for STM32MP15 Unfortunately U-Boot will fall back to 115200 unless higher rates are declared via CONFIG_SYS_BAUDRATE_TABLE. This patch add the support of higher baudrates on STMicroelectronics boards with ST-LINK. Cc: Alexandru Gagniuc <mr.nuke.me@gmail.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-05-10configs: stm32mp1: set the console variable for extlinux.confPatrick Delaunay1-0/+3
Set the environment variable "console", used in extlinux.conf file when it is generated by YOCTO distribution with: UBOOT_EXTLINUX_CONSOLE ??= "console=${console},${baudrate}" With these 2 variables, U-Boot give dynamically the used console and baudrate in the Linux kernel bootargs. For the STMicroelectronics boards, the used console is ttySTM0. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-05-09power: add driver for the TPS65219 PMICNeil Armstrong1-0/+46
The TPS65219 I2S PMIC features 3 Buck converters and 4 linear regulators, 2 GPOs, 1 GPIO, and 3 multi-function-pin. This adds the PMIC driver, loading the regulator sub-nodes. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2022-05-09Nokia RX-51: Convert to CONFIG_DM_SERIALPali Rohár1-1/+0
For CONFIG_DM_SERIAL it is required to increase CONFIG_SYS_MALLOC_F_LEN as default value is not enough for memory hungry CONFIG_DM_SERIAL code. Signed-off-by: Pali Rohár <pali@kernel.org> Tested-by: Merlijn Wajer <merlijn@wizzup.org>
2022-05-08Merge tag 'efi-2022-07-rc3-2' of ↵WIP/08May2022Tom Rini3-0/+32
https://source.denx.de/u-boot/custodians/u-boot-efi Pull request for efi-2022-07-rc3-2 UEFI: * Fix build errors due to - using sed with non-standard extension for regular expression - target architecture not recognized for CROSS_COMPILE=armv7a-* - CONFIG_EVENT not selected * add sha384/512 on certificate revocation Others: * factor out the user input handling in bootmenu command
2022-05-07efi_loader: add sha384/512 on certificate revocationIlias Apalodimas2-0/+12
Currently we don't support sha384/512 for the X.509 certificate in dbx. Moreover if we come across such a hash we skip the check and approve the image, although the image might needs to be rejected. Rework the code a bit and fix it by adding an array of structs with the supported GUIDs, len and literal used in the U-Boot crypto APIs instead of hardcoding the GUID types. It's worth noting here that efi_hash_regions() can now be reused from efi_signature_lookup_digest() and add sha348/512 support there as well Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2022-05-07bootmenu: factor out the user input handlingMasahisa Kojima1-0/+20
This commit moves the user input handling from cmd/bootmenu.c to common/menu.c to reuse it from other modules. Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org> Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-05-06disk: part_efi: add support to repair gpt tablePhilippe Reynes1-0/+10
If a gpt table is corrupted (after a power cut for example), then the gpt table should repaired. The function gpt_repair_headers check if at least one gpt table is valid, and then only write the corrupted gpt table. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2022-05-05lib/date: Make rtc_mktime and mktime64 Y2038-readyJan Kiszka2-6/+5
We currently overflow due to wrong types used internally in rtc_mktime, on all platforms, and we return a too small type on 32-bit. One consumer that directly benefits from this is mktime64. Many others may still store the result in a wrong type. While at it, drop the redundant cast of mon in rtc_mktime (obsoleted by 714209832db1). Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2022-05-05include: configs: am**x/j721e/j721s2_evm.h: Move the stack pointer init ↵Aswath Govindraju4-8/+4
address in arm64 Currently, in case of arm64 bootloader and U-Boot the stack pointer is initialized at an offset of NON_SECURE_MSRAM_SIZE from arm64 SPL's text base address. After jumping to arm64, execution is done out of DDR. Therefore, having an offset corresponding to the size of MSRAM does not have any significance. Instead, initialize the stack pointer after an offset of 4MB from the SPL text base address. This helps in allocating larger memory for stack. ┌────────────────────┐0x80080000 │ │ │ arm64 SPL │ ├────────────────────┤ │ ▲ │ │ │ │ │ STACK │ ├────────────────────┤0x80480000 │ Memory for Load │ │ Buffer Allocation │ ├────────────────────┤0x80800000 │ │ │ U-Boot Image │ │ │ └────────────────────┘ Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2022-05-05clk: nuvoton: Add support for NPCM750Jim Liu1-0/+46
Add clock controller driver for NPCM750 Signed-off-by: Jim Liu <JJLIU0@nuvoton.com> Signed-off-by: Stanley Chu <yschu@nuvoton.com> Reviewed-by: Sean Anderson <seanga2@gmail.com>
2022-05-05arm: nuvoton: Add support for Nuvoton NPCM750 BMCJim Liu2-0/+135
Add basic support for the Nuvoton NPCM750 EVB (Poleg). Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
2022-05-04Merge tag 'efi-2022-07-rc2-2' of ↵Tom Rini3-0/+63
https://source.denx.de/u-boot/custodians/u-boot-efi Pull request for efi-2022-07-rc2-2 * Test Unit test for 'bootmenu' command * UEFI Preparatory patches for implementing a UEFI boot options based menu
2022-05-04net: mdio-uclass: add dm_phy_find_by_ofnode() helperMarek Behún1-0/+9
Add helper to resolve PHY node from it's ofnode via DM MDIO subsystem. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
2022-05-04mips: octeon: ebb7304: Enable ethernet supportStefan Roese1-0/+2
This patch enables the Kconfig symbols needed for full ethernet support on the EBB7304. Also the PHY autonegotiation timeout is increased, as the default 5 seconds are sometime a bit short. With this, ethernet can be used on this board. Here an example of a tftp load: => tftp ffffffff81000000 big ethernet-mac-nexus@11800e0000000 Waiting for PHY auto negotiation to complete....... done Using ethernet-mac-nexus@11800e0000000 device TFTP from server 192.168.1.5; our IP address is 192.168.1.243 Filename 'big'. Load address: 0xffffffff81000000 Loading: ################################################## 10 MiB 13.2 MiB/s done Bytes transferred = 10485760 (a00000 hex) Signed-off-by: Stefan Roese <sr@denx.de>
2022-05-04mips: octeon: octeon_common.h: Move init SP because of increased image sizeStefan Roese1-1/+1
This patch moves CONFIG_SYS_INIT_SP_OFFSET to a higher address so that it does not interfere with larger U-Boot images. This was noticed, while adding network support to the EBB7304 board. Signed-off-by: Stefan Roese <sr@denx.de>
2022-05-03pci: Add mask parameter to dm_pci_map_bar()Andrew Scull1-1/+2
Add a mask parameter to control the lookup of the PCI region from which the mapping can be made. Signed-off-by: Andrew Scull <ascull@google.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2022-05-03pci: Update dm_pci_bus_to_virt() parametersAndrew Scull1-5/+11
Add mask parameter and reorder length parameter to match the other PCI address conversion functions. Using PCI_REGION_TYPE as the mask gives the old behaviour. It's converted from a macro to an inline function as the length parameter is now used twice, but should only be calculated once. Signed-off-by: Andrew Scull <ascull@google.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2022-05-03pci: Match region flags using a maskAndrew Scull1-8/+10
When converting addresses, apply a mask to the region flags during lookup. This allows the caller to specify which flags are important and which are not, for example to exclude system memory regions. The behaviour of the function is changed such that they don't preferentially search for a non-system memory region. However, system memory regions are added after other regions in decode_regions() leading to a similar outcome. Signed-off-by: Andrew Scull <ascull@google.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2022-05-03pci: Map bars with offset and lengthAndrew Scull1-1/+4
Evolve dm_pci_map_bar() to include an offset and length parameter. These allow a portion of the memory to be mapped and range checks to be applied. Passing both the offset and length as zero results in the previous behaviour and this is used to migrate the previous callers. Signed-off-by: Andrew Scull <ascull@google.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2022-05-03pci: Range check address conversionsAndrew Scull1-9/+11
When converting between PCI bus and physical addresses, include a length parameter that can be used to check that the entire range fits within one of the PCI regions. This prevents an address being returned that might be only partially valid for the range it is going to be used for. Where the range check is not wanted, passing a length of 0 will have the same behaviour as before this change. Signed-off-by: Andrew Scull <ascull@google.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2022-05-03pci: Fix use of flags in dm_pci_map_bar()Andrew Scull1-1/+1
The flags parameter of dm_pci_map_bar() is used for PCI region flags rather than memory mapping flags. Fix the type to match that of the region flags and stop using the regions flags as memory mapping flags. Signed-off-by: Andrew Scull <ascull@google.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>