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2021-08-02global: Convert simple_strtoul() with decimal to dectoul()Simon Glass1-0/+13
It is a pain to have to specify the value 10 in each call. Add a new dectoul() function and update the code to use it. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-08-02global: Convert simple_strtoul() with hex to hextoul()Simon Glass1-3/+25
It is a pain to have to specify the value 16 in each call. Add a new hextoul() function and update the code to use it. Add a proper comment to simple_strtoul() while we are here. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-08-01sandbox: Reduce keyed autoboot delaySimon Glass1-0/+36
The autoboot tests are a recent addition to U-Boot, providing much-needed coverage in this area. A side effect of the keyed autoboot test is that this feature is enabled in sandbox always. This changes the autoboot prompt and confuses the pytests. Some tests become slower, for example the vboot tests take about 27s now instead of 3s. We don't actually need this feature enabled to be able to run the tests. Add a switch to allow sandbox to turn it on and off as needed. Use this in the one test that needs it. Add a command-line flag in case this is desired in normal use. Signed-off-by: Simon Glass <sjg@chromium.org> Fixes: 25c8b9f298e ("test: add first autoboot unit tests") Reviewed-by: Steffen Jaeckel <jaeckel-floss@eyet-services.de>
2021-08-01sandbox: tpm: Support nvdata in TPM2Simon Glass1-0/+2
Add support for this feature in the TPM2 emulator, to support Chromium OS vboot. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-31Merge https://source.denx.de/u-boot/custodians/u-boot-sunxiTom Rini1-0/+10
- Move the PSCI runtime code for H3/A23/A33 into SRAM - Pick the environment from the actual MMC boot device (SD card vs. eMMC) - Plus a small improvement from Icenowy, just for good measure.
2021-08-01sunxi: A23/A33/H3: Move sun8i secure monitor to SRAM A2Samuel Holland1-0/+10
So far for the H3, A23, and A33 SoCs, we use DRAM to hold the secure monitor code (providing PSCI runtime services). And while those SoCs do not have the secure SRAM B like older SoCs, there is enough (secure) SRAM A2 to put the monitor code and data in there instead. Follow the design of 64-bit SoCs and use the first part for the monitor, and the last 16 KiB for the SCP firmware. With this change, the monitor no longer needs to reserve a region in DRAM. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> [Andre: amend commit message, fix R40 and V3s build] Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-07-31arm: kirkwood: Dreamplug: Add DM SATA and remove IDE configsTony Dinh1-2/+10
- Enable DM SATA, removed IDE driver, and add SATA MV driver. - Use ethernet PHY names from device tree in default boot command Signed-off-by: Tony Dinh <mibodhi@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
2021-07-31arm: mvebu: Remove unused macro CONFIG_SYS_U_BOOT_OFFSPali Rohár11-50/+2
Macro CONFIG_SYS_U_BOOT_OFFS is set but not used anymore. Remove it. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
2021-07-31arm: mvebu: Load U-Boot proper binary in SPL code based on kwbimage headerPali Rohár11-23/+16
Now that proper load and execution addresses are set in v1 kwbimage we can use it for loading and booting U-Boot proper. Use the new spl_parse_board_header() function to implement parsing the kwbimage v1 header. Use information from this header to locate offset and size of the U-Boot proper binary, instead of using the legacy U-Boot header which is prepended to the U-Boot proper binary stored at fixed offset. This has the advantage that we do not need to relay on legacy U-Boot header anymore and therefore U-Boot proper binary can be stored at any offset, as is the case when loading & booting U-Boot proper by BootROM. The CONFIG_SYS_U_BOOT_OFFS option is therefore not used by SPL code anymore. Also allow to compile U-Boot SPL without CONFIG_SPL_SPI_FLASH_SUPPORT, CONFIG_SPL_MMC_SUPPORT or CONFIG_SPL_SATA_SUPPORT set. In this case BootROM is used for loading and executing U-Boot proper. This reduces the size of U-Boot's SPL image. By default these config options are enabled and so BootROM loading is not used. In some cases BootROM reads from SPI NOR at lower speed than U-Boot SPL. So people can decide whether they want to have smaller SPL binary at the cost of slower boot. Therefore dependency on CONFIG_SPL_DM_SPI, CONFIG_SPL_SPI_FLASH_SUPPORT, CONFIG_SPL_SPI_LOAD, CONFIG_SPL_SPI_SUPPORT, CONFIG_SPL_DM_GPIO, CONFIG_SPL_DM_MMC, CONFIG_SPL_GPIO_SUPPORT, CONFIG_SPL_LIBDISK_SUPPORT, CONFIG_SPL_MMC_SUPPORT, CONFIG_SPL_SATA_SUPPORT and CONFIG_SPL_LIBDISK_SUPPORT is changed from strict to related "imply" (which can be selectivelly turned off and causes booting via BootROM). Options CONFIG_SYS_SPI_U_BOOT_OFFS, CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR and CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET have to to be set to zero as they define the location where kwbimage header starts. It is the location where BootROM expects start of the kwbimage from which it reads, parses and executes SPL part. The same applies to option CONFIG_SPL_SATA_RAW_U_BOOT_SECTOR, which has to be set to one. Update all config files to set correct values of these options and set CONFIG_SYS_U_BOOT_OFFS to the correct value - the offset where U-Boot proper starts. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
2021-07-31SPL: Add support for specifying offset between header and imagePali Rohár1-0/+1
Some image types (e.g. kwbimage v1) store the offset to SPL binary and offset to U-Boot proper binary in their headers. To avoid reading SPL binary when loading U-Boot proper, add support for specifying offset in struct spl_image_info, which defines the offset from the beginning of the header and the beginning of the executable data. Initial support is added only for SPI, MMC and SATA code. We can extend it later if needed. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
2021-07-29Merge branch '2021-07-28-assorted-fixes'Tom Rini1-0/+1
- Assorted bugfixes
2021-07-29Merge tag 'ti-v2021.10-rc2' of ↵WIP/29Jul2021Tom Rini9-15/+207
https://source.denx.de/u-boot/custodians/u-boot-ti - Add MMC High speed modes for AM64 and J7200 - Add Sierra/Torrent SERDES driver - Minor clean-ups for R5F boot from SPL
2021-07-28arm64: Update memcpy_{from, to}io() helpersPatrice Chotard1-0/+1
At early U-Boot stage, before relocation, MMU is not yet configured and disabled. DDR may not be configured with the correct memory attributes (can be configured in MT_DEVICE instead of MT_MEMORY). In this case, usage of memcpy_{from, to}io() may leads to synchronous abort in AARCH64 in case the normal memory address is not 64Bits aligned. To avoid such situation, forbid usage of normal memory cast to (u64 *) in case MMU is not enabled. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Cc: mark.kettenis@xs4all.nl Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-07-28i2c: Rename SPL/TPL_I2C_SUPPORT to I2CSimon Glass6-6/+6
Rename these options so that CONFIG_IS_ENABLED can be used with them. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de>
2021-07-28i2c: Drop unused CONFIG_I2CSimon Glass3-3/+0
This actually does nothing but is defined by a few dozen boards. Drop it, so we can define a real one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de>
2021-07-28i2c: Rename CONFIG_SYS_I2C to CONFIG_SYS_I2C_LEGACYSimon Glass89-93/+93
It is quite confusing that CONFIG_SYS_I2C selects the legacy I2C and CONFIG_DM_I2C selects the current I2C. The deadline to migrate I2C is less than a year away. Also we want to have a CONFIG_I2C for U-Boot proper just like we have CONFIG_SPL_I2C for SPL, so we can simplify the Makefile rules. Rename this symbol so it is clear it is going away. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de>
2021-07-28Rename DRIVERS_MISC_SUPPORT to DRIVERS_MISCSimon Glass7-7/+7
Rename these options so that CONFIG_IS_ENABLED can be used with them. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-28Rename GPIO_SUPPORT to GPIOSimon Glass3-3/+3
Rename these options so that CONFIG_IS_ENABLED can be used with them. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-28Rename SPL_USB_HOST_SUPPORT to SPL_USB_HOSTSimon Glass1-1/+1
Rename this option so that CONFIG_IS_ENABLED can be used with it. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-28Rename SPL_WATCHDOG_SUPPORT to SPL_WATCHDOGSimon Glass6-6/+6
Rename this option so that CONFIG_IS_ENABLED can be used with it. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-28Rename SPL_ETH_SUPPORT to SPL_ETHSimon Glass1-1/+1
Rename this option so that CONFIG_IS_ENABLED can be used with it. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-28Rename SPL_POWER_SUPPORT to SPL_POWERSimon Glass3-3/+3
Rename this option so that CONFIG_IS_ENABLED can be used with it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-07-28Allow efi_loader header to be included alwaysSimon Glass1-91/+94
It is bad practice to put function declarations behind an #ifdef since it makes it impossible to use IS_ENABLED() in the C code. The main reason for doing this is when an empty static inline function is desired when the feature is disabled. To this end, this header provides two different versions of various functions and macros. Collect them together in one place for clarity. Allow all the rest of the header to be included, regardless of the setting of EFI_LOADER. With the inclusion of blk.h the 'struct blk_desc' declaration is unnecessary. Drop it while we are here. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-27lib: strto: add simple_strtoll functionRoland Gaudig1-0/+1
Add simple_strtoll function for converting a string containing digits into a long long int value. Signed-off-by: Roland Gaudig <roland.gaudig@weidmueller.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-07-27Merge tag 'u-boot-amlogic-20210727' of ↵WIP/27Jul2021Tom Rini1-0/+2
https://source.denx.de/u-boot/custodians/u-boot-amlogic - Add SMBIOS info for Khadas VIM boards - Fix meson-axg-mipi PHY build - Fix VIM3 board phy-names property setup - Return correct value for non emmc boot sources on VIM3 - add kernel compression vars
2021-07-27meson64: add kernel compression varsArtem Lapkin1-0/+2
make possible to load simple compressed linux kernel for meson64 Signed-off-by: Artem Lapkin <art@khadas.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-07-27spl: Introduce spl_board_prepare_for_optee() hookAlexandru Gagniuc1-0/+14
OP-TEE requires some particular setup, which is not needed for linux or other payloads. Add a hook for platform-specific code to perform any OP-TEE related configuration and initialization. A weak function is used because it is symmetrical to other spl_board_prepare_for_*() implementations. A solution to avoid the use of weak functions would trivially apply to all these implementations. However, re-designing this is beyond the scope of this patch. Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-07-27arm: mach-k3: j721e: Cleanup MAIN R5 boot code from R5 SPLSuman Anna1-2/+0
The common J7 specific start_non_linux_remote_cores() override function implements the logic to load and boot the Main R5FSS Core0 from R5 SPL. This won't be supported any more for either J721E or J7200 after the R5 SPL rearchitecture for the System Firmware split into TI Foundation Security (TIFS) and Device Management (DM) firmwares. So, cleanup the corresponding code and the related SPL env variables. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Link: https://lore.kernel.org/r/20210726211311.5977-3-s-anna@ti.com
2021-07-27arm: mach-k3: j721e: Move booting of Main R5FSS Core0 to A72 U-BootSuman Anna1-0/+1
The Main R5FSS Core0 on J721E SoCs is originally booted from R5 SPL itself to achieve certain product-level early-boot metrics. This is no longer supported after the R5 SPL re-architecture (support merged for v2021.10-rc1). Move the booting of this core altogether from R5 SPL to A72 U-Boot. The env variables are left as is for now, and will be cleaned up in a subsequent patch. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Link: https://lore.kernel.org/r/20210726211311.5977-2-s-anna@ti.com
2021-07-27configs: am64x_evm: Move CONFIG_SYS_MMC_ENV_DEV and CONFIG_SYS_MMC_ENV_PART ↵Aswath Govindraju1-6/+0
to defconfig files and enable configs to save env in eMMC and FAT write. Kconfig symbols for SYS_MMC_ENV_DEV and SYS_MMC_ENV_PART have been added by commit 7d080773347c1f6e0e896d9284134a2a411155d6. Therefore, move the definitions of configs to corresponding board defconfig files and enable configs to save env in eMMC. Also enable config for FAT write in U-Boot. Fixes: 33b7258947f4 ("board: ti: am64x: Add board support for am64x evm") Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Link: https://lore.kernel.org/r/20210726152807.22991-5-a-govindraju@ti.com
2021-07-27env: ti: j721e-evm: Add env variable to power on & reset QSGMII PHY in J7200 EVMKishon Vijay Abraham I1-0/+14
MAIN CPSW0 requires the PHY to be powered on and reset for QSGMII operation. Add a env variable to configure driving "0" on ENET_EXP_PWRDN controlled by GPIO EXPANDER2 (I2C Addr: 0x22), PIN: 17 and driving "1" on ENET_EXP_RESETZ controlled by GPIO EXPANDER2 (I2C Addr: 0x22), PIN: 18. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Suman Anna <s-anna@ti.com> Link: https://lore.kernel.org/r/20210721155849.20994-18-kishon@ti.com
2021-07-27dt-bindings: ti-serdes-mux: Add defines for AM64 SoCKishon Vijay Abraham I1-0/+5
AM64 has a single lane SERDES which can be configured to be used with either PCIe or USB. Define the possilbe values for the SERDES function in AM64 SoC here. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Link: https://lore.kernel.org/r/20210721155849.20994-7-kishon@ti.com
2021-07-27dt-bindings: phy: cadence-torrent: Add defines for refclk driverKishon Vijay Abraham I1-0/+20
Add defines for refclk driver used to route the refclk out of torrent SERDES. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Link: https://lore.kernel.org/r/20210721155849.20994-6-kishon@ti.com
2021-07-27dt-bindings: phy: Add defines for AM64 SERDES WrapperKishon Vijay Abraham I1-0/+21
Add defines for AM64 SERDES Wrapper. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Link: https://lore.kernel.org/r/20210721155849.20994-5-kishon@ti.com
2021-07-27dt-bindings: phy: Add definitions for additional phy typesAswath Govindraju1-0/+1
Add definitions for additional phy types that's used specifically for Torrent SERDES. Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Link: https://lore.kernel.org/r/20210721155849.20994-4-kishon@ti.com
2021-07-27dm: core: Add helper to compare node namesKishon Vijay Abraham I1-0/+10
Add helper to compare node names. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Link: https://lore.kernel.org/r/20210721155849.20994-2-kishon@ti.com
2021-07-27dt-bindings: Resync omap & am33xx pinctrl bindingsPaul Barker2-7/+135
These headers are updated to match the versions in Linux 5.13.1. Signed-off-by: Paul Barker <paul.barker@sancloud.com>
2021-07-26xilinx: Define kernel_comp_addr_r,kernel_comp_size env variablesRaju Kumar Pothuraju2-0/+4
Add kernel_comp_addr_r, kernel_comp_size env variables for zynqmp and versal to be able to use the compressed kernel Image(.gz,.bz2,.lzma,.lzo) using booti command. Signed-off-by: Raju Kumar Pothuraju <raju.kumar-pothuraju@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-07-26arm64: versal: Drop default definitions of CONFIG_SYS_PBSIZEMichal Simek1-2/+0
It is default value which had been converted by commit 432e39806805 ("include/configs: drop default definitions of CONFIG_SYS_PBSIZE"). That's why also remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-07-26net: ethtool: Add ethernet speed macros for higher speedsAshok Reddy Soma1-0/+8
Add speed macro's for higher ethernet speeds to be used in u-boot networking drivers. Added Macros for speeds 14G, 20G, 25G, 40G, 50G, 56G, 100G and 200G inline with linux. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Ramon Fried <rfried.dev@gmail.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-07-26mmc: zynq_sdhci: Split set_tapdelay function to in and outAshok Reddy Soma1-3/+4
Split arasan_zynqmp_set_tapdelay() to handle input and output tapdelays separately. This is required to handle zero values for ITAP and OTAP values. If we dont split, we will have to remove the if() in the function, which makes ITAP values to be overwritten when OTAP values are called to set and vice-versa. Restrict tap_delay value calculated to max allowed 8 bits for ITAP and 6 bits for OTAP for ZynqMP. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-07-26xilinx: zynqmp: increase CONFIG_SYS_SPL_MALLOC_SIZE to 16MBRicardo Salveti1-1/+1
commit 03f1f78a9b44 ("spl: fit: Prefer a malloc()'d buffer for loading images")' changed the way buffer allocation worked for SPL to a more flexible method. For xilinx zynqmp the 1MB buffer is not necessarily enough when dealing with complex fit images (e.g. containing FPGA/TF-A/OP-TEE/U-Boot proper), which can easily reach up to 10MB, so increase the default CONFIG_SYS_SPL_MALLOC_SIZE size to 16MB to cover more advanced scenarios. Signed-off-by: Ricardo Salveti <ricardo@foundries.io> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-07-24Merge tag 'efi-2021-10-rc1-3' of ↵WIP/24Jul2021Tom Rini3-6/+6
https://source.denx.de/u-boot/custodians/u-boot-efi Pull request for efi-2021-10-rc1-3 Documentation: provide Makefile documentation SMBIOS: generate BIOS release date based on UEFI version improve error handling in SMBIOS table generation UEFI: correct handling of signed capsule if authentication if off
2021-07-24efi_loader: remove asm/setjmp.h from efi_api.hAKASHI Takahiro2-4/+1
In the commit c982874e930d ("efi_loader: refactor efi_setup_loaded_image()"), setjmp-related definitions were moved to efi_loaded_image_obj in efi_loader.h. So setjmp.h is no longer refererenced in efi_api.h. This also fixes some error when efi_api.h will be included in mkeficapsule.c. Fixes: c982874e930d ("efi_loader: refactor efi_setup_loaded_image()") Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-07-24smbios: error handling for invalid addressesHeinrich Schuchardt1-2/+5
SMBIOS tables only support 32bit addresses. If we don't have memory here handle the error gracefully: * on x86_64 fail to start U-Boot * during UEFI booting ignore the missing table Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-07-23board: dragonboard410c: Fix PHYS_SDRAM_1_SIZEStephan Gerhold1-2/+2
The DragonBoard 410c has proprietary firmware from Qualcomm that reserves 8 MiB of memory for tz/smem/hyp/rmtfs/rfsa from 0x86000000 to 0x86800000. I'm not aware of any ATF (ARM Trusted Firmware) port for DB410c that would reserve 30 MiB of memory at the end of RAM. I suspect the comment might have been copied from hikey.h which has a very similar comment (and which actually does have an ATF port). Reducing the memory size just prevents U-Boot from using the end of the RAM, not the reserved region inbetween. Therefore we might as well display the correct DRAM size (1 GiB) instead of strange 986 MiB. Fixes: 626f048bbc14 ("board: Add Qualcomm Dragonboard 410C support") Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-07-23board: dragonboard410c: Load U-Boot directly without LKStephan Gerhold1-0/+3
At the moment the U-Boot port for the DragonBoard 410c is designed to be loaded as an Android boot image after Qualcomm's Little Kernel (LK) bootloader. This is simple to set up but LK is redundant in this case, since everything done by LK can be also done directly by U-Boot. Dropping LK entirely has at least the following advantages: - Easier installation/board code (no need for Android boot images) - (Slightly) faster boot - Boot directly in 64-bit without a round trip to 32-bit for LK So far this was not possible yet because of unsolved problems: 1. Signing tool: The firmware expects a "signed" ELF image with extra (Qualcomm-specific) ELF headers, usually used for secure boot. The DragonBoard 410c does not have secure boot by default but the extra ELF headers are still required. 2. PSCI bug: There seems to be a bug in the PSCI implementation (part of the TrustZone/tz firmware) that causes all other CPU cores to be started in 32-bit mode if LK is missing in the boot chain. This causes Linux to hang early during boot. There is a solution for both problems now: 1. qtestsign (https://github.com/msm8916-mainline/qtestsign) can be used as a "signing" tool for U-Boot and other firmware. 2. A workaround for the "PSCI bug" is to execute the TZ syscall when entering U-Boot. That way PSCI is made aware of the 64-bit switch and starts all other CPU cores in 64-bit mode as well. Simplify the dragonboard410c board by removing all the extra code that is only used to build an Android boot image that can be loaded by LK. This allows dropping the custom linker script, special image magic, as well as most of the special build/installation instructions. CONFIG_REMAKE_ELF is used to build a new ELF image that has both U-Boot and the appended DTB combined. The resulting u-boot.elf can then be passed to the "signing" tool (e.g. qtestsign). The PSCI workaround is placed in the "boot0" hook that is enabled with CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK. The extra check for EL1 allows compatibility with custom firmware that enters U-Boot in EL2 or EL3, e.g. qhypstub (https://github.com/msm8916-mainline/qhypstub). As a first step these changes apply only to DragonBoard410c. Similar changes could likely also work for the DragonBoard 820c. Note that removing LK wouldn't be possible that easily without a lot of work already done three years ago by Ramon Fried. A lot of missing initialization, pinctrl etc was already added back then even though it was not strictly needed yet. Cc: Ramon Fried <rfried.dev@gmail.com> Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
2021-07-23configs: synquacer: Remove mtdparts settings and update DFU settingMasami Hiramatsu1-1/+1
Since MTD partitions are based on the devicetree name, remove unneeded mtdparts settings and update DFU setting. Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
2021-07-23test: add first autoboot unit testsSteffen Jaeckel3-0/+33
This adds tests for the crypt-based and plain SHA256-based password hashing algorithms in the autoboot flow. Signed-off-by: Steffen Jaeckel <jaeckel-floss@eyet-services.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-07-23lib: wrap crypt API to hide errno usageSteffen Jaeckel1-1/+2
In order to prevent using the global errno, replace it with a static version and create a wrapper function which returns the error value. Signed-off-by: Steffen Jaeckel <jaeckel-floss@eyet-services.de> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de>