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Age	Commit message (Collapse)	Author	Files	Lines
2010-07-26	powerpc/8xxx: Enable DDR3 RDIMM support	york	1	-0/+14
	Enabled registered DIMMs using data from SPD. RDIMMs have registers which need to be configured before using. The register configuration words are stored in SPD byte 60~116 (JEDEC standard No.21-C). Software should read those RCWs and put into DDR controller before initialization. Signed-off-by: York Sun <yorksun@freescale.com>
2009-03-30	fsl-ddr: add the DDR3 SPD infrastructure	Dave Liu	1	-1/+12
	- support mirrored DIMMs, not support register DIMMs - test passed on P2020DS board with MT9JSF12872AY-1G1D1 - test passed on MPC8569MDS board with MT8JSF12864HY-1G1D1 Signed-off-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Travis Wheatley <travis.wheatley@freescale.com>
2008-08-27	Add proper SPD definitions for DDR1/2/3	James Yang	1	-0/+292
	Also adds helper functions for DDR1/2 to verify the checksum. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>