aboutsummaryrefslogtreecommitdiff
path: root/drivers
AgeCommit message (Collapse)AuthorFilesLines
2023-04-27ide: Use mdelay() for long delaysSimon Glass1-14/+11
Rather than using very large numbers with udelay(), use mdelay(), which is easier to follow. Signed-off-by: Simon Glass <sjg@chromium.org>
2023-04-27ide: Move ATA_CURR_BASE to C fileSimon Glass1-0/+3
This is not used outside one C file. Move it out of the header to reduce its visbility. Signed-off-by: Simon Glass <sjg@chromium.org>
2023-04-26virtio: Ensure PCI is set up firstSimon Glass1-0/+6
Sometimes virtio may rely on PCI, or at least that is what the distro_bootcmd script suggests. Add this in. Signed-off-by: Simon Glass <sjg@chromium.org>
2023-04-25gpio-uclass: fix off-by-one in gpio_request_list_by_name_nodev()Rasmus Villemoes1-1/+1
By the time we jump to the err label, count represents the number of gpios we've successfully requested. So by subtracting one, we fail to free the most recently requested. Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-04-25xen: Limit execution to EL1 onlyMichal Simek1-0/+7
Xen core_init() is calling HVC which should be called from EL1 level that's why do Xen initialization only when U-Boot runs in EL1. Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-04-25ata: pci: enable bus masteringChristian Gmeiner1-1/+6
The non DM code path already would enable pci bus mastering. Do the same for the DM code path. Fixes AHCI problems I am seeing on an Intel Apollolake device. Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> [trini: Use ahci_dev not dev in the calls] Signed-off-by: Tom Rini <trini@konsulko.com>
2023-04-25sysreset: psci: add psci_sysreset_get_statusPeng Fan1-0/+6
Add weak function psci_sysreset_get_status for platform to define their own reset status with CONFIG_SYSRESET enabled. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-04-25sysreset: psci: enable DM_FLAG_PRE_RELOCPeng Fan1-0/+1
It is possible that cpu core may reset before relocation with PSCI reset Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-04-25firmware: psci: enable DM_FLAG_PRE_RELOCPeng Fan1-0/+1
It is possible that cpu core may reset before relocation with PSCI reset Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-04-25xen: Fix Kconfig dependenciesMichal Simek1-1/+1
XEN config can be enabled by other platforms (even it doesn't need to make sense) that's why fix dependencies. XEN (xenbus.c) requires sscanf (also pvblock needs it). And PVBLOCK is inside drivers/xen folder which requires XEN to be enabled. Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2023-04-25usb: gadget: f_mass_storage: Rework do_request_sense slightlyTom Rini1-2/+1
When building with clang, it notes that sdinfo may be unused uninitialized in some cases. This appears to be true from reading the code, and we can simply set the variable to zero to start with and be as correct as before. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Marek Vasut <marex@denx.de>
2023-04-25soc: soc_ti_k3: fix revision array bounds checksRasmus Villemoes1-2/+2
If rev is equal to the array size, we'll access the array one-past-the-end. Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Reviewed-by: Bryan Brattlof <bb@ti.com>
2023-04-25virtio: Use bounce buffers when VIRTIO_F_IOMMU_PLATFORM is setWIP/2023-04-25-use-bounce-buffers-for-VIRTIO_F_IOMMU_PLATFORMWill Deacon1-1/+47
Devices advertising the VIRTIO_F_IOMMU_PLATFORM feature require platform-specific handling to configure their DMA transactions. When handling virtio descriptors for such a device, use bounce buffers to ensure that the underlying buffers are always aligned to and padded to PAGE_SIZE in preparation for platform specific handling at page granularity. Signed-off-by: Will Deacon <willdeacon@google.com> [ Paul: pick from the Android tree. Rebase to the upstream ] Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org> Cc: Bin Meng <bmeng.cn@gmail.com> Link: https://android.googlesource.com/platform/external/u-boot/+/1eff171e613ee67dca71dbe97be7282e2db17011 Reviewed-by: Simon Glass <sjg@chromium.org>
2023-04-25virtio: Allocate bounce buffers for devices with VIRTIO_F_IOMMU_PLATFORMWill Deacon1-5/+20
In preparation for bouncing virtio data for devices advertising the VIRTIO_F_IOMMU_PLATFORM feature, allocate an array of bounce buffer structures in the vring, one per descriptor. Signed-off-by: Will Deacon <willdeacon@google.com> [ Paul: pick from the Android tree. Rebase to the upstream ] Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org> Cc: Bin Meng <bmeng.cn@gmail.com> Link: https://android.googlesource.com/platform/external/u-boot/+/3e052749e7c50c4c1a6014e645ae3b9be3710c07 Reviewed-by: Simon Glass <sjg@chromium.org>
2023-04-25virtio: Add helper functions to attach/detach vring descriptorsWill Deacon1-0/+6
Move the attach and detach logic for manipulating vring descriptors out into their own functions so that we can later extend these to bounce the data for devices with VIRTIO_F_IOMMU_PLATFORM set. Signed-off-by: Will Deacon <willdeacon@google.com> [ Paul: pick from the Android tree. Rebase to the upstream ] Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org> Cc: Bin Meng <bmeng.cn@gmail.com> Link: https://android.googlesource.com/platform/external/u-boot/+/f73258a4bfe968c5f935db45f2ec5cc0104ee796 Reviewed-by: Simon Glass <sjg@chromium.org>
2023-04-25virtio: Allocate virtqueue in page-size unitsWill Deacon1-4/+20
In preparation for explicit bouncing of virtqueue pages for devices advertising the VIRTIO_F_IOMMU_PLATFORM feature, introduce a couple of wrappers around virtqueue allocation and freeing operations, ensuring that buffers are handled in terms of page-size units. Signed-off-by: Will Deacon <willdeacon@google.com> [ Paul: pick from the Android tree. Rebase to the upstream ] Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org> Cc: Bin Meng <bmeng.cn@gmail.com> Link: https://android.googlesource.com/platform/external/u-boot/+/b4bb5227d4cf4fdfcd8b4e1ff2692d3a54d1482a Reviewed-by: Simon Glass <sjg@chromium.org>
2023-04-25virtio: pci: Tear down VQs in virtio_pci_reset()Will Deacon1-19/+19
The pages backing the virtqueues for virtio PCI devices are not freed on reset, despite the virtqueue structure being freed as part of the driver '->priv_auto' destruction at ->remove() time. Call virtio_pci_del_vqs() from virtio_pci_reset() to free the virtqueue pages before freeing the virtqueue structure itself. Signed-off-by: Will Deacon <willdeacon@google.com> [ Paul: pick from the Android tree. Rebase to the upstream ] Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org> Cc: Bin Meng <bmeng.cn@gmail.com> Link: https://android.googlesource.com/platform/external/u-boot/+/5ed54ccd83cbffd0d8719ce650604b4e44b5b0d8 Reviewed-by: Simon Glass <sjg@chromium.org>
2023-04-25virtio: Expose VIRTIO_F_IOMMU_PLATFORM in device featuresWill Deacon1-1/+1
If we detect the VIRTIO_F_IOMMU_PLATFORM transport feature for a device, then expose it in the device features. Signed-off-by: Will Deacon <willdeacon@google.com> [ Paul: pick from the Android tree. Rebase to the upstream ] Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org> Cc: Bin Meng <bmeng.cn@gmail.com> Link: https://android.googlesource.com/platform/external/u-boot/+/9693bd26bfcfe77d6a1295a561420e08c5daf019 Reviewed-by: Simon Glass <sjg@chromium.org>
2023-04-24remoteproc: ti_k3_arm64: Change the startup of arm64 coreManorit Chawdhry1-20/+42
Configuring master firewalls require the power of the cluster to be enabled before configuring them, change the load of rproc to configure the gtc clocks and start the cluster along with configuring the boot vector. The start of rproc will only start the core. Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
2023-04-24arm: mach-k3: Remove empty sys_proto.h includeAndrew Davis2-2/+0
This header file is now empty, remove it. Signed-off-by: Andrew Davis <afd@ti.com> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2023-04-24arm: mach-k3: Move sdelay() and wait_on_value() declarationAndrew Davis1-0/+4
These probably should be in some system wide header given their use. Until then move them out of K3 sys_proto.h so we can finish cleaning that header out. Signed-off-by: Andrew Davis <afd@ti.com> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2023-04-24soc: soc_ti_k3: Use hardware.h to remove definition duplicationAndrew Davis2-22/+10
The K3 JTAG and SoC ID information is already stored in the K3 arch hardware file, include that and use its definitions here. Signed-off-by: Andrew Davis <afd@ti.com> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2023-04-23Merge tag 'u-boot-rockchip-20230421' of ↵WIP/23Apr2023Tom Rini27-227/+2725
https://source.denx.de/u-boot/custodians/u-boot-rockchip - Add rk3588 evb support; - Update pinctrl for rk3568 and rk3588; - Update rk3288 dts; - Update mmc support for rk3568 and rk3588; - Add rng support for rk3588; - Add DSI support for rk3568; - Some other misc fixes in dts, config, driver;
2023-04-22Merge https://source.denx.de/u-boot/custodians/u-boot-riscvTom Rini29-1/+5383
* Add StarFive VisionFive v2 Board support * Support CONFIG_REMAKE_ELF * Code cleanups for RISC-V architecture
2023-04-22Merge https://source.denx.de/u-boot/custodians/u-boot-watchdogTom Rini5-0/+414
- watchdog: arm_smc_wdt: add watchdog support (Lionel) - watchdog: ftwdt010: return a previously deleted driver now ported to DM (Sergei) - watchdog: Add a watchdog driver for Raspberry Pi boards (Etienne)
2023-04-22Merge tag 'u-boot-stm32-20230419' of ↵Tom Rini4-29/+22
https://source.denx.de/u-boot/custodians/u-boot-stm configs: _ Add usb_pgood_delay for ST boards _ increase malloc size for pre-reloc for stm32mp15 _ Set CONFIG_USB_HUB_DEBOUNCE_TIMEOUT=2s for stm32mp15 dts: _ Add QSPI support on STM32MP13x SoC family _ Add FMC support on STM32MP13x SoC family drivers/machine: _ pinctrl_stm32: Add slew rate support for stm32_pinctrl_get_pin_muxing() _ spi: stm32_qspi: Remove useless struct stm32_qspi_flash _ rawnand: stm32_fmc2: remove unsupported EDO mode _ stm32mp: fix various array bounds checks
2023-04-22mtd: rawnand: nand_base: Handle algorithm selectionLinus Walleij1-4/+25
For BRCMNAND with 1-bit BCH ECC (BCH-1) such as used on the D-Link DIR-885L and DIR-890L routers, we need to explicitly select the ECC like this in the device tree: nand-ecc-algo = "bch"; nand-ecc-strength = <1>; nand-ecc-step-size = <512>; This is handled by the Linux kernel but U-Boot core does not respect this. Fix it up by parsing the algorithm and preserve the behaviour using this property to select software BCH as far as possible. Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Acked-by: William Zhang <william.zhang@broadcom.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Tested-by: Tom Rini <trini@konsulko.com> [am335x_evm] Link: https://lore.kernel.org/all/20230407134008.1939717-3-linus.walleij@linaro.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2023-04-22Revert "mtd: rawnand: nand_base: Handle algorithm selection"Dario Binacchi1-9/+3
It will be replaced by a more recent version which contains fixes for tests run by Tom Rini. This reverts commit ff33d3c87c2a1ab576607c2f67a9cb7690a4e7ca. Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2023-04-21mmc: rockchip_sdhci: Limit number of blocks read in a single commandJonas Karlman1-0/+8
Using DMA to load TF-A into SRAM fails when booting from eMMC on RK3588. ## Checking hash(es) for Image atf-3 ... sha256 error! Bad hash value for 'hash' hash node in 'atf-3' image node spl_load_simple_fit: can't load image loadables index 2 (ret = -1) mmc_load_image_raw_sector: mmc block read error Fix this by using PIO mode in SPL and limit the number of blocks used in a single read command to avoid triggering Data End Bit Error interrupt. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-04-21mmc: sdhci: Allow disabling of SDMA in SPLPeter Geis2-4/+12
Rockchip emmc devices have a similar issue to Rockchip dwmmc devices, where performing DMA to SRAM later causes issues with suspend/resume. Allow us to toggle SDMA in SPL for sdhci similar to ADMA support, so we can ensure DMA is not used when loading the SRAM code. Signed-off-by: Peter Geis <pgwipeout@gmail.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> [jonas@kwiboo.se: add Kconfig default value and fix ADMA typo] Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
2023-04-21clk: rockchip: rk3588: Add limited TMCLK_EMMC clock supportJonas Karlman1-0/+2
The device tree sdhci node reference the TMCLK_EMMC clock, add limited support this clock to rk3588 cru driver. Fixes probe of sdhci driver. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-04-21mmc: rockchip_sdhci: Add support for RK3588Jonas Karlman1-4/+53
Add support for RK3588 to the rockchip sdhci driver. Use driver data to handle differences between RK3568 and RK3588: - Set "Receive original clock source is auto gating" for RK3588. - Set "Receive clock source is no-inverted" only on RK3568 and "Transmit clock source is invertion of original clock input" for RK3588. - Use different txclk_tapnum for HS400 modes on RK3588. - Configure the CMDOUT reg for HS400 modes for RK3588. This is based on the mainline linux and vendor kernel driver and have successfully been tested with rock5b-rk3588_defconfig and CONFIG_MMC_HS200_SUPPORT=y CONFIG_MMC_HS400_SUPPORT=y CONFIG_MMC_HS400_ES_SUPPORT=y CONFIG_MMC_SPEED_MODE_SET=y using the following command to switch mode and then read 512 MiB of data from eMMC into memory, => mmc dev 0 0 <mode> && mmc info && mmc read 10000000 2000 10000 for each of the modes below. 0 = MMC legacy 1 = MMC High Speed (26MHz) 3 = MMC High Speed (52MHz) 4 = MMC DDR52 (52MHz) 10 = HS200 (200MHz) 11 = HS400 (200MHz) 12 = HS400ES (200MHz) Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com> Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-04-21mmc: rockchip_sdhci: Fix HS400 and HS400ES mode on RK3568Jonas Karlman1-3/+3
Adjust tap number for transmit clock, tap number and delay number for strobe input to fix HS400 modes on RK3568. New values have been picked from vendor kernel and u-boot and have successfully been tested with rock-3a-rk3568_defconfig and CONFIG_MMC_HS200_SUPPORT=y CONFIG_MMC_HS400_SUPPORT=y CONFIG_MMC_HS400_ES_SUPPORT=y CONFIG_MMC_SPEED_MODE_SET=y using the following command to switch mode and then read 512 MiB of data from eMMC into memory, => mmc dev 0 0 <mode> && mmc info && mmc read 10000000 2000 10000 for each of the modes below. 0 = MMC legacy 1 = MMC High Speed (26MHz) 3 = MMC High Speed (52MHz) 4 = MMC DDR52 (52MHz) 10 = HS200 (200MHz) 11 = HS400 (200MHz) 12 = HS400ES (200MHz) Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com> Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-04-21mmc: rockchip_sdhci: Rearrange and simplify used regs and flagsJonas Karlman1-27/+13
This rearrange and remove duplicate defines to make the code cleaner. There is no need to read vendor area1 and use an offset each time, it is easier and clearer to just use the reg offset defined in TRM, same as the other vendor regs. This also removes use of the misspelled const for the RK3588 CMDOUT reg, it will be re-added when support for RK3588 is introduced. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-04-21mmc: rockchip_sdhci: Remove empty get_phy and set_enhanced_strobe opsJonas Karlman1-13/+1
Remove empty implementations of get_phy and set_enhanced_strobe ops. Change driver set_enhanced_strobe to return 0 in order to allow missing implementation of the ops. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-04-21mmc: rockchip_sdhci: Update speed mode controls in set_ios_postJonas Karlman1-26/+42
Refactor set_ios_post ops to correctly set UHS Speed Select field values according to TRM. Also set or unset Enhanced Strobe Enable bit and eMMC Card present bit in set_ios_post, the Enhanced Strobe Enable bit was never unset after switching to HS400ES mode. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-04-21mmc: rockchip_sdhci: Refactor execute tuning error handlingJonas Karlman1-24/+11
Check return value from mmc_send_cmd and clear HOST_CONTROL2 when there is an error. Also skip enable of interrupt signaling and remove a delay, a delay is already happening in sdhci_send_command. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-04-21mmc: rockchip_sdhci: Use set_clock and config_dll sdhci_opsJonas Karlman1-13/+15
Change to configure clock and DLL in set_clock and config_dll ops instead of in the set_ios_post ops. With this change the output clock is turned off while configuring DLL parameters, according to the design recommendations. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-04-21mmc: rockchip_sdhci: Add set_clock and config_dll sdhci_opsJonas Karlman1-2/+27
Add support for the set_clock and config_dll sdhci_ops. Use of these ops will allow configuration of DLL while the output clock is disabled. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-04-21mmc: rockchip_sdhci: Remove unneeded emmc_phy_initJonas Karlman1-26/+0
Remove the unneeded emmc_phy_init now that the no-inverter flag is handled correctly after commit 2321a991bbb5 ("rockchip: sdhci: rk3568: bypass DLL when clk <= 52 MHz"). Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-04-21mmc: rockchip_sdhci: Fix use of device private dataJonas Karlman1-7/+9
The device private data is misused in rockchip_sdhci_of_to_plat and rockchip_sdhci_execute_tuning. In these functions dev_get_priv is assigned to struct sdhci_host: struct sdhci_host *host = dev_get_priv(dev); Instead, the sdhci host should refer to host in struct rockchip_sdhc: struct rockchip_sdhc *priv = dev_get_priv(dev); struct sdhci_host *host = &priv->host; Because host is the first member in struct rockchip_sdhc this is not a real problem, lets fix it anyway and also use priv name consistently. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-04-21mmc: sdhci: Set UHS Mode Select field for UHS SDR25 modeJonas Karlman1-0/+4
Set correct UHS Mode Select field value for UHS SDR25 (50MHz) mode. Fixes: d1c0a2200afb ("mmc: sdhci: Add support for HOST_CONTROL2 and setting UHS timings") Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-04-21mmc: sdhci: Fix HISPD bit handling for MMC HS 52MHz modeJonas Karlman1-0/+1
Set High Speed Enable bit for MMC High Speed (52MHz) mode. Fixes: f12341a95295 ("mmc: sdhci: Fix HISPD bit handling") Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-04-21rockchip: rng: add trngv1 for rk3588Chris Morgan2-11/+114
This adds support for the TRNG found in the RK3588 SoC to the rockchip_rng driver so that it can be used for things such as seeding randomness to Linux. Changes in V3: - Moved notes from commit to cover letter. - Added Reviewed-By tag. Changes in V2: - Modified Kconfig to note that the Rockchip RNG driver supports all versions of the hardware (v1, v2, and the trng in the rk3588). Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com> Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-04-21clk: rockchip: rk3568: Add dummy I2S1_MCLKOUT_TX clock supportJonas Karlman1-0/+2
A RK3568 device tree pmic node can reference the I2S1_MCLKOUT_TX clock in assigned-clocks, add dummy support to set parent of this clock to the rk3568 cru driver. Fixes probe of pmic driver and missing regulators on affected boards, rk3568-evb and rk3568-rock-3a. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-04-21pinctrl: rockchip: Fix IO mux selection on RK3568Jonas Karlman1-28/+38
IO mux selection is not working correctly for all pins. Sync mux route data from linux to add any missing and update wrong trigger pins to fix this. Also apply the pull-up fix needed for GPIO0 D3-D6. Fixes: 1977d746aa54 ("rockchip: rk3568: add rk3568 pinctrl driver") Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
2023-04-21rockchip: rk3588: Add support for sdmmc clocks in SPLJonas Karlman1-0/+125
Booting from sdmmc on RK3588 currently works because of a workaround in the device tree, clocks are reordered so that the driver use ciu-sample instead of ciu, and the BootRom initializes sdmmc clocks before SPL is loaded into DRAM. The sdmmc clocks are normally controlled by TF-A using SCMI. However, there is a need to control these clocks in SPL, before TF-A has started. This adds a rk3588_scru driver to control the sdmmc clocks in SPL before TF-A has started, using scru regs. It also adds a small glue driver to bind the scmi clock node to the rk3588_scru driver in SPL. Fixes: 7a474df74023 ("clk: rockchip: Add rk3588 clk support") Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-04-21clk: scmi: Add Kconfig option for SPLJonas Karlman3-2/+10
Building U-Boot SPL with CLK_SCMI and SCMI_FIRMWARE Kconfig options enabled and SPL_FIRMWARE disabled result in the following error. drivers/clk/clk_scmi.o: in function `scmi_clk_gate': drivers/clk/clk_scmi.c:84: undefined reference to `devm_scmi_process_msg' drivers/clk/clk_scmi.c:88: undefined reference to `scmi_to_linux_errno' drivers/clk/clk_scmi.o: in function `scmi_clk_get_rate': drivers/clk/clk_scmi.c:113: undefined reference to `devm_scmi_process_msg' drivers/clk/clk_scmi.c:117: undefined reference to `scmi_to_linux_errno' drivers/clk/clk_scmi.o: in function `scmi_clk_set_rate': drivers/clk/clk_scmi.c:139: undefined reference to `devm_scmi_process_msg' drivers/clk/clk_scmi.c:143: undefined reference to `scmi_to_linux_errno' drivers/clk/clk_scmi.o: in function `scmi_clk_probe': drivers/clk/clk_scmi.c:157: undefined reference to `devm_scmi_of_get_channel' make[1]: *** [scripts/Makefile.spl:527: spl/u-boot-spl] Error 1 make: *** [Makefile:2043: spl/u-boot-spl] Error 2 Add Kconfig option so that CLK_SCMI can be disabled in SPL to fix this. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-04-21rockchip: otp: fix misc_read() return valuesJohn Keeping1-4/+8
The documentation for misc_read() says: Return: number of bytes read if OK (may be 0 if EOF), -ve on error The Rockchip efuse driver implements this so it should return the number of bytes read rather than zero on success. Fix this so that the driver follows the usual contract for read operations. Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: John Keeping <john@metanate.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-04-21rockchip: efuse: fix misc_read() return valuesJohn Keeping1-4/+8
The documentation for misc_read() says: Return: number of bytes read if OK (may be 0 if EOF), -ve on error The Rockchip efuse driver implements this so it should return the number of bytes read rather than zero on success. Fix this so that the driver follows the usual contract for read operations. Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: John Keeping <john@metanate.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
generated by cgit v1.1 at 2024-09-17 00:49:26 +0000