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2020-06-15regulator: fix: enable gpio when requestedMark Kettenis2-3/+2
The fix in commit b7adcdd073c0 has the side-effect that the regulator will be disabled when requesting the relevant gpio in regulator_common_ofdata_to_platdata() and enabled in regulator_pre_probe() when the regulator was already enabled. This leads to a short interruption in the 3.3V power to the PCIe slot on the firefly-rk3399 which makes an ADATA SX8000NP NVMe SSD unhappy. Fix this by setting the GPIOD_IS_OUT_ACTIVE flag again when the 'regulator-boot-on' property is set, but check for this property explicitly instead of relying on the "boot_on" member of the uclass platdata. Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Tested-by: Patrice Chotard <patrice.chotard@st.com>
2020-06-15Merge tag 'mmc-2020-6-15' of https://gitlab.denx.de/u-boot/custodians/u-boot-mmcTom Rini4-31/+71
- fsl_esdhc sdr104 and hs200 fix and error path fix - fsl_esdhc workaround 3.3v io issue - ca_dw_mmc cleanup - presidio-asic emmc DT update.
2020-06-15mmc: fsl_esdhc: Gracefully fail on unsupported voltage switchMarek Vasut1-2/+3
Unsupported voltage on voltage switch is not an error, do not print error message in such a case. This happens e.g. if the eMMC is already in 1V8 mode or when testing 1V2 mode operation on systems which only do 3V3/1V8 switching. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2020-06-15mmc: fsl_esdhc: Fix SDR104 and HS200 supportMarek Vasut1-0/+1
The 3V3/1V8 switching could never have worked on any of the iMXes ever since 51313b49f2 ("mmc: fsl_esdhc: support SDR104 and HS200"), because that commit uses priv->vqmmc_dev when switching voltages on mode switch, while local vqmmc_dev in probe to store the regulator pointer. Those are two different variables with the same name. So the priv->vqmmc_dev was always NULL and thus voltage switch between modes never really suceeded. Fix this by assigning priv->vqmmc_dev with value of the vqmmc_dev in probe. Fixes: 51313b49f2 ("mmc: fsl_esdhc: support SDR104 and HS200") Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2020-06-15mmc: ca_dw_mmc: Misc cleanup of driverArthur Li1-22/+12
- Rename DT compatible name - Remove uneccessary if-statement to support 8-bit buswidth - Remove redundant error msg - Use symbolic constants in switch statement Signed-off-by: Arthur Li <arthur.li@cortina-access.com> Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com> CC: Peng Fan <peng.fan@nxp.com> CC: Jaehoon Chung <jh80.chung@samsung.com> CC: Tom Rini <trini@konsulko.com>
2020-06-15mmc: fsl_esdhc: workaround for hardware 3.3v IO reliability issueYangbo Lu2-2/+51
When eSDHC operates at 3.3v, damage can accumulate in an internal level shifter at a higher than expected rate. The faster the interface runs, the more damage accumulates. This issue now is found on LX2160A eSDHC1 for only SD card. The hardware workaround is recommended to use an on-board level shifter that is 1.8v on SoC side and 3.3v on SD card side. For boards without hardware workaround, this option could be enabled, ensuring 1.8v IO voltage and disabling eSDHC if no card. This option assumes no hotplug, and u-boot has to make all the way to to linux to use 1.8v UHS-I speed mode if has card. If you do not want the workaround for better user experience, of course you can choose to not select it running eSDHC in unsafe mode. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Acked-by: Peng Fan <peng.fan@nxp.com>
2020-06-15mmc: fsl_esdhc: read register once for card inserted statusYangbo Lu1-5/+4
No need to poll register for card inserted status. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Acked-by: Peng Fan <peng.fan@nxp.com>
2020-06-14Merge https://gitlab.denx.de/u-boot/custodians/u-boot-usbTom Rini2-224/+265
- eth/r8152: update the firmware
2020-06-14eth/r8152: update the firmwareHayes Wang2-224/+265
Update the firmware to improve compatibility for none-intel USB host controller. The more information is as following. The device has auto-installed driver feature - via switch CD-ROM/NIC mode. But in some corner cases, it would switch to CD-ROM unexpected. This issue results in Lan Function Disabled. While USB PHY transits to P3 from P0 due to the absent of transmitter control, it would issues undefined signal to its link partner. Some Down Stream Port misidentify the undefined signal as wakeup signal. So the link state will not keep in suspend even the system is idle. Signed-off-by: Hayes Wang <hayeswang@realtek.com>
2020-06-11spi: davinci: Drop non-dm codeJagan Teki2-163/+6
Now all boards which are using davinci SPI driver have moved to SPL_DM so drop the unneeded non-dm code. Cc: Adam Ford <aford173@gmail.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Adam Ford <aford173@gmail.com> #da850-evm
2020-06-11spi: atmel: Drop atmel_spi.hJagan Teki1-3/+85
atmel_spi.h has register offsets, and atmel_spi_slave structure, move it into .c file for better readability and drop atmel_spi.h Cc: Wenyou Yang <wenyou.yang@atmel.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-11spi: atmel: Remove nondm codeJagan Teki2-209/+0
atmel spi driver now accessible only when DM_SPI enabled. So, remove nondm code. Cc: Wenyou Yang <wenyou.yang@atmel.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-11spi: atmel: Drop CONFIG_SYS_SPI_WRITE_TOUTJagan Teki1-4/+0
Drop CONFIG_SYS_SPI_WRITE_TOUT there is no code usage. Cc: Wenyou Yang <wenyou.yang@atmel.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-11spi: fsl_dspi: Drop nondm codeJagan Teki1-132/+0
Drop the nondm code from fsl_dspi.c since there is no board or any other code using for it. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-11spi: Zap SOFT_SPI (non-dm)Jagan Teki3-176/+6
- Deadline for DM migration already passed by months. - Sent couple of zap patches and - No response on dm conversation hence removed the driver. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-06-11spi: mxs: Code cleanupJagan Teki1-19/+18
Order the macros, private structures and simple functions in a proper way to have more code readability. No functionality changed. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-11spi: mxs: Drop nondm codeJagan Teki2-129/+6
Deadline for DM migration already passed by months and no response on full dm conversation hence removed the nondm code. Note: Look like there is no user for nondm code for this driver. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-09Merge tag 'u-boot-imx-20200609' of ↵Tom Rini1-0/+7
https://gitlab.denx.de/u-boot/custodians/u-boot-imx Fixes for 2020.07 ----------------- - mx53: mx53menlo Convert to DM_ETH, fix fail boot - imx8mp_evk: fix boot issue - MX6, display5: fix environment - drop warnings (watchdog) for i.MX8mm i.mx8mp - enable bootaux for i.MX8M Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/695929999
2020-06-08Merge https://gitlab.denx.de/u-boot/custodians/u-boot-mpc85xxTom Rini8-71/+273
- DM_ETH support for P2041RDB, T1024RDB, P5040DS, P3041DS, P4080DS, bug fixes - Add TBI PHY access through MII - DDR: Rework errata workaround for A008109, A008378, 009942
2020-06-08power: pmic: Add SPL Kconfig entry for PFUZE100Marek Vasut1-0/+7
Add Kconfig entry for the PFUZE PMIC, SPL variant. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2020-06-05virtio: VIRTIO_RNG depends on DM_RNGHeinrich Schuchardt1-5/+7
Add the missing Kconfig dependency and let VIRTIO_RNG default to yes. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-04serial: Add missing Kconfig dependencies for debug consolesMichal Simek1-0/+13
Debug console is the part of serial driver in the same file. It means to be able to enable debug console you also need to enable driver itself. That's why add all dependecies and list only debug consoles which are enabled based on driver selection to avoid compilation error when user asks for certain debug console but driver is not enable for it. Error: aarch64-linux-gnu-ld.bfd: common/built-in.o: in function `putc': /home/monstr/data/disk/u-boot/common/console.c:513: undefined reference to `printch' aarch64-linux-gnu-ld.bfd: common/built-in.o: in function `puts': /home/monstr/data/disk/u-boot/common/console.c:563: undefined reference to `printch' Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> [trini: Fix ns16550 dependency, add ZYNQ_SERIAL, change S5P] Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-04serial: Convert ARM_DCC to KconfigTom Rini1-0/+6
The symbol "CONFIG_ARM_DCC" is used to control building drivers/serial/arm_dcc.c. Provide a simple Kconfig entry for this. Cc: Luca Ceresoli <luca@lucaceresoli.net> Cc: Michal Simek <monstr@monstr.eu> Cc: Tom McLeod <tom.mcleod@opalkelly.com> Cc: Mike Looijmans <mike.looijmans@topic.nl> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Luca Ceresoli <luca@lucaceresoli.net>
2020-06-04ddr: Rework errata A008109, A008378, 009942 workaroundJaiprakash Singh3-65/+107
Move errata A008109, A008378, 009942 workaround implementation from compute_fsl_memctl_config_regs() to fsl_ddr_set_memctl_regs() and add register write after each workaround implementation. Signed-off-by: Jaiprakash Singh <Jaiprakash.singh@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-06-04ddr: fsl: Impl. Erratum A008109Joakim Tjernlund2-0/+9
Impl. erratum as descibed in errata doc. Enable A008109 for T1040 and T1024 Signed-off-by: Joakim Tjernlund <joakim.tjernlund@infinera.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-06-04net: tsec: Access TBI PHY through the corresponding MIIHou Zhiqiang1-4/+21
When an eTSEC is configured to use TBI, configuration of the TBI is done through the MIIM registers for that eTSEC. For example, if a TBI interface is required on eTSEC2, then the MIIM registers starting at offset 0x2_5520 are used to configure it. Fixes: 9a1d6af55ecd ("net: tsec: Add driver model ethernet support") Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> Tested-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-06-04net: tsec: Access eTSEC registers using virtual addressHou Zhiqiang1-3/+8
The current code accesses eTSEC registers using physical address directly, it's not correct, though no problem on current platforms. It won't work on platforms, which does not support 1:1 virtual-physical address map. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> Tested-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-06-04net: tsec: fsl_mdio: add DM MDIO supportMadalin Bucur1-6/+134
Allow the MDIO devices to be probed based on the device tree. Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-06-04clk: sifive: fu540-prci: Release ethernet clock resetPragnesh Patel1-0/+20
U-Boot ethernet works with FSBL flow where releasing ethernet clock reset is part of FSBL itself but with the SPL, We need to release ethernet clock reset explicitly for U-Boot proper. With this change Release ethernet clock reset code in FSBL might not be needed or unaffected. Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-04clk: sifive: fu540-prci: Add ddr clock initializationPragnesh Patel1-6/+45
Release ddr clock reset once clock is initialized Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-04clk: sifive: fu540-prci: Add clock enable and disable opsPragnesh Patel1-12/+96
Added clock enable and disable functions in prci ops Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-04sifive: fu540: add ddr driverPragnesh Patel5-0/+432
Add driver for fu540 to support ddr initialization in SPL. This driver is based on FSBL (https://github.com/sifive/freedom-u540-c000-bootloader.git) Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-04misc: add driver for the SiFive otp controllerPragnesh Patel3-0/+283
Added a misc driver to handle OTP memory in SiFive SoCs. Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-03Merge https://gitlab.denx.de/u-boot/custodians/u-boot-spiTom Rini12-449/+167
- Toshiba spinand (Yoshio) - SPI/SPI Flash cleanup (Jagan) - Remove SH SPI (Jagan)
2020-06-03Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-sunxiTom Rini2-9/+17
- H6 emac support - USB PHY H6 logic alignment
2020-06-03drivers: net: qe: deselect QE when DM_ETH is enabledMadalin Bucur1-1/+1
A compilation error appears when QE is compiled with DM_ETH enabled: drivers/qe/uec.c: In function 'init_phy': drivers/qe/uec.c:425:28: error: dereferencing pointer to incomplete type 'struct eth_device' uec = (uec_private_t *)dev->priv; ^~ drivers/qe/uec.c: In function 'uec_initialize': drivers/qe/uec.c:1357:43: error: invalid application of 'sizeof' to incomplete type 'struct eth_device' dev = (struct eth_device *)malloc(sizeof(struct eth_device)); ^~~~~~ The patch disables CONFIG_QE when CONFIG_DM_ETH is set. Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-06-03drivers: net: e1000: with DM_ETH needs DM_PCI tooMadalin Bucur1-0/+1
Compilation error occur when DM_ETH is enabled without DM_PCI. Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-06-02bootcount_ext: Add Ext4 build dependencyFrédéric Danis1-0/+2
This config option depends on EXT4 support. If Ext4 write capability is not selected, it generate write error messages and is unable to maintain boot counter. Signed-off-by: Frédéric Danis <frederic.danis@collabora.com>
2020-06-02kconfig: fix typo for OHCI host and add to DM listMarcin Juszkiewicz1-2/+2
Description said that OHCI is not supported for driver model while it was converted too. Signed-off-by: Marcin Juszkiewicz <marcin@juszkiewicz.com.pl>
2020-06-02kconfig: mark SPL/TPL options for DM_KEYBOARDMarcin Juszkiewicz1-2/+2
All three options had the same description. Signed-off-by: Marcin Juszkiewicz <marcin@juszkiewicz.com.pl>
2020-06-02usb: ohci: Add header file for ARCH_DMA_MINALIGNSimon Glass1-0/+1
This is defined in the asm/cache.h header file. Update this header file to include it so it gets the same value consistently across U-Boot. This fixes 'usb host' on omapl138_lcdk. Fixes: 90526e9fbac ("common: Drop net.h from common header") Reported-by: Adam Ford <aford173@gmail.com> Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Adam Ford <aford173@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2020-06-02x86: spi: Rewrite logic for obtaining the SPI memory mapSimon Glass1-15/+88
At present this logic does not work on link and samus, since their SPI controller is not a PCI device, but a child of the PCH. Unfortunately, fixing this involves a lot of extra logic. Still, this was requested in the review of the fix-up patch, so here it is. Fixes: 92842147c31 ("spi: ich: Add support for get_mmap() method") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> (on Intel minnowmax)
2020-06-01net: sun8i_emac: Add support for the H6 variantSamuel Holland1-4/+10
The H6 EMAC is very similar to the H3 variant, except that it uses the same pinmux as R40. Add support for it. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-01net: sun8i_emac: Use consistent clock bitfield definitionsSamuel Holland1-3/+3
While the R40 uses a different register for EMAC clock configuration than other chips, the register has a very similar layout. Reuse the existing bitfield definitions in this file, since they match. This allows the driver to compile on the H6 platform, where the CCM_GMAC_CTRL definitions are not present. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-01phy: sun4i-usb: Align H6 initialization logic with the kernelRoman Stratiienko1-2/+4
H6 SOC needs additional initialization of PHY registers. Corresponding changes can be found in the kernel patch [1]. Without this changes there is no enumeration of 'musb' gadget. [1] - https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=ae409cc7c3cdb9ac4a1dba3eae70efec3d6b6c79 Fixes: 35fa673e0e5f ("sunxi: phy: Add USB PHY support for Allwinner H6") Signed-off-by: Roman Stratiienko <r.stratiienko@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-01mtd: sf: Drop plat from sf_probeJagan Teki1-2/+0
dm_spi_slave_platdata used in sf_probe for printing plat->cs value and there is no relevant usage apart from this. We have enough debug messages available in SPI and SF areas so drop this plat get and associated bug statement. Cc: Simon Glass <sjg@chromium.org> Cc: Vignesh R <vigneshr@ti.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-01mtd: spi: Call sst_write in _write opsJagan Teki1-6/+7
Currently spi-nor code is assigning _write ops for SST and other flashes separately.  Just call the sst_write from generic write ops and return if SST flash found, this way it avoids the confusion of multiple write ops assignment during the scan and makes it more feasible for code readability. No functionality changes. Cc: Simon Glass <sjg@chromium.org> Cc: Vignesh R <vigneshr@ti.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-01sf: Drop spl_flash_get_sw_write_protJagan Teki5-38/+0
The get_sw_write_prot API is used to get the write-protected bits of flash by reading the status register and other wards it's API for reading register bits. 1) This kind of requirement can be achieved using existing flash operations and flash locking API calls instead of making a separate flash API. 2) Technically there is no real hardware user for this API to use in the source tree. 3) Having a flash operations API for simple register read bits also make difficult to extend the flash operations. 4) Instead of touching generic code, it is possible to have this functionality inside spinor operations in the form of flash hooks or fixups for associated flash chips. Considering all these points, this patch drops the get_sw_write_prot and associated code bases. Cc: Simon Glass <sjg@chromium.org> Cc: Vignesh R <vigneshr@ti.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-01mtd: spi: Use CONFIG_IS_ENABLED to prevent ifdefJagan Teki2-9/+18
Use CONFIG_IS_ENABLED to prevent ifdef in sf_probe.c Cc: Simon Glass <sjg@chromium.org> Cc: Vignesh R <vigneshr@ti.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-01spi: Zap sh_spi driverJagan Teki4-325/+0
sh_spi driver is deprecated, no active updates and no board user, hence dropped the same. Cc: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@konsulko.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
generated by cgit v1.1 at 2024-08-14 20:01:17 +0000