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2023-07-21Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sunxiWIP/21Jul2023Tom Rini3-33/+84
For once this adds USB support for two SoCs: the H616 and the F1C100s series. The rest is support for LPDDR3 DRAM chips on H616 boards. Gitlab CI passed, and I booted that briefly on an H616 and an F1C200s board. I don't have an H616 board with LPDDR3 DRAM, but reportedly that works for Mikhail, and doesn't regress on my DDR3 boards.
2023-07-21Merge tag 'xilinx-for-v2023.10-rc1-v2' of ↵Tom Rini21-40/+109
https://source.denx.de/u-boot/custodians/u-boot-microblaze Xilinx changes for v2023.10-rc1 v2 axi_emac: - Change return value if RX packet is not ready cadence_qspi: - Enable flash reset for Versal NET dt: - Various DT syncups with Linux kernel - SOM - reserved pmufw memory location fpga: - Add load event mtd: - Add missing dependency for FLASH_CFI_MTD spi/nand: - Minor cleanup in Xilinx drivers versal-net: - Prioritize boot device in boot_targets - Wire mini ospi/qspi/emmc configurations watchdog: - Use new versal-wwdt property xilinx: - fix sparse warnings in various places ps7_init* - add missing headers - consolidate code around zynqmp_mmio_read/write - switch to amd.com email zynqmp_clk: - Add handling for gem rx/tsu clocks zynq_gem: - Configure mdio clock at run time zynq: - Enable fdt overlay support zynq_sdhci: - Call dll reset only for ZynqMP SOCs
2023-07-21event: Add fpga load eventChristian Taedcke1-0/+20
This enables implementing custom logic after a bitstream was loaded into the fpga. Signed-off-by: Christian Taedcke <christian.taedcke@weidmueller.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/r/20230720072724.11516-1-christian.taedcke-oss@weidmueller.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-07-21clk: zynqmp: Add gem rx and tsu clocks to return registerAshok Reddy Soma1-0/+5
Add gem_tsu and gem0_rx till gem3_rx to return proper register from zynqmp_clk_get_register. Otherwise firmware won't be able to set clock for these due to incorrect register address. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com> Link: https://lore.kernel.org/r/20230720072859.3724-1-ashok.reddy.soma@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-07-21clk: zynqmp: Add set_rate support for gem rx and tsu clksAshok Reddy Soma1-0/+2
gem0_rx till gem3_rx and gem_tsu are missing from set rate function. Add them, so that they can be set from pmu firmware via clock framework. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com> Link: https://lore.kernel.org/r/20230719084912.30209-1-ashok.reddy.soma@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-07-21net: axi_emac: Change return value to -EAGAIN if RX is not readyMaksim Kiselev1-1/+1
If there is no incoming package than axiemac_recv will return -1 which in turn leads to printing `eth_rx: recv() returned error -1` error message in eth_rx function. But missing a package is not an fatal error, so return -EAGAIN in that case would be more suitable. Signed-off-by: Maksim Kiselev <bigunclemax@gmail.com> Link: https://lore.kernel.org/r/20230719065337.69280-1-bigunclemax@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-07-21mtd: Add missing MTD dependency for cfi_mtdMichal Simek1-1/+1
cfi_mtd requires add_mtd_device() which is available only when MTD is enabled that's why record this dependency. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/76ae01ce2b2c988758b69e0f0cdcc21bf301c01e.1688472227.git.michal.simek@amd.com
2023-07-21mmc: zynq_sdhci: Dll reset only for ZynqMP platformAshok Reddy Soma1-2/+5
Dll reset is needed only for ZynqMP platforms, add condition in tuning to call arasan_zynqmp_dll_reset() just for ZynqMP platforms. On other platforms like Versal NET, If this condition is not added, we see PLM error messages when dll reset smc is called. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/d673ff3bdc5c236a7f0403c920e719684abd6059.1688991117.git.michal.simek@amd.com
2023-07-21arm64: zynqmp: Switch to amd.com emailsMichal Simek10-11/+11
Update my and DPs email address to match current setup. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/aba5b19b9c5a95608829e86ad5cc4671c940f1bb.1688992543.git.michal.simek@amd.com
2023-07-21xilinx: Consolidate zynqmp_mmio_read/write in zynqmp_firmware.hMichal Simek1-0/+1
zynqmp_mmio_read/write() are firmware provided hooks that's why use only zynqmp_firmware.h for function declaration. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/e7489556f9e447c737a578c169d7e1e43586a273.1687524706.git.michal.simek@amd.com
2023-07-21cadence_qspi: Enable flash reset for Versal NET platformAshok Reddy Soma2-10/+6
Enable flash reset functionality for Versal NET platform. In cadence_qspi.c there is weak function defined for reset, hence remove the check for config, so that it will work for Versal and Versal NET platforms. Add register defines in Versal NET hardware.h for mini U-Boot flash reset. Add read_delay initialization for Versal NET also. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com> Link: https://lore.kernel.org/r/20230614120452.21019-1-ashok.reddy.soma@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-07-21net: zynq_gem: Don't hardcode the MDC clock divisorVenkatesh Yadav Abbarapu1-8/+49
As per spec MDC must not exceed 2.5MHz, read the pclk clock from the device tree and update the MDC clock divisor. GEM devices support larger clock divisors and have a different range of divisors. Program the MDIO clock divisors based on the clock rate of the pclk clock. Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Link: https://lore.kernel.org/r/20230619034922.24019-1-venkatesh.abbarapu@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-07-21mtd: nand: zynq_nand: Change datatype of status and ecc_status to intAlgapally Santosh Sagar1-2/+2
status and ecc_status are of unsigned type where they are compared for negative value. This is pointed by below sparse warning. Change datatype to int to fix this. warning: comparison of unsigned expression in '< 0' is always false [-Wtype-limits] Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com> Link: https://lore.kernel.org/r/20230614090359.10809-5-ashok.reddy.soma@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-07-21spi: zynq_qspi: Add missing prototype for zynq_qspi_mem_exec_opAlgapally Santosh Sagar1-2/+2
Add missing prototype to fix the sparse warning, warning: no previous prototype for 'zynq_qspi_mem_exec_op' [-Wmissing-prototypes]. Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com> Link: https://lore.kernel.org/r/20230614090359.10809-4-ashok.reddy.soma@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-07-21spi: xilinx_spi: Add missing prototype for xilinx_qspi_mem_exec_opAlgapally Santosh Sagar1-2/+2
Add missing prototype to fix the below sparse warning warning: no previous prototype for 'xilinx_qspi_mem_exec_op' [-Wmissing-prototypes] Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com> Link: https://lore.kernel.org/r/20230614090359.10809-2-ashok.reddy.soma@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-07-21watchdog: versal: Use new compatible xlnx,versal-wwdtMichal Simek1-1/+2
DT binding has been approved that's why use new compatible string. The old one is mark as deprecated and should be removed after some releases. Link: https://lore.kernel.org/r/20230420104231.2243079-3-srinivas.neeli@amd.com/ Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/6e78d0d2e21f2f9e7f8f448bb8e0d27ced4de7d3.1686655339.git.michal.simek@amd.com
2023-07-21phy: sun4i: Add H616 USB PHY supportAndre Przywara2-1/+12
Now that the Allwinner USB PHY driver supports the H616 quirk, let's enable support for USB ports on that SoC. We connect the compatible string to a new struct describing the SoCs USB PHY properties, and unblock the PHY driver selection in Kconfig. A later patch will enable USB support in the H616 boards' defconfigs. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2023-07-21phy: sun4i-usb: Add H616 USB PHY quirk supportAndre Przywara1-0/+46
The H616 USB PHY is some kind of special snowflake: Only port2 works out of the box, but all other ports need some help from this port2 to work correctly: The CLK_BUS_PHY2 and RST_USB_PHY2 clock and reset need to be enabled, and the SIDDQ bit in the PMU PHY control register needs to be cleared. For this register to be accessible, CLK_BUS_ECHI2 needs to be ungated. Don't ask .... Follow the respective Linux patch (b45c6d80325b) and add a quirk bit, triggering the special sequence as outlined above, for PHYs other than PHY2: ungate this one special clock, and clear the SIDDQ bit. We also pick the clock and reset from PHY2 and enable them as well. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2023-07-21phy: sun4i-usb: Replace types with explicit quirk flagsAndre Przywara1-32/+9
So far we were assigning some crude "type" (SoC name, really) to each Allwinner USB PHY model, then guarding certain quirks based on this. This does not only look weird, but gets more or more cumbersome to maintain. Remove the bogus type names altogether, instead introduce flags for each quirk, and explicitly check for them. This improves readability, and simplifies future extensions. Port of Linux patch 8dd256bae653. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2023-07-21sunxi: Kconfig: rework PHY_USB_SUN4I selectionAndre Przywara2-1/+6
At the moment we use "select" in each Allwinner SoC's Kconfig section to include the USB PHY driver in the build. This means it cannot be disabled via Kconfig, although USB is not really a strictly required core functionality, and a particular board might not even include USB ports. Rework the Kconfig part by removing the "select" lines for each SoC's section, and instead letting it default to "y" in the PHY driver section itself. We use "depends on !" to exclude the few SoCs we don't support (yet). The Allwinner V3s does not enable USB (PHY) support at the moment, even though it should work: let the PHY default to "n" to keep the current behaviour. Also the MUSB USB driver directly calls some functions from the PHY driver, so let the former depend on the PHY driver. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
2023-07-21phy: sun4i-usb: add Allwinner F1C100s supportAndre Przywara1-0/+9
The Allwinner F1C100s implements a single USB PHY, connected to its MUSB OTG controller. The USB PHY is of the simpler, older type (like the A10), the only real difference is that it's indeed only one PHY. Add a struct describing those F1C100s USB PHY properties, and connect it to the new compatible string. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2023-07-21phy: sun4i-usb: Fix of_xlate() argument checkAndre Przywara1-1/+4
In its of_xlate() function, the Allwinner USB PHY driver compares the args_count variable against the number of implemented USB PHYs, although this is the *number of arguments* to the DT phandle property. Per the DT binding for this PHY device, this number is always one, so this check will always fail if the particular SoC implements exactly one USB PHY. So far this affected only the V3s (which has USB support disabled), but the F1C100s also sports one PHY only. Fix that check to compare args_count against exactly 1, and the args[0] content (requested PHY number) against the number of implemented PHYs. This fixes USB operation on the Allwinner V3s and allows to enable USB on the Allwinner F1C100s SoC. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2023-07-20core: read: fix dev_read_addr_size()John Keeping2-4/+3
The behaviour of dev_read_addr_size() is surprising as it does not handle #address-cells and #size-cells but instead hardcodes the values based on sizeof(fdt_addr_t). This is different from dev_read_addr_size_index() and dev_read_addr_size_name() both of which do read the cell sizes from the device tree. Since dev_read_addr_size() is only used by a single driver and this driver is broken when CONFIG_FDT_64BIT does not match the address size in the device tree, fix the function to behave like all of the other similarly named functions. Drop the property name argument as the only caller passes "reg" and this is the expected property name matching the other similarly named functions. Signed-off-by: John Keeping <john@metanate.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> # chromebook_jerry Tested-by: Simon Glass <sjg@chromium.org> # chromebook_bob
2023-07-20dm: core: of_access: fix return value in of_property_match_stringEugen Hristev1-1/+4
of_property_match_string calls of_find_property to search for the string property. If the device node does not exist, of_find_property returns NULL, and of_property_match_string returns -EINVAL, which is correct. However, if the device node exists, but the property is not found, of_find_property still returns NULL, but it will place -FDT_ERR_NOTFOUND in the *lenp variable. of_property_match_string does not use the lenp parameter, thus this error case is being lost, and treated as if the node is NULL, and returns -EINVAL, which is incorrect. The callers of of_property_match_string treat the error differently if the return value is -EINVAL or -ENOENT, e.g. in dwc3 driver: ret = generic_phy_get_by_name(dev, "usb3-phy", &phy); if (!ret) { ret = generic_phy_init(&phy); if (ret) return ret; } else if (ret != -ENOENT && ret != -ENODATA) { debug("could not get phy (err %d)\n", ret); return ret; } else { phy.dev = NULL; } So the caller drivers will just consider the property missing if -ENOENT is returned, versus the case of -EINVAL, which means something else. To fix this situation, changed the code to call the of_find_property with the right third argument to catch this error code and treat it accordingly. Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
2023-07-18Merge https://source.denx.de/u-boot/custodians/u-boot-mmcWIP/18Jul2023Tom Rini2-4/+33
2023-07-18mmc: Set clock when reverting to safe bus modeValentine Barshak1-0/+1
Set MMC clock when reverting to safe bus mode and speed in case current MMC mode fails. Otherwise, trying out the other modes may fail as well. Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com> [hp: fallback to legacy_speed] Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2023-07-18mmc: renesas-sdhi: Send stop when MMC tuning command failsHai Pham1-0/+11
When tuning command (CMD21) fails with command error, call mmc_send_stop_transmission() to send stop command (CMD12). Reviewed-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> [Marek: Add dev_dbg() message in case tuning abort fails Move tuning opcode check from mmc_abort_tuning()] Reviewed-by: Peng Fan <peng.fan@nxp.com>
2023-07-18mmc: Introduce mmc_send_stop_transmission()Hai Pham1-13/+21
If a tuning command times out, the card could still be processing it, which will cause problems for recovery. The eMMC specification section 6.6 Data transfer mode (cont’d) claims that CMD12 can be used to stop CMD21: " The relationship between the various data transfer modes is summarized (see Figure 27): - All data read commands can be aborted any time by the stop command (CMD12). The data transfer will terminate and the Device will return to the Transfer State. The read commands are: ... send tuning block (CMD21) .... " Add a function that does that. Based on Linux commit [1] and [2]. [1] e711f0309109 ("mmc: mmc: Introduce mmc_abort_tuning()") [2] 21adc2e45f4e ("mmc: Improve function name when aborting a tuning cmd") Reviewed-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> [Marek: Update commit message, quote relevant part of the specification. Rename to mmc_send_stop_transmission(). Remove tuning opcode check, this is controller driver specific. Deduplicate part of mmc_read_blocks() using this function.] Reviewed-by: Peng Fan <peng.fan@nxp.com>
2023-07-18mmc: Fix MMC_CMD_STOP_TRANSMISSION response type and add commentMarek Vasut1-1/+10
For MMC/eMMC, the MMC_CMD_STOP_TRANSMISSION response is R1 for read transfers and R1b for write transfers per JEDEC Standard No. 84-B51 Page 126 . The response is R1b unconditionally per Physical Layer Simplified Specification Version 9.00. Correct the response type and add a comment about it. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2023-07-17dfu: Add proper dependency for CONFIG_DFU_MMCAshok Reddy Soma1-0/+1
When CONFIG_CMD_MMC and CONFIG_MMC are disabled, still some compilation errors are seen as below due to unresolved symbols. drivers/dfu/dfu_mmc.o: in function `mmc_block_op': drivers/dfu/dfu_mmc.c:32: undefined reference to `find_mmc_device' drivers/dfu/dfu_mmc.c:54: undefined reference to `mmc_get_blk_desc' drivers/dfu/dfu_mmc.c:67: undefined reference to `mmc_get_blk_desc' drivers/dfu/dfu_mmc.c:70: undefined reference to `mmc_get_blk_desc' drivers/dfu/dfu_mmc.o: in function `dfu_fill_entity_mmc': drivers/dfu/dfu_mmc.c:369: undefined reference to `find_mmc_device' drivers/dfu/dfu_mmc.c:376: undefined reference to `mmc_init' drivers/dfu/dfu_mmc.c:403: undefined reference to `mmc_get_blk_desc' gnu/aarch64/lin/aarch64-linux/bin/aarch64-linux-gnu-ld.bfd: line 4: 31661 Segmentation fault (core dumped) $CC --sysroot=$LIBC --no-warn-rwx-segment "$@" Makefile:1760: recipe for target 'u-boot' failed make: *** [u-boot] Error 139 make: *** Deleting file 'u-boot' Add dependency of CONFIG_MMC for CONFIG_DFU_MMC config to fix the errors. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
2023-07-17Merge https://source.denx.de/u-boot/custodians/u-boot-x86WIP/17Jul2023Tom Rini19-66/+357
- bootstd: Add a bootmeth for ChromiumOS on x86 - x86: Use qemu-x86_64 to boot EFI installers
2023-07-17x86: video: Add a driver for QEMU bochs emulationSimon Glass4-0/+190
Bochs is convenient with QEMU on x86 since it does not require a video BIOS. Add a driver for it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-07-17x86: Convert some debug statements to use loggingSimon Glass2-4/+7
Move from using debug() to log_debug() so that we don't have to use the __func__ parameter and can access other logging features. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-07-17x86: Record the start and end of the tablesSimon Glass1-0/+9
The ACPI tables are special in that they are passed to EFI as a separate piece, independent of other tables. Also they can be spread over two areas of memory, e.g. with QEMU we end up with tables kept in high memory as well. Add new global_data fields to hold this information and update the bdinfo command to show the table areas. Move the rom_table_end variable into the loop that uses it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-07-17pci: Mask the ROM address in case it is already enabledSimon Glass1-0/+1
In some cases the video ROM may have been enabled previously, such as by a previous firmware stage. Use the correct address in that case. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-07-17pci: Adjust video BIOS debugging to be SPL-friendlySimon Glass1-2/+2
A hex value is expected for the VGA mode. Add a 0x prefix, since the # construct is not supported in SPL. We don't want to add it, due to code-size constraints. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-07-17x86: Pass video settings from SPL to U-Boot properSimon Glass1-21/+57
When video is set up in SPL, U-Boot proper needs to use the correct parameters so it can write to the display. Put these in a bloblist so they are available to U-Boot proper. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Nikhil M Jain <n-jain1@ti.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-07-17x86: Allow video-BIOS code to be built for SPLSimon Glass1-14/+14
With qemu-x86_64 we need to run the video BIOS while in 32-bit mode, i.e. SPL. Add a Kconfig option for this, adjust the Makefile rules and use CONFIG_IS_ENABLED() where needed. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-07-17pci: Tidy up logging and reporting for video BIOSSimon Glass1-3/+9
When running the ROM the code is not very helpful when something goes wrong. Add a little more debugging and some logging of return values to improve this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-07-17pci: Support autoconfig in SPLSimon Glass2-1/+14
Allow PCI autoconfig to be handled in SPL, so that we can set it up correctly for boards which need to do this before U-Boot proper. This includes qemu-x64_64 which needs to set up the video device while in 32-bit mode. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-07-17nvme: Provide more useful debugging messagesSimon Glass1-10/+26
When scanning fails it is useful to be able to decode what went wrong. Add some debugging for this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-07-17qfw: Set the address of the ACPI tablesSimon Glass1-0/+4
Once the ACPI tables have been set up, record their address so that it is possible to list them with 'acpi list'. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-07-17bios_emulator: Drop VIDEO_IO_OFFSETSimon Glass2-9/+10
This is always zero in the source tree, so drop it. While we are here, add a comment to _X86EMU_env since the symbol is actually defined twice, which can cause confusion when building. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-07-17bios_emulator: Add Kconfig and adjust Makefile for SPLSimon Glass3-1/+13
The Kconfig for this is currently inside a particular board. Move it into the correct place and allow use in SPL, so that video can be used there if needed. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-07-16Merge tag 'video-20230714' of ↵WIP/16Jul2023Tom Rini8-20/+278
https://source.denx.de/u-boot/custodians/u-boot-video - fix video console default font selection - add panel driver for HannStar HSD060BHW4 - fix backlight pwm integer overflow in duty cycle calculation - fix dw_mipi_dsi hsync/vsync settings - various other fixes for rockchip dw_mipi_dsi
2023-07-16bootstd: Use bootdev instead of bootdeviceSimon Glass3-3/+3
It seems better to call this a 'bootdev' since this is name used in the documentation. The older 'Bootdevice' name is no-longer used and may cause confusion with the 'bootdevice' environment variable. Update throughout to use bootdev. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-07-14ufs: Use 'TASK_TAG' to construct the ucd_req_ptr->header.dword_0Bhupesh Sharma1-1/+1
Instead of using the hard-coded value of 0x1f, use 'TASK_TAG' macro instead to construct the ucd_req_ptr->header.dword_0 This is in sync with what the Linux UFS driver does, i.e. set the byte0 equal to TASK_TAG (see [1]). Setting it to a fixed value of 0x1f is wrong as we define TASK_TAG as 0 inside u-boot ufs framework. So, instead we should use the macro value directly. [1]. https://github.com/torvalds/linux/blob/master/drivers/ufs/core/ufshcd.c#L2705 Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
2023-07-14drivers: led: bcm6753: do not use null label to find the topPhilippe Reynes1-54/+60
This driver considers that a node with an empty label is the top. But the led class has changed, if a label is not provided for a led, the label is filed with the node name. So we update this driver to use a wrapper to manage the top led node. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2023-07-14net: ti: am65-cpsw-nuss: Use dedicated port mode control registersAndreas Dannenberg1-3/+6
The different CPSW sub-system Ethernet ports have different PHY mode control registers. In order to allow the modes to get configured independently only the register for the port in question must be accessed, otherwise we would just be re-configuring the mode for port 1, while leaving all others at their power-on defaults. Fix this issue by adding a port-number based offset to the mode control base register address based on the fact that the control registers for the different ports are spaced exactly 0x4 bytes apart. Fixes: 9d0dca1199d1 ("net: ethernet: ti: Introduce am654 gigabit eth switch subsystem driver") Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Reviewed-by: Siddharth Vadapalli <s-vadapalli@ti.com>
2023-07-14firmware: scmi: return a right errno for SCMI status codeAKASHI Takahiro1-1/+1
scmi_to_linux_errno() is set to return an appropriate errno which corresponds to a given SCMI status code. But the current implementation always returns the same value. Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
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