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2023-12-13led-uclass: do not create fallback label for top-level nodeRasmus Villemoes1-1/+1
Many existing drivers, and led-uclass itself, rely on uc_plat->label being NULL for the device representing the top node, as opposed to the child nodes representing individual LEDs. This means that the drivers whose .probe methods rely on this were broken by commit 83c63f0d1185 ("led: Move OF "label" property parsing to core"), and also that the top node wrongly shows up with 'led list'. Binding the same driver to the top node as to the individual child nodes is arguably wrong, and the approach of using a UCLASS_NOP driver for the top node is probably better - this has for example been done in commit 01074697801b ("led: gpio: Use NOP uclass driver for top-level node") and commit 910b01c27c04 ("drivers: led: bcm6753: do not use null label to find the top") Until remaining affected drivers are fixed, we can use a heuristic that only sets the label to the fallback value derived from the node name if the node does not have a "compatible" property - i.e., if it has been bound to the LED driver explicitly via device_bind_driver_to_node(). This is similar to what commit e3aa76644c2a ("led: gpio: Check device compatible string to determine the top level node") did for gpio_led, but that fix was then supplanted by commit 01074697801b ("led: gpio: Use NOP uclass driver for top-level node") Fixes: 83c63f0d1185 ("led: Move OF "label" property parsing to core") Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2023-12-13led-uclass: honour ->label field populated by driver's own .bindRasmus Villemoes1-1/+3
If the driver's own .bind method has populated uc_plat->label, don't override that. This is necessary for an upcoming driver for ti,lp5562, where the DT binding unfortunately says to use "chan-name" and not "label". Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com> Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2023-12-13clk: zynqmp: enable topsw_lsbus clockVenkatesh Yadav Abbarapu1-0/+1
Display port is using topsw_lsbus clock, it is failing while enabling the clock, so enable the topsw_lsbus clock. Signed-off-by: Sreekanth Sunnam <sreekanth.sunnam@amd.com> Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Link: https://lore.kernel.org/r/20231204084515.9488-1-venkatesh.abbarapu@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-12-13drivers: misc: Kconfig: Fix SPL_FS_LOADER promptAlexander Gendin1-1/+1
Both FS_LOADER and SPL_FS_LOADER have the same menu prompt. To avoid confusion, make prompt for SPL_FS_LOADER different. Signed-off-by: Alexander Gendin <agendin@matrox.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-12-13clk: imx8mn: add pwm clocksNicolas Heemeryck1-0/+30
Based on Linux kernel 6.7-rc4, add necessary clocks for the PWM controllers. Signed-off-by: Nicolas Heemeryck <nicolas.heemeryck@devialet.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2023-12-13phy: phy-imx8mq-usb: Remove .exit operationFabio Estevam1-6/+0
Currently, when running "ums 0 mmc 2" and breaking it via CTRL + C, the following message is seen: u-boot=> ums 0 mmc 1 UMS: LUN 0, dev mmc 1, hwpart 0, sector 0x0, count 0x1dacc00 CTRL+C - Operation aborted clk usb_phy_root_clk already disabled The USB PHY clock is disabled twice: first it gets disabled inside imx8mq_usb_phy_power_off(), then it is disabled again inside imx8mq_usb_phy_exit(). Let the USB PHY clock be disabled only once inside imx8mq_usb_phy_power_off() by removing the .exit operation. Signed-off-by: Fabio Estevam <festevam@denx.de> Reviewed-by: Marek Vasut <marex@denx.de>
2023-12-13net: phy: realtek: Add support for RTL8211F(D)(I)-VD-CGSébastien Szymanski1-0/+14
Add support for the RTL8211F(D)(I)-VD-CG PHY present on the i.MX93 EVK board. Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
2023-12-13net: dwc_eth_qos: add i.MX93 supportSébastien Szymanski2-0/+7
Add support for DWC EQoS MAC on i.MX93. Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2023-12-13ddr: imx: Save the FW loading if it hasn't changedShawn Guo1-0/+7
Function ddr_load_train_firmware() is called 4 times in a loop by ddr_cfg_phy(). The first 3 calls are all '1D' type and just loading the same FWs. Let's add a type check and save 2 of them. This helps to reduce DDRPHY training time from 269 ms down to 212 ms, and thus speed up boot time ~ 50 ms. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Reviewed-by: Fabio Estevam <festevam@denx.de>
2023-12-13mailbox: zynqmp: support mulitple mboxes via device-treeTanmay Shah2-13/+74
As of now only one mailbox agent is supported by mailbox driver. On zynqmp platform there are about 7 mailbox agents which can communicate over same IPI channel to U-Boot. This patch series introduces new "zynqmp_ipi_dest" driver which adds one to multi-channel mailbox support. Following format in device-tree is expected as per latest bindings: zynqmp-ipi { compatible = "xlnx,zynqmp-ipi-mailbox"; mbox_1: mailbox@1 { /* New compatible for child node */ compatible = "xlnx,zynqmp-ipi-dest-mailbox"; ... }; ... mbox_n: mailbox@n { compatible = "xlnx,zynqmp-ipi-dest-mailbox"; ... } }; Then mailbox client uses child mailbox node as following: ipi-dest-1 { ... mboxes = <mbox_1 0>, <mbox_1 1>; mbox-names = "tx", "rx"; ... }; New "zynqmp_ipi_dest" driver is for devices with "xlnx,zynqmp-ipi-dest-mailbox" compatible string. This driver will take care of mailbox send recv ops and it replaces previous "zynqmp_ipi" driver. Now "zynqmp_ipi" driver simply binds each child device with "zynqmp_ipi_dest" driver. However, its important to maintain backward comaptibility with previous bindings where child node does not have compatible string. In such case, new driver isn't probed by U-Boot during boot and system fails to boot. To resolve this issue firmware-zynqmp.c driver probes all the IPI parent node driver which binds each child node device with "zynqmp_ipi_dest" driver. This makes sure corresponding child driver will be probed when requested using mbox_get_by_name or mbox_get_by_idx framework calls. This way multiple mailbox agents are supported in device-tree without breaking previous binding support. Signed-off-by: Tanmay Shah <tanmay.shah@amd.com> Link: https://lore.kernel.org/r/20231204215620.63334-4-tanmay.shah@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-12-13mailbox: add el3 support only for zynqmp platformTanmay Shah1-0/+10
If U-Boot is running in Exception Level 3 then use hardcode register values for mailbox message passing with PMU. This is only supported for zynqmp platform. Signed-off-by: Tanmay Shah <tanmay.shah@amd.com> Link: https://lore.kernel.org/r/20231204215620.63334-3-tanmay.shah@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-12-13mailbox: zynqmp: support smc calls to TF-ATanmay Shah1-2/+86
Use SMC calls to TF-A to operate IPI for execution level below 3. For EL3 use hardcode IPI registers as TF-A isn't available in EL3. Hence, in EL3 remote and local IPI ids retrieved using xlnx,ipi-id property are unused. Signed-off-by: Tanmay Shah <tanmay.shah@amd.com> Link: https://lore.kernel.org/r/20231204215620.63334-2-tanmay.shah@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-12-13drivers: xilinx_spi: Probe fifo_depth at runtimeMayuresh Chitale1-0/+23
If the fifo-size DT parameter is not provided then probe the controller's fifo depth at runtime. This is ported from a patch in the Linux Xilinx SPI driver. Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com> Reviewed-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/1422029330-10971-5-git-send-email-ricardo.ribalda@gmail.com Tested-by: Love Kumar <love.kumar@amd.com> Link: https://lore.kernel.org/r/20231116164336.140171-4-mchitale@ventanamicro.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-12-13drivers: xilinx_spi: Add xfer callbackMayuresh Chitale1-0/+13
Add the xfer callback which is used by the MMC_SPI driver and generally by the dm_spi_xfer callback. Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com> Tested-by: Love Kumar <love.kumar@amd.com> Link: https://lore.kernel.org/r/20231116164336.140171-3-mchitale@ventanamicro.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-12-13drivers: xilinx_spi: Use udevice in start_tranferMayuresh Chitale1-16/+16
Modify start_transfer and related functions to take a udevice parameter as input instead of spi_slave. This is needed so that start_transfer can be used directly via the xfer callback. Also fix a compiler warning. Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com> Tested-by: Love Kumar <love.kumar@amd.com> Link: https://lore.kernel.org/r/20231116164336.140171-2-mchitale@ventanamicro.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-12-13pci: xilinx: Enable MMIO regionMayuresh Chitale1-0/+8
The host bridge MMIO region is disabled by default due to which MMIO accesses cause an exception. Fix it by setting the bridge enable bit. This change is ported from the linux pcie-xilinx driver. Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com> Reviewed-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/20231116165103.140968-3-mchitale@ventanamicro.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-12-13pci: xilinx: Fix "reg" not found errorMayuresh Chitale1-17/+12
Fix the driver to use the dev_read_addr_size API to fetch the reg property from the DT. Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com> Link: https://lore.kernel.org/r/20231116165103.140968-2-mchitale@ventanamicro.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-12-13net: axi_emac: Use reg property for DMA registersMayuresh Chitale1-5/+4
As per the xlnx,axi-ethernet-1.00.a DT documentation in linux, the AXI DMA registers can be obtained via the reg property or via a separate node for the axistream DMA controller. Currently only the latter is supported, so add support to fetch the DMA controller registers from the "reg" property. Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com> Reviewed-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/20231116164024.139934-1-mchitale@ventanamicro.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-12-09Merge https://source.denx.de/u-boot/custodians/u-boot-riscvTom Rini4-0/+346
- StarFive: Add StarFive watchdog driver - VisionFive2: Support device tree overlay for VisionFive2 board - Andes: Fix PLIC-SW setting - RISC-V: Fix NVMe support by implying NVME_PCI for QEMU - RISC-V: Fix binman for 64 bit format load address
2023-12-09mtd: spi-nor: add flash model w25q01/02 supportJim Liu1-0/+10
add flash w25q01jv, w25q01jvfim and w25q02jv support Signed-off-by: Jim Liu <JJLIU0@nuvoton.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2023-12-09spi: cadence_qspi: Select flash subnode at runtimeUdit Kumar2-1/+7
Currently spi driver gets flash parameter from first subnode. Few boards have more than one flash with different parameters and selection of flash is done by on board switch settings. In such case, uboot needs to be recompiled with updated device tree to align with board switch settings. This patch allows to select flash node at runtime. Boards those are supporting multiple flashes needs to implement cadence_qspi_get_subnode function and return correct flash node. Cc: Apurva Nandan <a-nandan@ti.com> Signed-off-by: Udit Kumar <u-kumar1@ti.com> Reviewed-by: Neha Malcom Francis <n-francis@ti.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2023-12-09mtd: spi-nor: Add MT25QU128AB paramsGodfrey Mwangi1-0/+1
Add Micron MT25QU128AB flash. Signed-off-by: Godfrey Mwangi <godmwan@microsoft.com> [jagan: fix the commit head] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2023-12-09mtd: spi-nor: Add MT25U01G part number for SPI NOR FlashJit Loon Lim1-0/+1
MT25QU01 OPN with 4B OPCODE support is currently not supported in source code and the driver reuses the definition for "n25q00a" which has the same silicon ID but is a slower part. Adding mt25u01g definition to the source code to support a faster read response for MT25QU01 QSPI NOR Flash device. Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com> [jagan: fix the id position and commit head] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2023-12-09drivers: mtd: spi: Add support for GD55LB02GEBIR SPI NOR flashTeik Heng Chong1-0/+5
Add Support for GigaDevice GD55LB02GEBIR SPI NOR flash as QSPI configuration flash Signed-off-by: Teik Heng Chong <teik.heng.chong@intel.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2023-12-06sunxi: H616: remove default AXP305 selectionAndre Przywara1-1/+0
The original H616 devices released about three years ago were typically paired with an X-Powers AXP305 PMIC. Newer devices uses the smaller AXP313, and there seem to be far more systems with this PMIC around now. Remove the default AXP305 selection for the H616 SoC from the Kconfig, and move the PMIC selection into the board defconfig files instead. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2023-12-06mtd: spi-nor: Add support for zBIT ZB25VQ128Andre Przywara2-0/+10
Add support for the zBIT ZB25VQ128 (128M-bit) SPI NOR flash memory chip, as used on the Xunlong Orange Pi Zero 3 board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Dragan Simic <dsimic@manjaro.org>
2023-12-06mtd: spi-nor: Add support for Silicon Kaiser sk25lp128Jonas Karlman2-0/+9
Add support for Silicon Kaiser sk25lp128 SPI NOR flash found in Pine64 PinePhone Pro and PineTab2. Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
2023-12-06spi: bcm63xx-hsspi: Fix compiler warningWilliam Zhang1-1/+1
When build for arm64 target, comipler reports the following warning: drivers/spi/bcm63xx_hsspi.c: In function ‘bcm63xx_hsspi_xfer_dummy_cs’: include/linux/kernel.h:184:17: warning: comparison of distinct pointer types lacks a cast 184 | (void) (&_min1 == &_min2); \ | ^~ drivers/spi/bcm63xx_hsspi.c:298:22: note: in expansion of macro ‘min’ 298 | size_t curr_step = min(step_size, data_bytes); This change fix this warning by casting the data_bytes to size_t. Fixes: 0e144ec38cbb ("spi: bcm63xx-hsspi: Add prepend mode support") Signed-off-by: William Zhang <william.zhang@broadcom.com>
2023-12-05watchdog: Add StarFive Watchdog driverChanho Park3-0/+337
Add to support StarFive watchdog driver. The driver is imported from linux kernel's drivers/watchdog/starfive-wdt.c without jh7100 support because there is no support of jh7100 SoC in u-boot yet. Howver, this patch has been kept the variant coding style because JH7100 can be added later and have a consistency with the linux driver. Signed-off-by: Chanho Park <chanho61.park@samsung.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2023-12-05clk: starfive: jh7110: Add watchdog clocksChanho Park1-0/+9
Add JH7110_SYSCLK_WDT_APB and JH7110_SYSCLK_WDT_CORE clocks for JH7110 watchdog device. Signed-off-by: Chanho Park <chanho61.park@samsung.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2023-12-04Merge tag 'v2024.01-rc4' into nextTom Rini8-54/+118
Prepare v2024.01-rc4 # -----BEGIN PGP SIGNATURE----- # # iQGzBAABCgAdFiEEGjx/cOCPqxcHgJu/FHw5/5Y0tywFAmVuHrwACgkQFHw5/5Y0 # tyy3Tgv+LB/X0ZR3IHnu1mvQ7kpOFvAjjKr0BUpcEEzsrDZeJnS6sy06m+REez2E # UmuLeKFj5NUCYXNKtxn2+gVnJt8Tk6ftxhMTiZHmR4Y4NVc5aPtqYmVsv6Q29j0U # mcg7AGcZTniu9/naNM+ZcDeHzLDAB0whmE9eVfixXVgyitILoLHNdFiQ7W4oR7Kh # /mBgdMDBS3rqiRi6CuqKUnl4ADX8T3AXaSfi3hqOC5Pj+HPkZSUfyWx31mu9mN1D # wXTHASZX06Dop25fm/ZSdWk1blBw29WqRiJBdwNatvyC5pqMsotTvAfH2AcHBEYg # tpoper+WDOBAipt6b6Y1B7q4VPvJ97L9dFCAYqN0nGCe+rkdi+k+cly7M6Ye9xLt # e7rVUfnKgIMP8jkLcVBYoWkFY5FiJ82O5qjoF5N3dAuHeWacDFsB5TugDTOQvblH # LWCmcIyU1N9Ma/Ib0rTvNduvpBUYBKXYlD1+rjPZUbTUnfc79mf+ReFpcoW6Kxh+ # bkz81p8P # =ebIZ # -----END PGP SIGNATURE----- # gpg: Signature made Mon 04 Dec 2023 01:47:24 PM EST # gpg: using RSA key 1A3C7F70E08FAB1707809BBF147C39FF9634B72C # gpg: Good signature from "Thomas Rini <trini@konsulko.com>" [ultimate]
2023-12-04watchdog: Correct watchdog timeout print messageChanho Park1-1/+2
The wdt_start function takes timeout_ms as a parameter and starts the watchdog with this value. However, when you output the message, it shows the default timeout value for the watchdog device. So this patch fixes that part to output the correct timeout value. Before --> StarFive # wdt start 3000 WDT: Started watchdog@13070000 without servicing (60s timeout) After --> StarFive # wdt start 3000 WDT: Started watchdog@13070000 without servicing (3s timeout) Fixes: c2fd0ca1a822 ("watchdog: Integrate watchdog triggering into the cyclic framework") Signed-off-by: Chanho Park <chanho61.park@samsung.com> Reviewed-by: Stefan Roese <sr@denx.de>
2023-12-01usb: USB_XHCI_PCI depends on PCIHeinrich Schuchardt1-1/+1
Compiling with CONFIG_USB_XHCI_PCI and CONFIG_PCI=n results in usb/host/xhci-pci.c:48:(.text.xhci_pci_probe+0x44): undefined reference to `dm_pci_write_config32 Add the missing Kconfig dependency. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Marek Vasut <marex@denx.de>
2023-12-01usb: dwc3-generic: Use combined glue and ctrl node for RK3588Jonas Karlman1-0/+1
Like Rockchip RK3328 and RK3568, the RK3588 also have a single node to represent the glue and ctrl for USB 3.0. Use rk_ops as driver data to select correct ctrl node for RK3588 DWC3. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Marek Vasut <marex@denx.de>
2023-12-01usb: xhci: Fix DMA address calculation in queue_trbHector Martin1-1/+4
We need to get the DMA address before incrementing the pointer, as that might move us onto another segment. Signed-off-by: Hector Martin <marcan@marcan.st> Reviewed-by: Marek Vasut <marex@denx.de>
2023-12-01usb: xhci: Do not panic on event timeoutsHector Martin1-2/+3
Now that we always check the return value, just return NULL on timeouts. We can still log the error since this is a problem, but it's not reason to panic. Signed-off-by: Hector Martin <marcan@marcan.st> Reviewed-by: Marek Vasut <marex@denx.de>
2023-12-01usb: xhci: Fail on attempt to queue TRBs to a halted endpointHector Martin1-1/+2
This isn't going to work, don't pretend it will and then end up timing out. Signed-off-by: Hector Martin <marcan@marcan.st> Reviewed-by: Marek Vasut <marex@denx.de>
2023-12-01usb: xhci: Recover from halted bulk endpointsHector Martin1-0/+8
There is currently no codepath to recover from this case. In principle we could require that the upper layer do this explicitly, but let's just do it in xHCI when the next bulk transfer is started, since that reasonably implies whatever caused the problem has been dealt with. Signed-off-by: Hector Martin <marcan@marcan.st> Reviewed-by: Marek Vasut <marex@denx.de>
2023-12-01usb: xhci: Allow context state errors when halting an endpointHector Martin1-2/+4
There is a race where an endpoint may halt by itself while we are trying to halt it, which results in a context state error. See xHCI 4.6.9 which mentions this case. This also avoids BUGging when we attempt to stop an endpoint which was already stopped to begin with, which is probably a bug elsewhere but not a good reason to crash. Signed-off-by: Hector Martin <marcan@marcan.st> Reviewed-by: Marek Vasut <marex@denx.de>
2023-12-01usb: xhci: Better error handling in abort_td()Hector Martin1-12/+22
If the xHC has a problem with our STOP ENDPOINT command, it is likely to return a completion directly instead of first a transfer event for the in-progress transfer. Handle that more gracefully. We still BUG() on the error code, but at least we don't end up timing out on the event and ending up with unexpected event errors. Signed-off-by: Hector Martin <marcan@marcan.st> Reviewed-by: Marek Vasut <marex@denx.de>
2023-12-01usb: xhci: Guard all calls to xhci_wait_for_eventHector Martin2-0/+24
xhci_wait_for_event returns NULL on timeout, so the caller always has to check for that. This addresses immediate explosions in this part of the code when timeouts happen, but not the root cause for the timeout. Signed-off-by: Hector Martin <marcan@marcan.st> Reviewed-by: Marek Vasut <marex@denx.de>
2023-11-30Merge branch 'staging' of ↵Tom Rini3-2/+40
https://source.denx.de/u-boot/custodians/u-boot-tegra into next Device tree improvents for Paz00 and DM PMIC convertion of recently merged Tegra boards.
2023-11-29configs: keystone2: Do not include hardware.hAndrew Davis2-0/+2
This is a hacky way to have this file included in all source files that include common.h, instead just include from the files that need it. Signed-off-by: Andrew Davis <afd@ti.com>
2023-11-29xen: pvblock: fix the maximum io size in one operationAKASHI Takahiro1-1/+2
The current implementation may cause BUG_ON() in blkfront_aio() BUG_ON(n > BLKIF_MAX_SEGMENTS_PER_REQUEST); In pvblock_iop(), a read/write operation will be split into smaller chunks of data so that the size in one access (aio_nbytes) is limited to, at the maximum, BLKIF_MAX_SEGMENTS_PER_REQUEST * PAGE_SIZE But this works only if when the *buffer* passed in to pvblock_io() is page-aligned. If not, the given data region may stand across (BLKIF_MAX_SEGMENTS_PER_REQUEST + 1) pages. See the logic in blkfront_aio(): start = (uintptr_t)aiocbp->aio_buf & PAGE_MASK; end = ((uintptr_t)aiocbp->aio_buf + aiocbp->aio_nbytes + PAGE_SIZE - 1) & PAGE_MASK; Then this will lead to BUG_ON() above. This can be fixed by decreasing the maximum size of aio_nbytes. Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org> Fixes: commit 3a739cc6c948 ("xen: pvblock: Implement front-back protocol and do IO")
2023-11-29timer-uclass: Always use "clock-frequency" property as fallbackAlex Bee1-6/+6
Currently the "clock-frequency" DT property is only being considered as an fallback if either there is no clock driver, the clock driver implements the request-op correctly or there is no clock defined for the timer at all. This patch makes "clock-frequency" also being picked as a fallback if getting the clock-rate fails, since clk_get(_by_index) will return no error, if a clock driver does not implement the request-op and does also not support getting the rate of the clock in question. timer_post_probe will take care if the property does not exist in the DT or is defined as 0. Signed-off-by: Alex Bee <knaerzche@gmail.com>
2023-11-28Merge patch series "cmd: add scmi command"Tom Rini2-37/+71
To quote the author: "Scmi" command will be re-introduced per Michal's request. The functionality is the same as I put it in my patch set of adding SCMI base protocol support, but made some tweak to make UT, "ut dm scmi_cmd," more flexible and tolerable when enabling/disabling a specific SCMI protocol for test purpose. Each commit may have some change history inherited from the preceding patch series. Test ==== The patch series was tested on the following platforms: * sandbox
2023-11-28firmware: scmi: support protocols on sandbox only if enabledAKASHI Takahiro2-37/+71
This change will be useful when we manually test SCMI on sandbox by enabling/disabling a specific SCMI protocol. Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-11-28Merge patch series "Import "string" I/O functions from Linux"Tom Rini8-97/+5
To quote the author: This series imports generic versions of ioread_rep/iowrite_rep and reads/writes from Linux. Some cleanup is done to make sure that all platforms have proper defines for implemented functions and there are no redefinitions.
2023-11-28musb-new: Remove implementation of io.h functionsIgor Prusov1-24/+0
Since {read,write}s{l, w, b}() functions are now supported in linux/io.h there is no need to add custom implementation to driver. Signed-off-by: Igor Prusov <ivprusov@salutedevices.com>
2023-11-28treewide: Include linux/io.h instead of asm-generic/io.hIgor Prusov4-4/+3
Directly including asm-generic/io.h may break build because it will cause redefenition of generic io macros if linux/io.h gets included later, hence replace it with direct include of linux/io.h Signed-off-by: Igor Prusov <ivprusov@salutedevices.com>
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