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2014-12-18x86: Rename coreboot-serial to x86-serialBin Meng2-7/+7
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
2014-12-18x86: ich6-gpio: Add Intel Tunnel Creek GPIO supportBin Meng1-8/+12
Intel Tunnel Creek GPIO register block is compatible with current ich6-gpio driver, except the offset and content of GPIO block base address register in the LPC PCI configuration space are different. Use u16 instead of u32 to store the 16-bit I/O address of the GPIO registers so that it could support both Ivybridge and Tunnel Creek. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
2014-12-16Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini4-7/+48
2014-12-16Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini5-0/+1747
2014-12-15Merge git://git.denx.de/u-boot-x86Tom Rini10-129/+157
2014-12-15qe/deep-sleep: modify qe deep-sleep for generic boardZhao Qiang1-0/+11
Deep sleep for generic board is supported now, modify qe deep-sleep code to adapt it. Signed-off-by: Zhao Qiang <B45475@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2014-12-15crypto/fsl: Fix RNG instantiation failure.gaurav rana1-1/+1
Corrected the order of arguments in memset in run_descriptor function. Wrong order of argumnets led to improper initialization of members of struct type result. This resulted in RNG instantiation error. Signed-off-by: Gaurav Rana <gaurav.rana@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2014-12-15net/fm: update ft_fixup_port to differentiate dual-role macShengzhou Liu1-5/+16
we need to differentiate dual-role MACs into two types: MACs with 10GEC enumeration consistent with DTSEC enumeration(defined by CONFIG_FSL_FM_10GEC_REGULAR_NOTATION) and other MACs without CONFIG_FSL_FM_10GEC_REGULAR_NOTATION defined. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2014-12-15driver/ddr/fsl: Fix MRC_CYC calculation for DDR3York Sun1-1/+20
For DDR controller version 4.7 or newer, MRC_CYC (mode register set cycle time) is max(tMRD, tMOD). tMRD is 4nCK, or 8nCK (RDIMM). tMOD is max(12nCK, 15ns) according to JEDEC spec. DDR4 is not affected by this change. Signed-off-by: York Sun <yorksun@freescale.com>
2014-12-13x86: ich-spi: Add Intel Tunnel Creek SPI controller supportBin Meng1-1/+2
Add Intel Tunnel Creek SPI controller support which is an ICH7 compatible device. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
2014-12-13x86: Add a simple superio driver for SMSC LPC47MBin Meng2-0/+34
On most x86 boards, the legacy serial ports (io address 0x3f8/0x2f8) are provided by a superio chip connected to the LPC bus. We must program the superio chip so that serial ports are available for us. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
2014-12-13x86: ich6-gpio: Move setup_pch_gpios() to board support codesBin Meng1-51/+2
Movie setup_pch_gpios() in the ich6-gpio driver to the board support codes, so that the driver does not need to know any platform specific stuff (ie: include the platform specifc chipset header file). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
2014-12-13x86: ich-spi: Set the tx operation mode for ich 7Bin Meng1-2/+7
ICH 7 SPI controller only supports byte program (02h) for SST flash. Word program (ADh) is not supported. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2014-12-13x86: ich-spi: Set the rx operation mode for ich 7Bin Meng1-0/+4
ICH 7 SPI controller only supports array read command (03h). Fast array read command (0Bh) is not supported. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2014-12-13sf: Enable byte program supportJagannadha Sutradharudu Teki3-12/+19
Enabled byte program support for sst flashes in sf. Few controllers will only support BP, so this patch gives a tx transfer flag to set the BP so-that sf will operate on byte program transfer. A new TX operation mode SPI_OPM_TX_BP is introduced for such SPI controller to use byte program op for SST flash. Signed-off-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
2014-12-13spi: sf: Support byte program for sst spi flashBin Meng2-0/+33
Currently if SST flash advertises SST_WP flag in the params table the word program command (ADh) with auto address increment will be used for the flash write op. However some SPI controllers do not support the word program command (like the Intel ICH 7), the byte programm command (02h) has to be used. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2014-12-13spi: Fix flag collision for SST_WPSimon Glass1-1/+1
At present SECT_4K is the same as SST_WP so we cannot tell these apart. Fix this so that the table in sf_params.c can be used correctly. Reported-by: Jens Rottmann <Jens.Rottmann@adlinktech.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2014-12-13sf: Fix look for the fastest read commandJagannadha Sutradharudu Teki3-56/+60
Few of the spi controllers are only supports array slow read which is quite different behaviour compared to others. So this fix on sf will correctly handle the slow read supported controllers. Signed-off-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
2014-12-13bios_emulator: Correct ordering of includesSimon Glass2-2/+2
We should include common.h before other includes. This actually causes a build error on chromebook_link. Signed-off-by: Simon Glass <sjg@chromium.org>
2014-12-13gpio: intel_ich6: Set correct gpio output value in ich6_gpio_direction_output()Axel Lin1-0/+2
Current code does not set gpio output value in ich6_gpio_direction_output(), fix it. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Simon Glass <sjg@chromium.org>
2014-12-13x86: ich-spi: Fix a bug of reading from a non-64 bytes aligned addressBin Meng1-15/+2
The ich spi controller driver spi_xfer() tries to align reading address to 64 bytes when doing spi data in, which causes a bug of either infinite loop or a huge size memcpy(). Actually the ich spi controller does not have such requirement of 64 bytes alignment when reading data from spi slave devices. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
2014-12-12Merge branch 'master' of git://git.denx.de/u-boot-mmcTom Rini3-35/+74
2014-12-12mmc: dw_mmc: Use active DDR mode flagAndrew Gabbasov1-1/+1
The card_caps bit should denote the card capability to use DDR mode, but we need the flag indicating that the DDR mode is active. Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
2014-12-12mmc: Fix block length for DDR modeAndrew Gabbasov1-0/+6
Block length for write and read commands is fixed to 512 bytes when the card is in Dual Data Rate mode. If block length read from CSD is different, make sure the driver will use correct length in all further calculations and settings. Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
2014-12-12mmc: Fix Dual Data Rate capability recognitionAndrew Gabbasov1-1/+1
Since the driver doesn't work in 1.2V or 1.8V signaling level modes, Dual Data Rate mode can be supported by the driver only if it is supported by the card in regular 3.3V mode. So, check for a particular single bit in card type field. Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
2014-12-12mmc: Fix handling of bus widths and DDR card capabilitiesAndrew Gabbasov1-21/+31
If the MMC_MODE_DDR_52MHz flag is set in card capabilities bitmask, it is never cleared, even if switching to DDR mode fails, and if the controller driver uses this flag to check the DDR mode, it can take incorrect actions. Also, DDR related checks in mmc_startup() incorrectly handle the case when the host controller does not support some bus widths (e.g. can't support 8 bits), since the host_caps is checked for DDR bit, but not bus width bits. This fix clearly separates using of card_caps bitmask, having there the flags for the capabilities, that the card can support, and actual operation mode, described outside of card_caps (i.e. bus_width and ddr_mode fields in mmc structure). Separate host controller drivers may need to be updated to use the actual flags. Respectively, the capabilities checks in mmc_startup are made more correct and clear. Also, some clean up is made with errors handling and code syntax layout. Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
2014-12-12mmc: exynos_dw-mmc: change debug messageJaehoon Chung1-10/+12
To debug more exactly, add the index for device. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2014-12-12MMC: add MMC_VERSION_5_0Markus Niebel1-0/+3
Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
2014-12-12MMC: fix user capacity for partitioned eMMC cardMarkus Niebel1-0/+15
if the card claims to be high capacity and the card is partitioned the capacity shall still be read from ext_csd SEC_COUNT even if the resulting capacity is smaller than 2 GiB Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
2014-12-12mmc: Cosmetic fix for nicer, aligned device list printoutLubomir Popov1-2/+5
If print_mmc_devices() was called with a '\n' separator (as done for example by the "mmc list" command), it offset the 2-nd and all subsequent lines by one space. Fixing this. Signed-off-by: Lubomir Popov <l-popov@ti.com>
2014-12-11Merge git://git.denx.de/u-boot-dmTom Rini12-294/+946
2014-12-11Merge branch 'master' of git://git.denx.de/u-boot-usbTom Rini3-5/+52
Conflicts: board/freescale/mx6sxsabresd/mx6sxsabresd.c Signed-off-by: Tom Rini <trini@ti.com>
2014-12-11Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriqTom Rini8-54/+352
2014-12-11dm: i2c: tegra: Convert to driver modelSimon Glass2-267/+126
This converts all Tegra boards over to use driver model for I2C. The driver is adjusted to use driver model and the following obsolete CONFIGs are removed: - CONFIG_SYS_I2C_INIT_BOARD - CONFIG_I2C_MULTI_BUS - CONFIG_SYS_MAX_I2C_BUS - CONFIG_SYS_I2C_SPEED - CONFIG_SYS_I2C This has been tested on: - trimslice (no I2C) - beaver - Jetson-TK1 It has not been tested on Tegra 114 as I don't have that board. Acked-by: Heiko Schocher <hs@denx.de> Signed-off-by: Simon Glass <sjg@chromium.org>
2014-12-11dm: device: Add newline to debug() messagesSimon Glass1-3/+3
Some of these are missing a newline. Add it. Signed-off-by: Simon Glass <sjg@chromium.org>
2014-12-11dm: Add a simple EEPROM driverSimon Glass2-0/+52
There seem to be a few EEPROM drivers around - perhaps we should have a single standard one? This simple driver is used for sandbox testing, but could be pressed into more active service. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de> Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-12-11dm: i2c: Add an I2C EEPROM simulatorSimon Glass2-0/+171
To enable testing of I2C, add a simple I2C EEPROM simulator for sandbox. It supports reading and writing from a small data store. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de> Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-12-11dm: i2c: Add a sandbox I2C driverSimon Glass2-1/+112
This driver includes some test features such as only supporting certain bus speeds. It passes its I2C traffic through to an emulator. Acked-by: Heiko Schocher <hs@denx.de> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-12-11dm: i2c: Add I2C emulation driver for sandboxSimon Glass2-0/+15
In order to test I2C we need some sort of emulation interface. Add hooks to allow a driver to emulate an I2C device for sandbox. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de> Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-12-11dm: i2c: Add a uclass for I2CSimon Glass2-0/+467
The uclass implements the same operations as the current I2C framework but makes some changes to make it fit driver model better: - Remove the chip address from API calls - Remove the address length from API calls - Remove concept of 'current' I2C bus - Drop all existing init functions Acked-by: Heiko Schocher <hs@denx.de> Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Signed-off-by: Simon Glass <sjg@chromium.org>
2014-12-11dm: serial_pl01x: Add missing private data sizeSimon Glass1-0/+1
The private data size is missing from the driver, so we store it at 0, which causes problems when something overwrites memory at 0. Fix this. Change-Id: I6f551ee905b0064ae8343e41e46450c37c8c8c1a Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Stephen Warren <swarren@wwwdotorg.org>
2014-12-11lib: string: move strlcpy() to a common placeMasahiro Yamada1-24/+0
Move strlcpy() definition from drivers/usb/gadget/ether.c to lib/string.c because it is a very useful function. Let's add the prototype to include/linux/string.h too. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org>
2014-12-11driver/mtd: Fix IFC compilation warningsJaiprakash Singh1-1/+1
'eccstat' array elements might be used uninitialized Signed-off-by: Jaiprakash Singh <b44839@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2014-12-11fsl/sleep: updated the deep sleep framework for QorIQ platformsTang Yuantian3-53/+103
With the introducing of generic board and ARM-based cores, current deep sleep framework doesn't work anymore. This patch will convert the current framework to adapt this change. Basically it does: 1. Converts all the Freescale's DDR driver to support deep sleep. 2. Added basic framework support for ARM-based and PPC-based cores separately. Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2014-12-11drivers: usb: fsl: Check USB Erratum A007792 applicabilityNikhil Badola1-0/+9
Check USB Erratum A007792 applicability. If applicable, add corresponding property in the device tree via device tree fixup Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2014-12-11drivers: usb: fsl: Add USB device-tree errata frameworkNikhil Badola1-0/+64
Add a new framework for fsl usb erratum handling to standardize erratum checking only inside Uboot. Information to kernel is passed via a boolean property corresponding to erratum, hence eliminating need for code duplication inside kernel Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com> Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2014-12-11drivers: usb: Make usb device-tree fixup code architecture independentNikhil Badola1-0/+113
move usb device tree fixup code from "arch/powerpc/" to "drivers/usb/" so that it works independent of architecture it is running on Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com> Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2014-12-11arm: ls102xa: Add NAND boot support for LS1021AQDS boardAlison Wang1-0/+10
This patch adds NAND boot support for LS1021AQDS board. SPL framework is used. PBL initialize the internal RAM and copy SPL to it, then SPL initialize DDR using SPD and copy u-boot from NAND flash to DDR, finally SPL transfer control to u-boot. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Alison Wang <alison.wang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2014-12-11arm: ls102xa: Update PCIe dts node statusMinghuan Lian2-0/+52
The patch changes PCIe dts node status to 'disabled' if the corresponding controller is disabled according to serdes protocol. Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2014-12-10Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini4-14/+18
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