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2020-06-25Merge tag 'xilinx-for-v2020.10' of ↵Tom Rini16-45/+76
https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze into next Xilinx changes for v2020.10 Versal: - xspi bootmode fix - Removing one clock from clk driver - Align u-boot memory setting with OS by default - Map TCM and OCM by default ZynqMP: - Minor DT improvements - Reduce console buffer for mini configurations - Add fix for AMS - Add support for XDP platform Zynq: - Support for AES engine - Enable bigger memory test by default - Extend documentation for SD preparation - Use different freq for Topic miami board mmc: - minor GD pointer removal net: - Support fixed-link cases by zynq gem - Fix phy looking loop in axi enet driver spi: - Cleanup global macros for xilinx spi drivers firmware: - Add support for pmufw reloading fpga: - Improve error status reporting common: - Remove 4kB addition space for FDT allocation
2020-06-24net: xilinx: axi_emac: Fix endless loop when no PHYs are connectedPatrick van Gelder1-1/+2
The index used to iterate over the possible PHYs in axiemac_phy_init was an unsigned int and decremented. Therefor it was always >= 0 and never exited the loop. Signed-off-by: Patrick van Gelder <patrick.vangelder@nl.bosch.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24arm64: xilinx: Print fpga error value in hexT Karthik Reddy2-2/+2
Fpga returns error value when fails, error status should be printed in hex format. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24spi: zynq_[q]spi: Convert config's to macro'sAshok Reddy Soma3-12/+6
Remove below config options and convert them to macros. They have never been configured to different values than default one. And also it makes sense to reduce the config_whitelist. CONFIG_SYS_ZYNQ_SPI_WAIT CONFIG_SYS_ZYNQ_QSPI_WAIT CONFIG_XILINX_SPI_IDLE_VAL Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24net: gem: Disable PCS autonegotiation in case of fixed-linkMichal Simek1-0/+4
Disable PCS autonegotiation if fixed-link node is present in device tree. This way systems with multiple GEM instances with a combination of SGMII-fixed and SGMII-PHY will work. Reported-by: Goran Marinkovic <goran.marinkovic@psi.ch> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24fpga: zynqpl: Flush dcache only for non-bitstream dataT Karthik Reddy1-2/+3
In case of aes decryption destination address range must be flushed before transferring decrypted data to destination. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24fpga: zynqpl: Check if aes engine is enabledIbai Erkiaga1-0/+8
AES engine cannot be used if has not been enabled at boot time with an encrypted boot image. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Acked-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24fpga: zynqpl: Check fpga config completionT Karthik Reddy1-2/+17
This patch checks fpga config completion when a bitstream is loaded into PL. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24fpga: zynqpl: Correct PL bitstream loading sequence for zynqaesSiva Durga Prasad Paladugu1-3/+4
Correct the PL bitstream loading sequence for zynqaes command by clearing the loaded PL bitstream before loading the new encrypted bitstream using the zynq aes command. This was done by setting the PROG_B same as in case of fpgaload commands. This patch fixes the issue of loading the encrypted PL bitstream onto the PL in which a bitstream has already been loaded successfully. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24firmware: zynqmp: Change panic logic in zynqmp_pmufw_load_config_object()Michal Simek1-4/+15
There is no need to panic all the time when pmufw config object loading failed. The patch improves function logic to report permission deny case and also panic only for SPL case. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Luca Ceresoli <luca@lucaceresoli.net>
2020-06-24clk: versal: Remove alt_ref_clk from clock sourcesRajan Vaja1-7/+1
alt_ref_clk is applicable only for PS extended version. For PS base version there is no separate alt_ref_clk. It is tied with ref_clk, so remove it from driver. Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24mmc: zynq_sdhci: Remove global pointerMichal Simek1-2/+0
Driver is not calling gd anywhere that's why there is not need to define it. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-23gpio: mxc_gpio: change gpio index for i.MX8Ye Li1-1/+4
Since the i.MX8 GPIO banks are indexed from 0 not 1 on other i.MX platforms, so we have to adjust the index accordingly. Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com>
2020-06-22net: fec: Allow the PHY node to be retrievedFabio Estevam2-2/+6
As we move towards driver model, it is required to let the FEC driver know how to properly deal with an Ethernet PHY subnode in the device tree. For example: &fec { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_microsom_enet_ar8035>; phy-handle = <&phy>; phy-mode = "rgmii-id"; phy-reset-duration = <2>; phy-reset-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; status = "okay"; mdio { #address-cells = <1>; #size-cells = <0>; phy: ethernet-phy@0 { reg = <0>; qca,clk-out-frequency = <125000000>; }; }; }; Currently the PHY node pointer is incorrectly associated with the Ethernel controller instead of the PHY node itself. This causes the PHY properties, such as "qca,clk-out-frequency" in the example above to not get parsed. Fix this problem by populating the phy_of_node node. Suggested-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: Fabio Estevam <festevam@gmail.com> Tested-by: Tom Rini <trini@konsulko.com>
2020-06-22phy: atheros: ar8035: Fix clock output calculationFabio Estevam1-4/+3
The clock ouput frequency is calculated incorrectly for AR8035 due to wrong masking of priv->clk_25m_reg and priv->clk_25m_mask. This same issue has been already fixed in the kernel by: commit b1f4c209d84057b6d40b939b6e4404854271d797 Author: Oleksij Rempel <o.rempel@pengutronix.de> Date: Wed Apr 1 11:57:32 2020 +0200 net: phy: at803x: fix clock sink configuration on ATH8030 and ATH8035 The masks in priv->clk_25m_reg and priv->clk_25m_mask are one-bits-set for the values that comprise the fields, not zero-bits-set. This patch fixes the clock frequency configuration for ATH8030 and ATH8035 Atheros PHYs by removing the erroneous "~". To reproduce this bug, configure the PHY with the device tree binding "qca,clk-out-frequency" and remove the machine specific PHY fixups. Fixes: 2f664823a47021 ("net: phy: at803x: add device tree binding") Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reported-by: Russell King <rmk+kernel@armlinux.org.uk> Reviewed-by: Russell King <rmk+kernel@armlinux.org.uk> Tested-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net> Apply the same fix in the U-Boot driver. Tested on a i.MX6 Hummingboard. Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Michael Walle <michael@walle.cc> Tested-by: Tom Rini <trini@konsulko.com>
2020-06-20Merge branch 'net' of https://gitlab.denx.de/u-boot/custodians/u-boot-sh ↵Tom Rini3-836/+1065
into next - Convert pcnet and eepro100 ethernet drivers to DM
2020-06-19Merge https://gitlab.denx.de/u-boot/custodians/u-boot-spi into nextTom Rini17-1215/+779
- Convert fsl_espi to driver model (Chuanhua) - Enable am335x baltos to DM_SPI (Jagan) - Drop few powerpc board which doesn't have DM enabled (Jagan)
2020-06-18Merge tag 'video-next' of ↵Tom Rini6-100/+71
https://gitlab.denx.de/u-boot/custodians/u-boot-video into next - migrate remaining imx5/imx6qd boards to DM_VIDEO - use 'vidconsole' stdout in nitrogen6x upgrade script - add option for selection of the vidconsole commands lcdputs and setcurs - allow building ipuv3 driver with disabled CONFIG_PANEL - make backlight and panel drivers optional - remove useless code from ipuv3 driver - extend existing DM_VIDEO work-around for console name to support 'vga' - remove non-DM code in ipuv3
2020-06-18firmware: PSCI: Fix PSCI support for OF live treesJon Hunter1-3/+1
When CONFIG_OF_LIVE is enabled, dev_of_offset() cannot be used and if used returns an invalid offset. This causes the call to fdt_stringlist_get() in the psci_probe() to fail to read the 'method' property from the PSCI node for the device and hence prevents PSCI from working. Fix this by using the ofnode_read_string() API instead of the fdt_stringlist_get() because this will handle reading the property both when CONFIG_OF_LIVE is enabled or disabled. Due to the above problem and since commit 81ea00838c68 ("efi_loader: PSCI reset and shutdown") was added, the EFI system reset has been broken for Tegra210 and Tegra196 platforms. This also fixes the EFI system reset for these Tegra platforms. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Peter Robinson <pbrobinson@gmail.com>
2020-06-18video: ipuv3: remove non-DM codeAnatolij Gustschin2-44/+1
All ipuv3 users have been converted, drop obsolete code. Signed-off-by: Anatolij Gustschin <agust@denx.de>
2020-06-18net: pcnet: Add Kconfig entriesMarek Vasut1-0/+6
Add Kconfig entries for the pcnet driver and convert MIPS malta to use those. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-18net: pcnet: Add DM supportMarek Vasut1-1/+126
With all the changes in place, add support for DM into the pcnet driver. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-18net: pcnet: Split common and non-DM functionsMarek Vasut1-55/+94
Pull the common parts of functions out so they can be reused by both DM and non-DM code paths. The recv() function had to be reworked to fit into this scheme and this means it now only receives one packet at a time instead of spinning in an endless loop. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-18net: pcnet: Wrap name and enetaddr into private dataMarek Vasut1-15/+19
Instead of using the non-DM-only name and enetaddr in struct eth_device, add pointers into the private data which can either point to that non-DM name or a DM one later on. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-18net: pcnet: Wrap iobase into private dataMarek Vasut1-57/+46
Instead of using the non-DM-only iobase in struct eth_device, add one into the private data to make DM and non-DM operation possible. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-18net: pcnet: Pass private data through dev->privMarek Vasut1-10/+10
Get rid of the global point to private data, and rather pass it thought dev->priv. Also remove the unnecessary check for lp being non-NULL, since it is always NULL at this point. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-18net: pcnet: Wrap devbusfn into private dataMarek Vasut1-10/+9
Instead of using eth_device priv for this PCI devbusfn, free it so it could be used for driver private data, and wrap devbusfn into those driver private data. Note that using the name dev for the variable is a trick left for later, when DM support is in place, so dm_pci_virt_to_mem() can be used with minimal ifdeffery. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-18net: pcnet: Drop useless forward declarationsMarek Vasut1-6/+0
Remove those as they are not needed anymore. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-18net: pcnet: Move initialize function at the endMarek Vasut1-91/+89
Move the function at the end of the driver, so we could drop various forward declarations later. No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-18net: pcnet: Move private data allocation to initializeMarek Vasut1-13/+14
The private data allocation does not have to be done every time the NIC is initialized at run time, move the allocation to initialize function, which means it will be done only once when the driver starts. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-18net: pcnet: Replace memset+malloc with callocMarek Vasut1-2/+1
This combination of functions can be replaced with calloc(), make it so. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-18net: pcnet: Simplify private data allocationMarek Vasut1-21/+12
The current code is horribly complex. Both the RX and TX buffer descriptors are 16 bytes in size, the init block is 32 bytes in size, so simplify the code such that the entire private data of the driver are allocated cache aligned and the RX and TX buffer descriptors are part of the private data. This removes multiple malloc calls and cache flushes. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-18net: pcnet: Use PCI_DEVICE() to define PCI device compat listMarek Vasut1-1/+1
Use this macro to fully fill the PCI device ID table. This is mandatory for the DM PCI support, which checks all the fields. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-18net: pcnet: Drop PCNET_HAS_PROMMarek Vasut1-5/+0
All of one PCNET users has this option set, make this default and drop this config option. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-18net: pcnet: Drop typedef struct pcnet_priv_tMarek Vasut1-5/+5
Use struct pcnet_priv all over the place instead. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-18net: eepro100: Add Kconfig entriesMarek Vasut1-0/+6
Add Kconfig entries for the eepro100 driver and convert various boards. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18net: eepro100: Add DM supportMarek Vasut1-1/+128
Add support for driver model to the driver. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18net: eepro100: Split common parts of non-DM functions outMarek Vasut1-62/+100
Split the common code from the non-DM code, so it can be reused by the DM code later. As always, the recv() function had to be split into the actual receiving part and free_pkt part to fit with the DM. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18net: eepro100: Drop bd_t pointer from read_hw_addr()Marek Vasut1-2/+2
The pointer is unused, so drop it. Rename the function to start with the eepro100_ prefix. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18net: eepro100: Add RX/TX rings into the private dataMarek Vasut1-24/+35
The RX/TX DMA descriptor rings are per-device-instance private data, so move them into the private data. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18net: eepro100: Pass device private data into mdiobusMarek Vasut1-6/+3
Instead of doing ethernet device lookup by name every time there is an MDIO access, pass the driver private data via mdiobus priv to the MDIO bus accessors. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18net: eepro100: Pass device private data aroundMarek Vasut1-124/+140
This patch replaces the various uses of struct eth_device for accessing device private data with struct eepro100_priv, which is compatible both with DM and non-DM operation. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18net: eepro100: Introduce device private dataMarek Vasut1-3/+9
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18net: eepro100: Pass PCI BDF into bus_to_phys()/phys_to_bus()Marek Vasut1-14/+22
This is a trick in preparation for adding DM support. By passing in the PCI BDF into the bus_to_phys()/phys_to_bus() macros and calling that dev, we can substitute dev with udevice when DM support lands and do minor adjustment to the macros to support both DM and non-DM operation. No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18net: eepro100: Drop inline keywordMarek Vasut1-4/+4
Drop the inline keyword from the static functions, the compiler has a much better overview and can decide how to inline those functions much better. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18net: eepro100: Fix EE_*_CMD macrosMarek Vasut1-5/+5
Those macros depended on specific variable names to be declared at their usage sites, fix this by adding an argument to those macros and also protect the argument with braces. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18net: eepro100: Factor out MII registrationMarek Vasut1-17/+39
Pull the MII registration code into a separate function. Moreover, properly free memory in case any of the registration or allocation functions fail, so this fixes an existing memleak. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18net: eepro100: Switch from malloc()+memset() to calloc()Marek Vasut1-2/+1
Replace malloc()+memset() combination with calloc(), no functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18net: eepro100: Use PCI_DEVICE() to define PCI device compat listMarek Vasut1-4/+4
Use this macro to fully fill the PCI device ID table. This is mandatory for the DM PCI support, which checks all the fields. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18net: eepro100: Reorder functions in the driverMarek Vasut1-170/+160
Move the functions around in the driver to prepare it for DM conversion. Drop forward declarations which are not necessary anymore. No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
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