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2021-03-31Merge tag 'xilinx-for-v2021.07' of ↵WIP/31Mar2021-nextTom Rini3-94/+190
https://source.denx.de/u-boot/custodians/u-boot-microblaze into next Xilinx changes for v2021.07 net: - Fix gem PCS support spi: - Small trivial fixes zynq: - Enable time/timer commands - Update bitmain platform - Several DT changes zynqmp: - Update clock driver - mini config alignments - Add/update psu_init for zcu208/zcu216/zc1275 - Several DT changes - Enable efi debug command (also for Versal)
2021-03-30Merge tag 'u-boot-atmel-2021.07-a' of ↵WIP/30Mar2021-nextTom Rini1-3/+23
https://source.denx.de/u-boot/custodians/u-boot-atmel into next First set of u-boot-atmel features for 2021.07 cycle: This small feature set includes the implementation of the slew rate for the PIO4 pin controller device, and a fix for arm926ejs-based microprocessors that avoids a crash.
2021-03-30spi: xilinx_spi: Trivial fixes in axi qspi driverT Karthik Reddy1-5/+3
Use __func__ instead for function name in debug. Use Linux style u32 instead of uint32_t. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Acked-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-03-30clk: zynqmp: Fix clk dump valuesT Karthik Reddy1-81/+170
With "clk dump" command, few clocks are showing up incorrect values and some clocks are displayed as "unknown". Add missing clocks to zynqmp clock driver to display proper clocks rates. Implement a simple way to get clock source, instead of calling functions. Change existing functions to this simple mechanism. Fix gem clock name "gem_rx" to "gem_tx" which was incorrect. Change dbf_fpd & dbf_lpd clk names to dbg_fpd & dbg_lpd. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
2021-03-30net: gem: Fix setting PCS auto-negotiation stateRobert Hancock1-8/+17
The code was trying to disable PCS auto-negotiation when a fixed-link node is present and enable it otherwise. However, the PCS registers were being written before the PCSSEL bit was set in the network configuration register, and it appears that in this state, PCS register writes are ignored. The result is that the intended change only took effect on the second network operation that was performed, since at that time PCSSEL is already enabled. Fix the order of register writes so that PCS registers are only written to after the PCS is enabled. Fixes: 26e62cc971 ("net: gem: Disable PCS autonegotiation in case of fixed-link") Signed-off-by: Robert Hancock <robert.hancock@calian.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Reviewed-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-03-29Merge tag 'v2021.04-rc5' into nextWIP/29Mar2021-nextTom Rini7-19/+49
Prepare v2021.04-rc5
2021-03-27spi: spi-uclass: Add support to manually relocate spi memory opsT Karthik Reddy1-0/+11
Add spi memory operations to relocate manually when CONFIG_NEEDS_MANUAL_RELOC is enabled. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Acked-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
2021-03-27cpu: Rename SPL_CPU_SUPPORT to SPL_CPUSimon Glass2-6/+2
The _SUPPORT suffix is from an earlier time and interferes with use of the CONFIG_IS_ENABLED() macro. Rename the option to drop the suffix. Tidy up the TODO that prompted this. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-27sf: Support querying write-protectSimon Glass5-0/+38
This feature was dropped from U-Boot some time ago: f12f96cfaf5 (sf: Drop spl_flash_get_sw_write_prot") However, we do need a way to see if a flash device is write-protected, since if it is, it may not be possible to write to do (i.e. failing to write is expected). I am not sure of the correct layer to implement this, so this patch is a stab at it. If spi-flash makes sense then I will add to the 'sf' also. Re the points mentioned in the removal commit: 1) This kind of requirement can be achieved using existing flash operations and flash locking API calls instead of making a separate flash API. Which uclass is this? 2) Technically there is no real hardware user for this API to use in the source tree. I do want coral (at least) to support this. 3) Having a flash operations API for simple register read bits also make difficult to extend the flash operations. This new patch only mentions write-protect being on or off, rather than the actual mechanism. 4) Instead of touching generic code, it is possible to have this functionality inside spinor operations in the form of flash hooks or fixups for associated flash chips. That sounds to me like what drivers are for. But we still need some sort of API for it to be accessible. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-27sandbox: Provide a way to bind fixed/removeable devicesSimon Glass1-4/+4
At present when a file is bound to a host device it is always marked as removeable. Arguably the device is removeable, since it can be unbound at will. However while it is bound, it is not considered removable by the user. Also it is useful to be able to model both fixed and removeable devices for code that distinguishes them. Add a -r flag to the 'host bind' command and plumb it through to provide this feature. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-27sandbox: cros_ec: Only write EC state when the EC is probedSimon Glass1-0/+4
This can crash if the EC has not yet been probed. Add a check to prevent this. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-27sandbox: Only call timer_timebase_fallback() if presentSimon Glass1-1/+2
This function only exists if CPU is enabled. Update the code to take account of this, so that it does not have to be enabled on all sandbox builds. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Sean Anderson <seanga2@gmail.com>
2021-03-27x86: video: Allow coreboot video to be used on any x86 boardSimon Glass2-5/+13
When booting from coreboot we need this driver for the video to work. Update the driver to be usable on any board. The driver disables itself if it sees that is not booted from coreboot. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-27video: Fix video on coreboot with the copy bufferSimon Glass1-5/+2
The copy buffer, if enabled, prevents booting from coreboot correctly, since no memory is allocated for it. Allow it to fall back to disabled in this situation. This ensures that a console is displayed, even if it is slow. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-27x86: Make coreboot sysinfo available to any x86 boardSimon Glass3-3/+3
It is possible to boot U-Boot for chromebook_coral either 'bare metal' or from coreboot. In the latter case we want to provide access to the coreboot sysinfo tables. Move the definitions into a file available to any x86 board. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-27mmc: pci_mmc: Set up the card detectSimon Glass1-1/+5
The driver currently reads the card-detect but does not register it with the MMC stack. Update this so that card-detect works as expected. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-27tegra: i2c: Drop LOG_DEBUGSimon Glass1-1/+0
We should not enable debugging by default. Drop this. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-27x86: Probe device if needed in intel_gpio_xlate()Simon Glass1-1/+13
The Intel GPIO binding allows GPIOs to be globally numbered, so that it does not matter which GPIO bank is specified in the device tree. This is convenient and avoid confusion since the banks do not have the same number of GPIOs and the numbering is not sequential. The GPIO uclass ensures that the device mentioned in the devicetree binding is probed. It is fine for the driver to update gpio_desc to point to a different driver, but this may not have been probed. If it has not been, then it cannot be claimed since there is no uclass data. We could handle this in the GPIO uclass but so far it is an unusual situation so it is probably not worth the extra code. Handle this case in the GPIO driver by probing the selected device if necessary. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-27x86: p2sb: Drop LOG_DEBUGSimon Glass1-1/+0
We should not enable debugging by default. Drop this. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-27mtd: spi_flash_free()Heinrich Schuchardt1-5/+0
dfu_free_entities() invoking dfu_free_entity_sf() has let to segementation faults due to double freeing the same device. spi_flash_free() is not relevant for the driver model but exists only for compatibility with old drivers. We must not remove any device here: * The device may still be referenced. * We don't want to have to probe again. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-03-26Merge tag 'dm-pull-26mar21-take2' of git://git.denx.de/u-boot-dm into nextWIP/26Mar2021-nextTom Rini17-125/+237
dtoc support for of-platdata-inst driver model support for of-platdata-inst support of-platdata-inst on x86 / coral binman support for exapanded entries binman convert docs to reST ti-sysc fix for duplicate uclass driver patman minor improvements pylibfdt build only if needed correct obscure CI error with OF_PLATDATA_INST
2021-03-26dm: core: Use separate priv/plat data regionSimon Glass2-6/+15
Make use of the new priv/plat data region if enabled. This is implemented as a simple offset from the position set up by dtoc to the new position. So long as all access goes through dm_priv_to_rw() this is safe. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-26dm: core: Allow storing priv/plat data separatelySimon Glass1-0/+12
At present the device priv/data data allocated by dtoc is stored in the data section along with other variables. On some platforms it is better to allocate space for it separately, e.g. if SPL is running from read-only memory. Create a new space with the same size as that allocated by dtoc, ready for use. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-26dm: core: Move flags to device-runtime infoSimon Glass1-0/+33
When of-platdata-inst is active, use the flags in the new udevice_rt table, dropping them from the main struct udevice. This ensures that the latter is not updated at runtime. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-26dm: core: Create a struct for device runtime infoSimon Glass1-1/+13
At present when driver model needs to change a device it simply updates the struct udevice structure. But with of-platdata-inst most of the fields are not modified at runtime. In fact, typically only the flags need to change. For systems running SPL from read-only memory it is convenient to separate out the runtime information, so that the devices don't need to be copied before being used. Create a new udevice_rt table, similar to the existing driver_rt. For now it just holds the flags, although they are not used in this patch. Add a new Kconfig for the driver_rt data, since this is not needed when of-platdata-inst is used. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-26Revert "sandbox: Disable I2C emulators in SPL"Simon Glass1-2/+0
With recent changes this can be supported again. Add it back. This reverts commit d85f2c4f2970d0ec2f5f075de734afd11200d153. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-26sandbox: i2c: Support i2c emulation with of-platdataSimon Glass2-2/+28
At present the i2c emulators require access to the devicetree, which is not possible (by design) with of-platdata. Add a way for drivers to record the of-platdata index of their emulator, so that we can still find the emulator. This allows i2c emulation to work with of-platdata. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-26dm: Rename device_get_by_driver_info_idx()Simon Glass4-7/+13
This function finds a device by its driver_info index. With of-platdata-inst we do not use driver_info, but instead instantiate udevice records at build-time. However the semantics of using the function are the same in each case: the caller provides an index and gets back a device. So rename the function to device_get_by_ofplat_idx(), so that it can be used for both situations. The caller does not really need to worry about the details. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-26sandbox: i2c: Move platdata structs to header filesSimon Glass2-31/+1
At present the structs used by these drivers are declared in the C files and so are not accessible to dtoc. Move them to header files, as required. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-26dm: core: Drop uclass_find_device_by_phandle() with of-platdataSimon Glass1-1/+1
At present this function is included in the build but with of-platdata it only services to produce a confusing link error complaining about a call to dev_read_u32_default(). Drop it so that any call to uclass_find_device_by_phandle() is flagged as an error, making it easier to see what is going on. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-26dm: core: Drop device_get_by_driver_info()Simon Glass1-15/+0
This function is now only used in a test. Drop it. Also drop DM_DRVINFO_GET() which was the only purpose for having the function. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-26clk: sandbox: Create a special fixed-rate driverSimon Glass1-0/+33
Create a version of this driver for sandbox so that it can use the of-platdata struct. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-26clk: fixed-rate: Export driver parts for OF_PLATDATA_INSTSimon Glass1-4/+10
We need to allow SoCs to create their own drivers for this so that they can use their own of-platdata structs. To minimise code duplication, export the driver operations and the ofdata_to_plat() setup function. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-26clk: sandbox: Move priv/plat data to a header fileSimon Glass2-13/+0
At present the structs used by this driver are not accessible outside it, so cannot be used with OF_PLATDATA_INST. Move them to a header file to fix this. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-25dfu: dfu_sf: avoid double free of SPI deviceHeinrich Schuchardt1-1/+17
Multiple DFU entities may share the same SPI device. We must make sure that the SPI device is only freed once. When using the driver model it is not necessary to free the SPI device. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Acked-by: Lukasz Majewski <lukma@denx.de>
2021-03-23mtd: rawnand: fsl_ifc: fix FSL NAND driver to read all ONFI parameter pagesMaxim Kochetkov1-7/+10
Linux commit a75bbe71a27 ("mtd: rawnand: fsl_ifc: fix FSL NAND driver to read all ONFI parameter pages") Per ONFI specification (Rev. 4.0), if the CRC of the first parameter page read is not valid, the host should read redundant parameter page copies. Fix FSL NAND driver to read the two redundant copies which are mandatory in the specification. Signed-off-by: Jane Wan <Jane.Wan@nokia.com> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Maxim Kochetkov <fido_max@inbox.ru> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-03-23pci: layerscape: Change to allocate zeroed memery for struct ls_pcieHou Zhiqiang2-2/+2
As on some incipient Layerscape platforms (LS1043A series) there isn't separate PF control register block, these registers reside in the LUT register block, so when the driver detected there isn't 'ctrl', it will assign the 'lut' address to the ls_pcie->ctrl. The current code allocate memory for the struct ls_pcie with random contents, this can result in skipping to assign the ls_pcie->ctrl with the 'lut' address, then further crash with the incorrect address. Fixes: 118e58e26eba ("pci: layerscape: Split the EP and RC driver") Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-03-23rtc: ds1307: Add ds1339 compatibleChris Packham1-0/+2
As far as u-boot is concerned the ds1339 is compatible with the other devices supported by the ds1307 driver. The Linux driver does expose some additional functionality but as far as u-boot is concerned just adding the compatible string is enough. Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-03-22dm: core: Skip adding uclasses with OF_PLATDATA_INSTSimon Glass1-1/+4
There is no need to ever add new uclasses since these are set up at build time. Update the code to return an error if this is attempted. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-22dm: core: Set up driver model for OF_PLATDATA_INSTSimon Glass1-12/+30
With this we don't need to scan and bind drivers, not even the root device. We just need to locate the root device that was set up at build time, then set our root in global_data to point to it. Update the code to handle this case. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-22dm: core: Adjust uclass setup with of-platdataSimon Glass1-2/+6
When OF_PLATDATA_INST is enabled we don't need to create the uclass list. Instead we just need to point to the existing list. Update the code accordingly. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-22dm: core: Allow dropping run-time binding of devicesSimon Glass1-17/+25
With OF_PLATDATA_INST devices are bound at build time. We should not need binding of devices at runtime in most cases. However it is inflexible to absolutely prohibit it, so add an option to control this. Update the driver model core so that it does not bind devices. Update device_bind() to return an error if called. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-22bus: ti-sysc: change in a normal driverDario Binacchi1-6/+0
The module defines a duplicate uclass driver for UCLASS_SIMPLE_BUS, but it is not allowed. This breaks of-platdata and makes the result non-deterministic. The driver does not need to be an uclass driver, so lets remove it. I had turned it into an uclass driver because I thought wrongly it had to call the dm_scan_fdt_dev routine to work properly, but some tests on the board have shown otherwise. Signed-off-by: Dario Binacchi <dariobin@libero.it> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-03-22dtoc: Generate device instancesSimon Glass1-0/+4
Add support for generating a file containing udevice instances. This avoids the need to create these at run time. Update a test uclass to include a 'per_device_plat_auto' member, to increase test coverage. Add another tab to the driver_info output so it lines up nicely like the device-instance output. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-22dtoc: Generate uclass devicesSimon Glass1-0/+1
Add support for generating a file containing uclass instances. This avoids the need to create these at run time. Update a test uclass to include a 'priv_auto' member, to increase test coverage. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-22sandbox: i2c: Rename driver names to work with of-platdataSimon Glass2-3/+3
Some of these do not follow the rules. Make sure the driver name matches the compatible string in all cases. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-22dtoc: Assign a sequence number to each nodeSimon Glass1-2/+4
Now that we have the alias information we can assign a sequence number to each device in the uclass. Store this in the node associated with each device. This requires renaming the sandbox test drivers to have the right name. Note that test coverage is broken with this patch, but fixed in the next one. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-22dm: error handling dev_get_dma_range()Heinrich Schuchardt1-2/+2
goto after return has not effect. Calling of_node_put() in case of some errors and not for others is inconsistent. Fixes: 51bdb50904b ("dm: Introduce xxx_get_dma_range()") Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-03-22mmc: pci: Fix Kconfig dependencyBin Meng1-0/+1
The PCI MMC driver depends on the generic MMC SDHCI driver, otherwise it does not compile. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-03-20serial: mtk: rewrite the setbrg functionWeijie Gao1-41/+33
Currently the setbrg logic of serial-mtk is messy, and should be rewritten. Also an option is added to make it possible to use highspeed-3 mode for all bauds. The new logic is: 1. If baud clock > 12MHz a) If baud <= 115200, highspeed-0 mode will be used (ns16550 compatible) b) If baud <= 576000, highspeed-2 mode will be used c) any bauds > 576000, highspeed-3 mode will be used 2. If baud clock <= 12MHz Forced highspeed-3 mode a) If baud <= 115200, calculates the divisor using DIV_ROUND_CLOSEST b) any bauds > 115200, the same as 1. c) Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
generated by cgit v1.1 at 2024-09-15 08:32:44 +0000