aboutsummaryrefslogtreecommitdiff
path: root/drivers
AgeCommit message (Collapse)AuthorFilesLines
2018-05-03Merge git://git.denx.de/u-boot-usbTom Rini2-2/+2
2018-05-03Merge git://git.denx.de/u-boot-shTom Rini1-2/+0
2018-05-02clk: renesas: Drop USB extal from the R8A7792 clock driverMarek Vasut1-2/+0
The R8A7792 does not have the USB extal, so drop it. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-05-02drivers:power:max77693: remove redundant logical constraintHeinrich Schuchardt1-2/+0
As ret is not set when calling max77693_get_vcell() there is no need to check ret again. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-05-02mmc: zynq_sdhci: use correct quirk if CONFIG_ZYNQ_HISPD_BROKEN is definedHannes Schmelzer1-1/+1
The 'SDHCI_QUIRK_NO_HISPD_BIT' is used wrong here. The purpose of this quirk is to tell the sdhci-driver that the IP-core doesn't have a "high- speed-enable" bit in its registers. With this commit we change this to the correct quirk: SDHCI_QUIRK_BROKEN_HISPD_MODE Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
2018-05-02mmc: sdhci: add SDHCI_QUIRK_BROKEN_HISPD_MODEHannes Schmelzer1-1/+7
Some IP-core implementations of the SDHCI have different troubles on the silicon where they are placed. On ZYNQ platform for example Xilinx doesn't accept the hold timing of an eMMC chip which operates in High-Speed mode and must be forced to operate in non high-speed mode. To get rid of this "SDHCI_QUIRK_BROKEN_HISPD_MODE" is introduced. For more details about this refer to the Xilinx answer-recor #59999 https://www.xilinx.com/support/answers/59999.html This commit: - doesn't set HISPD bit on the host-conroller - reflects this fact within the host-controller capabilities Upon this the layer above (mmc-driver) can setup the card correctly. Otherwise the MMC card will be switched into high-speed mode and causes possible timing violation on the host-controller side. Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at> Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
2018-05-02mmc: fix return value check conditionPeng Fan1-1/+1
sd_read_ssr returns 0, means no error. Fixes: 5b2e72f32721484("mmc: read ssr only if MMC write support is enabled") Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Cc: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-04-30usb: f_mass_storage: simplify logical expressionHeinrich Schuchardt1-1/+1
An unsigned int is always >= 0. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-04-30usb: gadget: remove duplicate assignment.Heinrich Schuchardt1-1/+1
We should not make the same assignement twice. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-04-30Merge git://git.denx.de/u-boot-imxTom Rini1-1/+2
2018-04-30Merge git://git.denx.de/u-boot-sunxiTom Rini1-15/+20
2018-04-28serial: serial_stm32: Rename status register flagsPatrice Chotard2-8/+8
Uart status register is named USART_ISR on STM32F7, STM32H7 and STM32MP1 SoCs family, but USART_SR only on STM32F4 SoCs. Use USART_ISR_ prefix instead of USART_SR_ . Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-04-28serial: serial_stm32: Enable overrunPatrice Chotard2-8/+15
Enable uart overrun feature which allows to benefits of uart FIFO usage. Previously overrun management was disabled, this has to effect to bypassed the uart FIFO usage even if FIFO was enabled. In particular configuration, for example when video console is enabled, copy/pasting a long command line in console results in corruption. This is due to the fact that a lot of time is consumed in flushing the cache during frame buffer update, so uart chars are not read fast enough. By using uart FIFO and managing overrun, long command line can by copy/paste in console without being corrupted. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-04-28spl: disk: usb: Add dependencies to sprintf/strto*Alex Kiernan1-0/+4
If SPL serial support is disabled nothing brings in sprintf, snprintf or simple_strtoul: env/built-in.o: In function `regex_callback': env/attr.c:128: undefined reference to `sprintf' disk/built-in.o: In function `blk_get_device_by_str': disk/part.c:386: undefined reference to `simple_strtoul' disk/part.c:395: undefined reference to `simple_strtoul' disk/built-in.o: In function `blk_get_device_part_str': disk/part.c:522: undefined reference to `simple_strtoul' disk/built-in.o: In function `part_set_generic_name': disk/part.c:704: undefined reference to `sprintf' drivers/built-in.o: In function `init_peripheral_ep': drivers/usb/musb-new/musb_gadget.c:1826: undefined reference to `sprintf' drivers/built-in.o: In function `musb_core_init': drivers/usb/musb-new/musb_core.c:1451: undefined reference to `snprintf' Add those dependencies here. Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
2018-04-28serial: Migrate CONFIG_FSL_LINFLEXUART to KconfigTuomas Tynkkynen2-4/+7
Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-04-27Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTRTom Rini185-365/+0
We have a large number of places where while we historically referenced gd in the code we no longer do, as well as cases where the code added that line "just in case" during development and never dropped it. Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-27Convert CONFIG_SPI to KconfigAdam Ford4-22/+5
This converts the following to Kconfig: CONFIG_SPI This partly involves updating code that assumes that CONFIG_SPI implies things that are specific to the MPC8xx SPI driver. For now, just update the CONFIG tests. This also involves reworking the default for CONFIG_SYS_DEF_EEPROM_ADDR so that we don't set it when we cannot make a reasonable default, as it does not cause any compile failures. Signed-off-by: Adam Ford <aford173@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-26Merge git://git.denx.de/u-boot-usbTom Rini2-11/+17
2018-04-27arm: socfpga: Fix with the correct polling on bit is setTien Fong Chee1-5/+5
Commit 2baa997240d ("arm: socfpga: Add FPGA driver support for Arria 10") Polling on wrong cleared bit. Fix with correct polling on bit is set. Fixes: 2baa997240d ("arm: socfpga: Add FPGA driver support for Arria 10") Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2018-04-26usb: gadget: composite: fix NULL pointer when a non standard request is receivedChristophe Kerello1-1/+4
In case usb configuration is unknown (cdev->config == NULL), non standard request should not be processed. Remove also the cdev->config check below which will never happen. This issue was seen using ums feature. Signed-off-by: Christophe Kerello <christophe.kerello@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-04-26usb: host: dwc3: fix phys initNeil Armstrong1-10/+13
When no PHYs are declared in the dwc3 node, the phy init fails. This patch checks if the "phys" property is presend and reports the error returned by dev_count_phandle_with_args(). This patchs also fixes the styles issues added in last commit. This patch should fix the DWC3 support on the UniPhier SoC family. Fixes: 7c839ea70c49 ("usb: host: dwc3: Add support for multiple PHYs") Reported-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-04-26Merge git://git.denx.de/u-boot-rockchipTom Rini5-3/+44
2018-04-26dts: dm: fec: imx53: Provide proper compatible string for imx53 fec driverLukasz Majewski1-0/+1
After this change the DM FEC ETH driver can be also reused on some imx53 devices. Signed-off-by: Lukasz Majewski <lukma@denx.de>
2018-04-26eth: dm: fec: Change FEC PHY mask setting from CONFIG_PHYLIB to ↵Lukasz Majewski1-1/+1
CONFIG_FEC_MXC_PHYADDR Without this commit we do have an explicit dependency on CONFIG_PHYLIB when one wants to set PHY ADDR on a iMX board (FEC + driver model). This shall be changed to CONFIG_FEC_MXC_PHYADDR, as only when we do have it set, we shall mask out other devices. As a side effect, when CONFIG_FEC_MXC_PHYADDR is not set, we scan PHY bus for connected PHY devices. Signed-off-by: Lukasz Majewski <lukma@denx.de>
2018-04-25Merge git://git.denx.de/u-boot-spiTom Rini4-1/+186
2018-04-25rockchip: rv1108: add ofdata_to_platdata() method for driverKever Yang1-1/+9
Parse of data in dedicated api instead of in probe(). The clk_set_rate() may be called before the clk driver is probed, after core support set default clock. This patch fix system abort issue since: f4fcba5 clk: implement clk_set_defaults() Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-sytems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-sytems.com>
2018-04-25rockchip: rk3128: add ofdata_to_platdata() method for driverKever Yang1-1/+10
Parse of data in dedicated api instead of in probe(). The clk_set_rate() may be called before the clk driver is probed, after core support set default clock. This patch fix system abort issue since: f4fcba5 clk: implement clk_set_defaults() Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-sytems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-sytems.com>
2018-04-25rockchip: rk3036: add ofdata_to_platdata() method for driverKever Yang1-1/+10
Parse of data in dedicated api instead of in probe(). The clk_set_rate() may be called before the clk driver is probed, after core support set default clock. This patch fix system abort issue since: f4fcba5 clk: implement clk_set_defaults() Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-04-25rockchip: timer: add compatible strings for rk3188 and rk3288Philipp Tomsich1-0/+2
The DM driver for ockchip timer blocks is also applicable to the RK3188 and RK3288 timer blocks: add 'rockchip,rk3188-timer' and 'rockchip,rk3288-timer' to its compatible list to support devices claiming compatibility with these. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-04-25rockchip: clk: rk3288: add clk_enable function and support USB HOST0/HSICWadim Egorov1-0/+13
The generic ehci-driver (ehci-generic.c) will try to enable the clocks listed in the DTSI. If this fails (e.g. due to clk_enable not being implemented in a driver and -ENOSYS being returned by the clk-uclass), the driver will bail our and print an error message. This implements a minimal clk_enable for the RK3288 and supports the clocks mandatory for the EHCI controllers; as these are enabled by default we simply return success. Signed-off-by: Wadim Egorov <w.egorov@phytec.de> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-04-25sunxi: improve throughput in the sunxi_mmc driverPhilipp Tomsich1-11/+16
Throughput tests have shown the sunxi_mmc driver to take over 10s to read 10MB from a fast eMMC device due to excessive delays in polling loops. This commit restructures the main polling loops to use get_timer(...) to determine whether a (millisecond) timeout has expired. We choose not to use the wait_bit function, as we don't need interruptability with ctrl-c and have at least one case where two bits (one for an error condition and another one for completion) need to be read and using wait_bit would have not added to the clarity. The observed speedup in testing on a A31 is greater than 10x (e.g. a 10MB write decreases from 9.302s to 0.884s). Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Tested-by: Mylène Josserand <mylene.josserand@bootlin.com> Acked-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2018-04-24Merge git://git.denx.de/u-boot-videoTom Rini2-1/+1
2018-04-24video-uclass: Fix logical-not-parentheses warningTom Rini1-1/+1
With clang-4.0 and later we see: warning: logical not is only applied to the left hand side of this bitwise operator [-Wlogical-not-parentheses] if ((!gd->flags & GD_FLG_RELOC)) ^ ~ And while the compiler suggests adding parenthesis around gd->flags, a reading of the code says that we want to know when GD_FLG_RELOC is not set and then return. Cc: Simon Glass <sjg@chromium.org> Cc: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-23mmc: Staticize sd_select_bus_widthMarek Vasut1-1/+1
Staticize the function since it's only used in mmc.c . Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Cc: Tom Rini <trini@konsulko.com>
2018-04-23Merge git://git.denx.de/u-boot-uniphierTom Rini4-23/+52
2018-04-24clk: uniphier: disable SPL_CLKMasahiro Yamada1-1/+0
The last clock consumer in SPL, SD/eMMC driver, gave up using the clock driver. The clock driver is only used in U-Boot proper. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-24mmc: uniphier-sd: skip clock set-up for SPLMasahiro Yamada1-0/+4
The size of SPL is hitting the limit (64KB) for uniphier_v7_defconfig. When booting from SD/eMMC, obviously its clock has been properly set up by the boot ROM. Acutually, no need to re-initialize the clock in SPL. Using a clock driver would generalize the SoC specific code, but solving the memory footprint problem would win. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-24mmc: tmio: move clk_enable() to each driver's probe functionMasahiro Yamada3-22/+48
I need to differentiate the clock handling for uniphier-sd. Move it to each driver's probe function from the tmio common code so that renesas-sdhi will not be affected. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-23Merge tag 'xilinx-for-v2018.05-rc3' of git://git.denx.de/u-boot-microblazeTom Rini2-10/+3
Xilinx fixes for v2018.05-rc3 - Fix nand initialization - Runtime ddr detection for static DDR setting - Enable rewriting env locations - Sync defconfig for zc770 xm011 - Remove useless ioremap in watchdog - Check return value from soc_clk_dump()
2018-04-23mmc: avoid division by zero in meson_mmc_config_clockHeinrich Schuchardt1-0/+3
The Odroid C2 fails to read from mmc with U-Boot v2018.03. The change avoids a division by zero. The fix was suggested by Jaehoon in https://lists.denx.de/pipermail/u-boot/2018-January/318577.html Reported-by: Vagrant Cascadian <vagrant@debian.org> Suggested-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Tested-by: Vagrant Cascadian <vagrant@debian.org>
2018-04-23watchdog: cadence: Remove useless ioremapMichal Simek1-5/+0
There is no need to call ioremap. Also reg pointer is completely unused in the driver. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-23nand: zynq: Cleanup initializationEzequiel Garcia1-4/+2
CONFIG_NAND_ZYNQ selects CONFIG_SYS_NAND_SELF_INIT, so the driver doesn't have to play any ifdef game. Also, we can mark zynq_nand_init() as static and get rid of the mach-specific nand.h header. This is really a revert of: "mtd: zynq: nand: Move board_nand_init() function to board.c" (sha1: 310995d9f91ae56082b49be06fe8c3d01424f8f6) Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Reviewed-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-23nand: zynq: Fix driver initializationEzequiel Garcia1-1/+1
This driver is currently broken, refusing to initialize properly. The reason is that get_nand_dev_by_index() was being called before nand_register(), thus returning a pointer into uninitialized memory. In other words, the struct mtd_info used by the driver is total junk. Fix it by getting the correct struct mtd_info, via nand_to_mtd() on the driver's struct nand_chip. Tested on a custom board, where the CPU is halted without this patch. Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Reviewed-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-23sunxi: mmc: Fix phase delaysStefan Mavrodiev1-4/+4
U-boot driver for sunxi-mmc uses PLL6, unlike linux kernel where PLL5 is used, with clock rates respectively 600MHz and 768MHz. Thus there are different phase degree steps - 24 for the kernel and 30 for u-boot. In the kernel driver the phase is set 90 deg for output and 120 for sample. Dividing by 30 will result values 3 and 4. Those are the values set in the u-boot driver. However, the condition defining delays is wrong. MMC core driver requests clock of 52MHz, sunxi-driver sets clock of 50MHz, but phase is set 30 deg for output and 120 deg for sample. Apparently this works for most cards. On A20-SOM204-EVB-eMMC there is eMMC card (KLMAG2GEND) which complains about it. Maybe there is other boards with similar problem? So the fix is to match delays for both u-boot and kernel. Signed-off-by: Stefan Mavrodiev <stefan@olimex.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-04-23spi: dw: invert wait condition in dw_spi_xferEugeniy Paltsev1-1/+1
While switching to readl_poll_timeout macros from custom code the waiting condition was accidently inverted, so it was pure luck that this code works at least in some conditions. Fix that by inverting exit condition for readl_poll_timeout. Fixes: c6b4f031d9 ("DW SPI: fix tx data loss on FIFO flush") Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-04-22Merge git://git.denx.de/u-boot-usbTom Rini2-2/+4
2018-04-21usb: dwc3-of-simple: fix error check of clk_get_bulk when disabledNeil Armstrong1-1/+1
The disabled clk API returns -ENOSYS unlike the reset API returning -ENOTSUPP. Fixes: ca7fdc8b1267 ("usb: host: Add simple of glue driver for DWC3 USB Controllers integration") Reported-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-04-21usb: dwc3-of-simple: Add support for DRA7/AM57 platforms.Jean-Jacques Hiblot2-0/+2
Add the compatibility with "ti,dwc3" and enable it by default if DM_USB is enabled. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-04-21usb: dwc3-of-simple: Fix dependenciesJean-Jacques Hiblot1-1/+1
This simple glue layer does not require CONFIG_MISC, but it does require CONFIG_DM_USB. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-04-21mmc: sh_mmcif: Add Kconfig entryMarek Vasut1-0/+6
Add Kconfig entry for SH MMCIF driver. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Jaehoon Chung <jh80.chung@samsung.com>
generated by cgit v1.1 at 2024-08-13 00:04:29 +0000