aboutsummaryrefslogtreecommitdiff
path: root/drivers/serial
AgeCommit message (Collapse)AuthorFilesLines
2024-05-07Merge patch series "arm: Add Analog Devices SC5xx Machine Type"WIP/07May2024-nextTom Rini2-0/+226
Greg Malysa <greg.malysa@timesys.com> says: This series adds support for the ADI SC5xx machine type and includes two core drivers that are required for being able to boot any board--a UART driver, the gptimer driver which is used as a clock reference (CNTVCNT is not supported on the armv7 sc5xx SoCs) and the clock tree driver. Our corresponding Linux support relies on u-boot configuring the clocks correctly before booting, so it is not possible to boot any board without the CGU/CDU configuration happening here. There are also no board files, device trees, or defconfigs included here, but some common definitions that will be used to build board files currently are. The sc5xx SoCs themselves include many armv7 families (sc57x, sc58x, and sc594) all using an ARM Cortex-A5, and one armv8 family (sc598) indended to be a drop-in replacement for the SC594 in terms of peripherals, with a Cortex-A55 instead. Some of the configuration code in dmcinit and clkinit is quite scary and causes a lot of checkpatch violations. It is modified from code initially provided by ADI, but it has not been fully rewritten. There's a question of how important it is to clean up this code--it has some quality violations, but it has been in use (including in production) for over two years and is known to work for performing the low level SoC initialization, while a rewrite might introduce timing or sequence bugs that could take a significant amount of time to detect in the future.
2024-05-07drivers: serial: Add in UART for ADI SC5XX-family processorsNathan Barrett-Morrison2-0/+226
Co-developed-by: Greg Malysa <greg.malysa@timesys.com> Signed-off-by: Greg Malysa <greg.malysa@timesys.com> Co-developed-by: Ian Roberts <ian.roberts@timesys.com> Signed-off-by: Ian Roberts <ian.roberts@timesys.com> Signed-off-by: Vasileios Bimpikas <vasileios.bimpikas@analog.com> Signed-off-by: Utsav Agarwal <utsav.agarwal@analog.com> Signed-off-by: Arturs Artamonovs <arturs.artamonovs@analog.com> Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
2024-05-07serial: Remove <common.h> and add needed includesTom Rini46-46/+6
Remove <common.h> from this driver directory and when needed add missing include files directly. Reviewed-by: Peter Robinson <pbrobinson@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2024-04-23serial_msm: Enable RS232 flow controlSumit Garg1-4/+6
SE HMIBSC board debug console requires RS232 flow control, so enable corresponding support if RS232 gpios are present. Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org> Signed-off-by: Sumit Garg <sumit.garg@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-04-23apq8016: Add support for UART1 clocks and pinmuxSumit Garg1-3/+8
SE HMIBSC board uses UART1 as the main debug console, so add corresponding clocks and pinmux support. Along with that update instructions to enable clocks for debug UART support. Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org> Signed-off-by: Sumit Garg <sumit.garg@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-04-23serial: msm: calculate bit clock dividerCaleb Connolly1-17/+70
The driver currently requires the bit clock divider be hardcoded in devicetree (or use the hardcoded default from apq8016). The bit clock divider is used to derive the baud rate from the core clock: baudrate = clk_rate / csr_div clk_rate is the actual programmed core clock rate which is returned by clk_set_rate(), and this UART driver only supports a baudrate of 115200. We can therefore determine the appropriate value for UARTDM_CSR by iterating over the possible values and finding the one where the equation above holds true for a baudrate of 115200. Implement this logic and drop the non-standard DT bindings for this driver. Tested on dragonboard410c. Tested-by: Robert Marko <robert.marko@sartura.hr> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-04-23serial: msm_serial: remove .clk_rate from debug UARTRobert Marko1-1/+0
MSM serial in DEBUG UART mode is trying to set .clk_rate, but the msm_serial_data structure does not have such property at all, so lets remove it as otherwise it will fail compiling. Fixes: 90023bdfe979 ("serial: msm: add debug UART") Signed-off-by: Robert Marko <robert.marko@sartura.hr> Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-04-23serial: allow selecting MSM debug UART with ARCH_IPQ40XXRobert Marko1-1/+1
Currently, DEBUG_UART_MSM depends on ARCH_SNAPDRAGON only, but IPQ40XX devices also use the same UART HW so they can also use the debug UART. So, allow selecting DEBUG_UART_MSM when using ARCH_IPQ40XX as well. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-04-15serial: lpuart: use ipg clk for i.MX7ULPPeng Fan1-16/+26
To i.MX7ULP compatible lpuart, there is only ipg clk, no per clk. So add a devtype check for i.MX7ULP. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2024-04-10Merge tag 'xilinx-for-v2024.07-rc1' of ↵Tom Rini1-1/+1
https://source.denx.de/u-boot/custodians/u-boot-microblaze Xilinx changes for v2024.07-rc1 xilinx: - Do not call env_get_location when !ENV_IS_NOWHERE - Add FDT_FIXUP_PARTITIONS support - Fix legacy format MAC decoding zynqmp: - Enable semihosting SPL support - DT updates - Kconfig resort/cleanup - Don't describe second image/capsule if !SPL - Add support for dfu/capsule description via MTD - Support JTAG as alternative boot mode - Add support for TEG soc variant zynqmp-kria: - Wire usb4 boot device - Update SDIO tristate pin configuration - Disable SPI_FLASH_BAR to avoid issue with SPI after update mbv: - Enable SPL and binman - Small platform changes zynqmp-nand: - Error out in case of unsupported SW ECC - Clean error path versal-net: - Support multiple locations for variables
2024-04-04serial: msm-geni: support livetreeCaleb Connolly1-0/+13
When using OF_LIVE, the debug UART driver won't be probed if it's a subnode of the geni-se-qup controller. Add a NOP driver for the controller to correctly discover its child nodes. Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Sumit Garg <sumit.garg@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-04-04mach-snapdragon: disable power-domains for pre-reloc driversCaleb Connolly1-1/+1
Some devices like the UART and clock controller reference an RPM(h) power domain. We don't support this device in U-Boot, so add DM_FLAG_DEFAULT_PD_CTRL_OFF to tell DM core not to try and enable the power domain. Reviewed-by: Sumit Garg <sumit.garg@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-03-19Merge tag 'u-boot-socfpga-next-20240319' of ↵WIP/19Mar2024-nextTom Rini1-1/+1
https://source.denx.de/u-boot/custodians/u-boot-socfpga into next - A new driver in the misc to register setting from device tree. This also provides user a clean interface and all register settings are centralized in one place, device tree. - Enable Agilex5 platform for Intel product. Changes, modification and new files are created for board, dts, configs and makefile to create the base for Agilex5. Build-tested on SoC64 boards, boot tested on some of them.
2024-03-12serial: move sbi_dbcn_available to .data sectionHeinrich Schuchardt1-1/+1
U-Boot SPL loads the device-tree directly behind main U-Boot overlapping the .bss section. reserve_fdt() is called in board_init_f() to relocate the device-tree to a safe location. Debug UARTs are enabled before board_init_f(). With sbi_dbcn_available in the .bss section the device-tree is corrupted when _debug_uart_init() is called in the SBI serial driver. Move the variable to the .data section. Link: https://bugs.launchpad.net/ubuntu/+source/u-boot/+bug/2054091 Fixes: dfe08374943c ("risc-v: implement DBCN based debug console") Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Tested-by: Aurelien Jarno <aurelien@aurel32.net> Tested-by: Conor Dooley <conor.dooley@microchip.com>
2024-03-11Merge tag 'v2024.04-rc4' into nextTom Rini1-2/+2
Prepare v2024.04-rc4
2024-03-07serial: pl01x: set baudrate when probingYang Xiwen1-3/+8
It is found that when DM is enabled, only generic init function is called in .probe(). Baudrate is never honored. Add a function call to .setbrg() when probing so that we can update the baudrate of the serial device. Signed-off-by: Yang Xiwen <forbidden405@outlook.com>
2024-03-02ARM: renesas: Rename ARCH_RMOBILE to ARCH_RENESASMarek Vasut1-2/+2
Rename ARCH_RMOBILE to ARCH_RENESAS because all the chips are made by Renesas, while only a subset of them is from the R-Mobile line. Use the following command to perform the rename: " $ git grep -l 'ARCH_RMOBILE' | xargs -I {} sed -i 's@ARCH_RMOBILE@ARCH_RENESAS@g' {} " Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
2024-03-01serial: msm: fix clock handling and pinctrlCaleb Connolly1-20/+5
Use the modern helpers to fetch the clock and use the correct property ("clocks" instead of "clock"). Drop the call to pinctrl_select_state() as no boards have a "uart" pinctrl state and this prints confusing errors. Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Sumit Garg <sumit.garg@linaro.org> Tested-by: Sumit Garg <sumit.garg@linaro.org> #qcs404 Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-03-01serial: msm: add debug UARTCaleb Connolly2-0/+45
Introduce support for early debugging. This relies on the previous stage bootloader to initialise the UART clocks, when running with U-Boot as the primary bootloader this feature doesn't work. It will require a way to configure the clocks before the driver model is available. Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Sumit Garg <sumit.garg@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-03-01riscv: mbv: Moving little_endian variable to data sectionMichal Simek1-1/+1
SPL is cleaning bss after calling board_init_f. Setting up console is done and little_endian global variable is cleared which caused that console stops to work. That's why move it to data seciton now. The patch should be reverted when bss is cleared before board_init_f is called. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/934dc8871c59265eb9d8012193aa97d9b8bd7f33.1707911544.git.michal.simek@amd.com
2024-02-20Merge https://gitlab.denx.de/u-boot/custodians/u-boot-samsungTom Rini1-0/+1
2024-01-29treewide: Remove clk_freeSean Anderson4-5/+0
This function is a no-op. Remove it. Signed-off-by: Sean Anderson <seanga2@gmail.com> Link: https://lore.kernel.org/r/20231216193843.2463779-3-seanga2@gmail.com
2024-01-24serial: s5p: Add Exynos850 compatibleSam Protsenko1-0/+1
Enable serial support for Exynos850 SoC by adding the corresponding compatible string. No additional changes needed, the driver works as is on Exynos850. Related USI and PMU configuration is enabled in separate drivers. The only other dependencies are clock and pinctrl drivers, which are already enabled too. Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2024-01-16serial: msm-geni: handle devm_clk_get() errorsCaleb Connolly1-3/+8
devm_clk_get() returns an ERR_PTR on failure, not null. Fix the check to avoid the board crashing when the clock isn't available. Additionally, add the missing error handling for this function. Fixes: 324df15a292e ("serial: qcom: add support for GENI serial driver") Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-01-16serial: msm-geni: don't rely on parent misc deviceCaleb Connolly2-12/+17
commit 1b15483deb3f ("misc: add Qualcomm GENI SE QUP device driver") introduced support for platform-specific oversampling values, necessary to configure the UART clocks on all platforms at runtime. However it relies in probing a parent device. Despite the DM_FLAG_PRE_RELOC flag, this is not done consistently during boot. Instead, take another approach by relying on ofnode_ helpers to read the serial engine base address and do the read directly. This fixes early UART on boards with a non-default oversampling rate. Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2023-12-04Merge tag 'v2024.01-rc4' into nextTom Rini1-36/+43
Prepare v2024.01-rc4 # -----BEGIN PGP SIGNATURE----- # # iQGzBAABCgAdFiEEGjx/cOCPqxcHgJu/FHw5/5Y0tywFAmVuHrwACgkQFHw5/5Y0 # tyy3Tgv+LB/X0ZR3IHnu1mvQ7kpOFvAjjKr0BUpcEEzsrDZeJnS6sy06m+REez2E # UmuLeKFj5NUCYXNKtxn2+gVnJt8Tk6ftxhMTiZHmR4Y4NVc5aPtqYmVsv6Q29j0U # mcg7AGcZTniu9/naNM+ZcDeHzLDAB0whmE9eVfixXVgyitILoLHNdFiQ7W4oR7Kh # /mBgdMDBS3rqiRi6CuqKUnl4ADX8T3AXaSfi3hqOC5Pj+HPkZSUfyWx31mu9mN1D # wXTHASZX06Dop25fm/ZSdWk1blBw29WqRiJBdwNatvyC5pqMsotTvAfH2AcHBEYg # tpoper+WDOBAipt6b6Y1B7q4VPvJ97L9dFCAYqN0nGCe+rkdi+k+cly7M6Ye9xLt # e7rVUfnKgIMP8jkLcVBYoWkFY5FiJ82O5qjoF5N3dAuHeWacDFsB5TugDTOQvblH # LWCmcIyU1N9Ma/Ib0rTvNduvpBUYBKXYlD1+rjPZUbTUnfc79mf+ReFpcoW6Kxh+ # bkz81p8P # =ebIZ # -----END PGP SIGNATURE----- # gpg: Signature made Mon 04 Dec 2023 01:47:24 PM EST # gpg: using RSA key 1A3C7F70E08FAB1707809BBF147C39FF9634B72C # gpg: Good signature from "Thomas Rini <trini@konsulko.com>" [ultimate]
2023-11-27serial: s5p: Use dev_read_addr_ptr() to get base addressSam Protsenko1-4/+2
As the address read from device tree is being cast to a pointer, it's better to use dev_read_addr_ptr() API for getting that address. The more detailed explanation can be found in commit a12a73b66476 ("drivers: use dev_read_addr_ptr when cast to pointer"). Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2023-11-23serial: s5p: Improve coding styleSam Protsenko1-16/+18
Just some minor style fixes. No functional change. Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2023-11-23serial: s5p: Use named constants for register valuesSam Protsenko1-10/+21
Get rid of magic numbers in s5p_serial_init() when writing to UART registers. While at it, use BIT() macro for existing constants when appropriate. No functional change. Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2023-11-23serial: s5p: Use livetree API to get "id" propertySam Protsenko1-4/+1
Use dev_read_u8_default() instead of fdtdec_get_int() to read the "id" property from device tree, as suggested in [1]. dev_* API is already used in this driver, so there is no reason to stick to fdtdec_* API. This also fixes checkpatch warning: WARNING: Use the livetree API (dev_read_...) [1] doc/develop/driver-model/livetree.rst Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2023-11-23serial: s5p: Remove common.h inclusionSam Protsenko1-1/+0
It's not really needed here anymore. Remove it, as common.h is going away at some point. Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2023-11-22serial: npcm: support skip uart clock settingJim Liu1-15/+24
Skip the uart clock setting if CONFIG_SYS_SKIP_UART_INIT is enabled. Fix divisor error. Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
2023-11-20Merge tag 'v2024.01-rc3' into nextTom Rini3-1/+65
Prepare v2024.01-rc3
2023-11-16treewide: use linux/time.h for time conversion definesIgor Prusov1-2/+1
Now that we have time conversion defines from in time.h there is no need for each driver to define their own version. Signed-off-by: Igor Prusov <ivprusov@salutedevices.com> Reviewed-by: Svyatoslav Ryhel <clamor95@gmail.com> # tegra Reviewed-by: Eugen Hristev <eugen.hristev@collabora.com> #at91 Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org> #qcom geni Reviewed-by: Stefan Bosch <stefan_b@posteo.net> #nanopi2 Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-11-13serial: stm32: Fix AARCH64 compilation warningsPatrice Chotard2-11/+14
When building with AARCH64 defconfig, we got warnings, fix them by using registers base address defined as void __iomem * instead of fdt_addr_t. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2023-11-13serial: s5p: Fix clk_get_by_index() error code checkSam Protsenko1-1/+1
clk_get_by_index() returns negative number on error. Assigning it to unsigned int makes the subsequent "ret < 0" check always false, leading in turn to possible unhandled errors. Change 'ret' variable type to signed int so the code checks and handles clk_get_by_index() return code properly. Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Fixes: cf75cdf96ef2 ("serial: s5p: use clock api to get clock rate") Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2023-11-10tree-wide: Replace http:// link with https:// link for ti.comNishanth Menon1-1/+1
Replace instances of http://www.ti.com with https://www.ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2023-11-07serial: zynqmp: Fetch baudrate from dtb and updateAlgapally Santosh Sagar2-0/+58
The baudrate configured in .config is taken by default by serial. If change of baudrate is required then the .config needs to changed and u-boot recompilation is required or the u-boot environment needs to be updated. To avoid this, support is added to fetch the baudrate directly from the device tree file and update. The serial, prints the log with the configured baudrate in the dtb. The commit c4df0f6f315c ("arm: mvebu: Espressobin: Set default value for $fdtfile env variable") is taken as reference for changing the default environment variable. The default environment stores the default baudrate value, When default baudrate and dtb baudrate are not same glitches are seen on the serial. So, the environment also needs to be updated with the dtb baudrate to avoid the glitches on the serial. Also add test to cover this new function. Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com> Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Link: https://lore.kernel.org/r/20230921112043.3144726-3-venkatesh.abbarapu@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-11-07configs: Add support in Kconfig and convert for armada boardsAlgapally Santosh Sagar1-0/+6
Move the DEFAULT_ENV_IS_RW to Kconfig for easier configuration. Hence, add the CONFIG_DEFAULT_ENV_IS_RW config to the defconfig files to allow enabling them for armada boards. Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com> Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org> Link: https://lore.kernel.org/r/20230921112043.3144726-2-venkatesh.abbarapu@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-11-02serial: sh: Drop <common.h>Paul Barker1-1/+0
In line with changes elsewhere, drop inclusion of the common header. Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
2023-10-24serial: introduce CONFIG_CONSOLE_FLUSH_ON_NEWLINERasmus Villemoes1-2/+6
When debugging, one sometimes only gets partial output lines or nothing at all from the last printf, because the uart has a largish buffer, and the code after the printf() may cause the CPU to hang before the uart IP has time to actually emit all the characters. That can be very confusing, because one doesn't then know exactly where the hang happens. Introduce a config knob allowing one to wait for the uart fifo to drain whenever a newline character is printed, roughly corresponding to the effect of setvbuf(..., _IOLBF, ...) in ordinary C programs. Since this uses IS_ENABLED() instead of cpp ifdef, we can remove the ifdef around the _serial_flush() definition - if neither CONSOLE_FLUSH_SUPPORT or CONSOLE_FLUSH_ON_NEWLINE are enabled, the compiler elides _serial_flush(), but it won't warn about it being unused. Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-24serial: serial-uclass.c: move definition of _serial_flush up a bitRasmus Villemoes1-12/+12
Preparation for next patch. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2023-10-23Merge tag 'u-boot-amlogic-20231023' of ↵Tom Rini1-0/+1
https://source.denx.de/u-boot/custodians/u-boot-amlogic - sync A1 with Linux and add missing UART compatible - fix USB2 gadget init on G12/SM1 based Boards
2023-10-19serial: sh: Add RZ/G2L SCIF supportPaul Barker2-1/+33
Extend the existing driver to support the SCIF serial ports on the Renesas RZ/G2L (R9A07G044) SoC. This also requires us to ensure that if there is a reset signal defined in the device tree, it is de-asserted before we try to talk to the SCIF module. Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Tested-by: Marek Vasut <marek.vasut+renesas@mailbox.org> # R-Car H3 Salvator-XS
2023-10-19serial: sh: Fix error handlingPaul Barker1-2/+14
The current SCIF error handling is broken for the RZ/G2L. After a break condition has been triggered, the current code is unable to clear the error and serial port output never resumes. The RZ/G2L datasheet says that most error conditions are cleared by resetting the relevant error bits in the FSR & LSR registers to zero. To clear framing errors on SCIF ports, the invalid data also needs to be read out of the receive FIFO. After reviewing datasheets for RZ/G2{H,M,N,E}, R-Car Gen4, R-Car Gen3 and even SH7751 SoCs, it's clear that this is the way to clear errors for all of these SoCs. While we're here, annotate the handle_error() function with a couple of comments as the reads and writes themselves don't immediately make it clear what we're doing. Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com> Tested-by: Chris Paterson <chris.paterson2@renesas.com> # HiHope RZ/G2M board Tested-by: Marek Vasut <marek.vasut+renesas@mailbox.org> # R-Car H3 Salvator-XS
2023-10-18serial: amlogic: Add UART compatible for A1 boardIgor Prusov1-0/+1
Add additional compatible to allow using serial driver with A1 board. After compatible change in DTS [1], serial_meson driver should still be able to work with console device. [1] https://lore.kernel.org/all/20230705181833.16137-8-ddrokosov@sberdevices.ru/ Signed-off-by: Igor Prusov <ivprusov@salutedevices.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20231017213211.121550-2-ivprusov@salutedevices.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-10-17spl: Allow enabling SPL_OF_REAL and SPL_OF_PLATDATA at the same timeSean Anderson1-1/+1
Sandbox unit tests in U-Boot proper load a test device tree to have some devices to work with. In order to do the same in SPL, we must enable SPL_OF_REAL. However, we already have SPL_OF_PLATDATA enabled. When generating platdata from a devicetree, it is expected that we will not need devicetree access functions (even though SPL_OF_CONTROL is enabled). This expectation does not hold for sandbox, so allow user control of SPL_OF_REAL. There are several places in the tree where conditions involving OF_PLATDATA or OF_REAL no longer function correctly when both of these options can be selected at the same time. Adjust these conditions accordingly. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-17Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-shWIP/17Oct2023Tom Rini1-5/+7
- RZ/G2L part 1, except for two serial port patches which I had to drop as they broke R2Dplus, they will come later via subsequent PR.
2023-10-17serial: sh: Sort includesPaul Barker1-5/+5
Tidy up the existing include list before we add more includes in the following patch. Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com> Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-10-16serial: sh: Fix compile error when lacking HSCIF supportPaul Barker1-0/+2
If we attempt to compile serial_sh.c for a system which lacks HSCIF support (e.g. R8A7740), we see the following compilation error: In file included from drivers/serial/serial_sh.c:20: drivers/serial/serial_sh.c: In function ‘sh_serial_init_generic’: drivers/serial/serial_sh.h:429:35: warning: implicit declaration of function ‘sci_HSSRR_out’; did you mean ‘sci_SCSCR_out’? [-Wimplicit-function-declaration] 429 | #define sci_out(port, reg, value) sci_##reg##_out(port, value) | ^~~~ drivers/serial/serial_sh.c:62:17: note: in expansion of macro ‘sci_out’ 62 | sci_out(port, HSSRR, HSSRR_SRE | HSSRR_SRCYC8); | ^~~~~~~ To fix this, only try to support access to the HSSRR register for SoCs where it actually exists. Support for the RZ/G2L will be introduced in following patches, which selects CONFIG_RCAR_64 but does not have HSCIF interfaces, so check for CONFIG_RCAR_GEN2 || CONFIG_RCAR_GEN3 || CONFIG_RCAR_GEN4 to determine if HSCIF is present. Fixes: bbe36e29ca2c ('serial: sh: Add HSCIF support for R-Car SoC') Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Cc: Hai Pham <hai.pham.ud@renesas.com> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
generated by cgit v1.1 at 2024-10-20 00:53:13 +0000