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path: root/drivers/ram
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2017-05-12dm: ram: remove unneeded brcm,bcm63268-mc idÁlvaro Fernández Rojas1-5/+1
brcm,bcm63268.dtsi uses brcm,bcm6328-mc instead of brcm,bcm63268-mc Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2017-05-10ram: add RAM driver for Broadcom MIPS SoCsÁlvaro Fernández Rojas2-0/+127
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-08stm32f7: sdram: correct sdram configuration as per micron sdramVikas Manocha1-39/+16
Actually the sdram memory on stm32f746 discovery board is micron part MT48LC_4M32_B2B5_6A. This patch does the modification required in the device tree node & driver for the same. Also we are passing here all the timing parameters in terms of clock cycles, so no need to convert time(ns or ms) to cycles. Signed-off-by: Vikas Manocha <vikas.manocha@st.com> cc: Christophe KERELLO <christophe.kerello@st.com>
2017-05-08stm32f7: stm32f746-disco: read memory info from device treeVikas Manocha1-1/+0
Signed-off-by: Vikas Manocha <vikas.manocha@st.com> cc: Christophe KERELLO <christophe.kerello@st.com>
2017-05-08stm32f7: sdram: use sdram device tree node to configure sdram controllerVikas Manocha1-53/+91
Signed-off-by: Vikas Manocha <vikas.manocha@st.com> cc: Christophe KERELLO <christophe.kerello@st.com>
2017-05-08stm32f7: use clock driver to enable sdram controller clockVikas Manocha1-0/+15
This patch also removes the sdram/fmc clock enable from board specific code. Signed-off-by: Vikas Manocha <vikas.manocha@st.com> cc: Christophe KERELLO <christophe.kerello@st.com>
2017-05-08stm32f7: dm: add driver model support for sdramVikas Manocha1-0/+31
Signed-off-by: Vikas Manocha <vikas.manocha@st.com> cc: Christophe KERELLO <christophe.kerello@st.com>
2017-05-08stm32f7: sdram: move sdram driver code to ram drivers areaVikas Manocha3-0/+128
Signed-off-by: Vikas Manocha <vikas.manocha@st.com> cc: Christophe KERELLO <christophe.kerello@st.com>
2015-08-18ram: rename CONFIG_SPL_RAM_SUPPORT to CONFIG_SPL_RAMMasahiro Yamada1-1/+1
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2015-07-21dm: test: Add a test for the ram uclassSimon Glass2-0/+39
Add a test to confirm that we can probe this device and get information on the available RAM. Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21dm: Add support for RAM driversSimon Glass3-0/+53
Add support for a driver which sets up DRAM and can return information about the amount of RAM available. This is a first step towards moving RAM init to driver model. Signed-off-by: Simon Glass <sjg@chromium.org>