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path: root/drivers/pinctrl/mediatek
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2023-05-03pinctrl: mediatek: set R1/R0 in case pullen/pullsel succeededDaniel Golle1-2/+2
Commit dafe0fbfb0f3 ("pinctrl: mediatek: rewrite mtk_pinconf_set and related functions") changed the logic deciding to set R0 and R1 registers for V1 devices. Before: /* Also set PUPD/R0/R1 if the pin has them */ err = mtk_hw_set_value(dev, pin, PINCTRL_PIN_REG_PUPD, !pullup); if (err != -EINVAL) { mtk_hw_set_value(dev, pin, PINCTRL_PIN_REG_R0, r0); mtk_hw_set_value(dev, pin, PINCTRL_PIN_REG_R1, r1); } After: /* try pupd_r1_r0 if pullen_pullsel return error */ err = mtk_pinconf_bias_set_pullen_pullsel(dev, pin, disable, pullup, val); if (err) return mtk_pinconf_bias_set_pupd_r1_r0(dev, pin, disable, pullup, val); Tracing mtk_pinconf_bias_set_pullen_pullsel shows that the function always either returns 0 in case of success or -EINVAL in case any error has occurred. Hence the logic responsible of the decision to program R0 and R1 has been inverted. This leads to problems on BananaPi R2 (MT7623N) when booting from SDMMC, it turns out accessing eMMC no longer works since U-Boot 2022.07: MT7623> mmc dev 0 Card did not respond to voltage select! : -110 The problem wasn't detected for a long time as both eMMC and SDMMC work fine if they are used to boot from, and hence R0 and R1 were already setup by the bootrom and/or preloader. Fix the logic to restore the originally intended and correct behavior and also change the descriptive comment accordingly. Fixes: dafe0fbfb0f3 ("pinctrl: mediatek: rewrite mtk_pinconf_set and related functions") Signed-off-by: Daniel Golle <daniel@makrotopia.org> Tested-By: Frank Wunderlich <frank-w@public-files.de>
2022-09-23pinctrl: mediatek: add pinctrl driver for MT7986 SoCWeijie Gao3-0/+780
This patch adds pinctrl and gpio support for MT7986 SoC Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Daniel Golle <daniel@makrotopia.org> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2022-09-23pinctrl: mediatek: add pinctrl driver for MT7981 SoCWeijie Gao3-0/+1054
This patch adds pinctrl and gpio support for MT7981 SoC Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2022-05-05pinctrl: mediatek: add support for different types of IO pinsSam Shih2-5/+81
There are many pins in an SoC, and register usage may vary by pins. This patch introduces a concept of "io type" and "io type group" to mediatek pinctrl drivers. This can provide different pinconf handlers implementation (eg: "bias-pull-up/down", "driving" and "input-enable") for IO pins that belong to different types. Signed-off-by: Sam Shih <sam.shih@mediatek.com>
2022-05-05pinctrl: mediatek: introduce multiple memory bases supportSam Shih2-20/+57
Pinctrl design of some mediatek SoC need to access registers that distribute in multiple memory base address. this patch introduce new mechanism in mediatek pinctrl driver to support the chips which have the new design. This patch add a member 'base_calc' in pinctrl private data, and changed original 'base' private data to an array of *iomem. When 'base_calc' attribute is set, it will requests multiplue regs base from the DT, if 'base_calc' attribute is not set, it only use legacy way to request single reg resource from the DT. Signed-off-by: Sam Shih <sam.shih@mediatek.com>
2022-05-05pinctrl: mediatek: rewrite mtk_pinconf_set and related functionsSam Shih2-30/+114
There are many pins in a SoCs, and different pin may belong to different "io_type", For example: some pins of MT7622 belongs to "io_type A", the other belongs to "io_type B", and pinctrl "V0" means handle pinconf via "io_type A" or "io_type B", so SoCs that contain "io_type A" and "io_type B" pins, use "V0" in pinctrl driver. This patch separates the implementation of register operations (e.g: "bias-pull-up/down", "driving" and "input-enable") into different functions, and lets the original V0/V1 ops to call the new functions. Signed-off-by: Sam Shih <sam.shih@mediatek.com>
2021-09-30WS cleanup: remove trailing empty linesWolfgang Denk1-2/+0
Signed-off-by: Wolfgang Denk <wd@denx.de>
2021-07-28Rename GPIO_SUPPORT to GPIOSimon Glass1-2/+2
Rename these options so that CONFIG_IS_ENABLED can be used with them. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-20pinctrl: mt7629: add jtag function and pin groupWeijie Gao1-0/+7
The EPHY LEDs of mt7629 can be used as JTAG. This patch adds the jtag pin group to the pinctrl driver. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2021-03-20pinctrl: mediatek: do not probe gpio driver if not enabledWeijie Gao1-4/+8
The mtk pinctrl driver is a combination driver with support for both pinctrl and gpio. When this driver is used in SPL, gpio support may not be enabled, and this will result in a compilation error. To fix this, macros are added to make sure gpio related code will only be compiled when gpio support is enabled. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2021-03-20pinctrl: mediatek: add get_pin_muxing ops for mediatek pinctrlSam Shih1-0/+14
This patch add get_pin_muxing support for mediatek pinctrl drivers Signed-off-by: Sam Shih <sam.shih@mediatek.com>
2021-03-20pinctrl: mediatek: fix wrong assignment in mtk_get_pin_nameSam Shih1-1/+1
This is a bug fix for mtk pinctrl common part. Appearently pins should be used instead of grps in mtk_get_pin_name(). Signed-off-by: Sam Shih <sam.shih@mediatek.com>
2021-01-18pinctrl: mediatek: correct error handlingHeinrich Schuchardt1-0/+1
If no GPIO controller is found, the return value should not depend on a random value on the stack. Initialize variable ret. The problem was indicated by cppcheck. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Acked-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
2020-12-13dm: treewide: Rename auto_alloc_size members to be shorterSimon Glass6-6/+6
This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-08-19pinctrl: mediatek: mt8512: fix the wrong start address of rangesChunfeng Yun1-3/+3
The start address of dout, pullen and pullsel ragnes are wrong, so fix up them. Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
2020-07-29pinctrl: mediatek: add PUPD/R0/R1 support for MT7623David Woodhouse3-5/+146
The pins for the MMC controller weren't being set up correctly because the pinctrl driver only sets the GPIO pullup/pulldown config and doesn't handle the special cases with PUPD/R0/R1 control. Signed-off-by: David Woodhouse <dwmw2@infradead.org> Tested-by: Frank Wunderlich <frank-w@public-files.de>
2020-07-01dm: Fix error handling for dev_read_addr_ptrSean Anderson1-1/+1
dev_read_addr_ptr had different semantics depending on whether OF_LIVE was enabled. This patch converts both implementations to return NULL on error, and converts all call sites which check for FDT_ADDR_T_NONE to check for NULL instead. This patch also removes the call to map_physmem, since we have dev_remap_addr* for those semantics. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-05-18common: Drop linux/bitops.h from common headerSimon Glass1-0/+1
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-16pinctrl: mediatek: add support for different pinctrlSam Shih7-19/+125
Due to the pinctrl hardware of MT7622 is difference from others SoC which using the common part of mediatek pinctrl. So we need to modify the common part of mediatek pinctrl. Signed-off-by: Sam Shih <sam.shih@mediatek.com> Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
2020-01-16pinctrl: mediatek: add driver for MT7622Sam Shih3-0/+757
This patch add Pinctrl driver for MediaTek MT7622 SoC. Signed-off-by: Sam Shih <sam.shih@mediatek.com> Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
2020-01-16pinctrl: mediatek: add driver for MT8512mingming lee3-0/+392
Add Pinctrl driver for MediaTek MT8512 SoC. Signed-off-by: mingming lee <mingming.lee@mediatek.com>
2019-12-03pinctrl: add driver for MT8518mingming lee3-0/+416
Add Pinctrl driver for MediaTek MT8518 SoC. Signed-off-by: mingming lee <mingming.lee@mediatek.com>
2019-07-29pinctrl: mediatek: fix warningFabien Parent1-0/+2
Fix the following warning when CONFIG_PINCONF=n: drivers/pinctrl/mediatek/pinctrl-mtk-common.c:35:36: warning: ‘mtk_drive’ defined but not used [-Wunused-const-variable=] static const struct mtk_drive_desc mtk_drive[] = { ^~~~~~~~~ Signed-off-by: Fabien Parent <fparent@baylibre.com>
2019-04-23pinctrl: add driver for MT8516Fabien Parent3-0/+396
Add Pinctrl driver for MediaTek MT8516 SoC. Signed-off-by: Fabien Parent <fparent@baylibre.com> Acked-by: Ryder Lee <ryder.lee@mediatek.com>
2018-11-28pinctrl: MediaTek: add pinctrl driver for MT7623 SoCRyder Lee4-0/+1291
This patch adds pinctrl support for MT7623 SoC. And most of the structures are used to hold the hardware configuration for each pin. Signed-off-by: Ryder Lee <ryder.lee@mediatek.com> Tested-by: Matthias Brugger <matthias.bgg@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-28pinctrl: MediaTek: add pinctrl driver for MT7629 SoCRyder Lee5-0/+1161
This patch adds pinctrl support for MT7629 SoC. The IO core found on the SoC has the registers for pinctrl, pinconf and gpio mixed up in the same register range. Hence the driver also implements the gpio functionality through UCLASS_GPIO. This also creates a common file as there might be other chips that use the same binding and driver, then being a little more abstract could help in the long run. Signed-off-by: Ryder Lee <ryder.lee@mediatek.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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