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2020-02-05dm: core: Create a new header file for 'compat' featuresSimon Glass8-0/+8
At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-02-05dm: core: Require users of devres to include the headerSimon Glass2-0/+2
At present devres.h is included in all files that include dm.h but few make use of it. Also this pulls in linux/compat which adds several more headers. Drop the automatic inclusion and require files to include devres themselves. This provides a good indication of which files use devres. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Anatolij Gustschin <agust@denx.de>
2020-02-05dm: pci: Update a few more interfaces for const udevice *Simon Glass1-9/+9
Tidy up a few places where const * should be used. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-02-05dm: pci: Update the PCI read_config() method to const dev *Simon Glass22-43/+46
At present this method uses a non-const udevice pointer, but the call should not modify the device. Use a const pointer. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-24pci: layerscape: device tree fixup based on SoC andWasim Khan3-0/+75
lx2160a rev1 requires layerscape_gen4 device tree fixup and lx2160a rev2 requires layerscape device tree fixup. Add device tree fixup for lx2160a based on SoC and Version. Signed-off-by: Wasim Khan <wasim.khan@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-01-24pci: layerscape: Move streamId allocation to common device tree fixupWasim Khan4-26/+31
Move streamId allocation to layerscape common device tree fixup. Calculate streamId based on SoC variant. Signed-off-by: Wasim Khan <wasim.khan@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-01-24pci: layerscape: Common device tree fixup for NXP SoCsWasim Khan5-8/+58
Add Common device tree fixup for NXP SoCs. Based on SoC and revision call pcie_layerscape or pcie_layerscape_gen4 fixup. Signed-off-by: Wasim Khan <wasim.khan@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-01-24pci: layerscape: Fix the BARs disable functionHou Zhiqiang1-11/+0
There is not any difference for disabling BARs in RC mode between PCIe controllers with and without SRIOV. Fixes: 80afc63fc342 ("pci: layerscape: add pci driver based on DM") Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-01-24pci: layerscape: Fix the disabling of Expansion ROM BARHou Zhiqiang1-1/+1
The software will still get non-zero Expansion ROM BAR size even when the BAR_EN bit is cleared. The BAR_EN bit of register EXP_ROM_BAR_MASK_RC is not working as expected, so this patch changes to mask all the bits. Fixes: 80afc63fc342 ("pci: layerscape: add pci driver based on DM") Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-01-17common: Move ll_boot_init() to init.hSimon Glass1-0/+1
This is an init-related function so belongs in that file. Move it. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-07pci: Print a warning if the bus is accessed before probingSimon Glass1-0/+13
It is not possible to access a device on a PCI bus that has not yet been probed, since the bus number is not known. Add a warning to catch this error. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-07Merge tag 'u-boot-imx-20200107' of ↵Tom Rini1-0/+1
https://gitlab.denx.de/u-boot/custodians/u-boot-imx New for 2020.04 --------------- - New boards Embedded Artists COM board Xea Board - Switch to DM: Aristainetos boards Toradex colibri (DM_ETH) iCubox GE bx50v3 mx7dsabre (DM_ETH) cx9020 - New features: Bootaux with elf files Default SYS_THUMB_BUILD for i.MX6/7 - Fixes: DHCOM i.MX6 PDK Engicam i.MX8M tools (imx8m_image) Travis: https://travis-ci.org/sbabic/u-boot-imx/builds/633679664
2020-01-07pci: imx: Add iMX6SX compatibleMarek Vasut1-0/+1
The driver works fine with iMX6SX, add the missing compatible string. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
2020-01-02pci: layerscape: Manage PCIe EP compatible string via KconfigPankaj Bansal3-2/+11
The ep node device tree name is governed by these bindings: https://github.com/torvalds/linux/blob/master/Documentation/ devicetree/bindings/pci/layerscape-pci.txt#L24 As per above the ep compatible node contains platform name. Therefore, define the ep node compatible as CONFIG to find the pcie ep node in device tree during device tree fixup. Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-01-02pci: layerscape: move PCIE related CONFIG to PCI KconfigPankaj Bansal1-0/+15
move the PCIE related config from arch Kconfig to PCI Kconfig. As the PCI_LAYERSCAPE driver is being used in platform other than fsl-layerscape platforms like ls102xa. Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-12-26armv8: lx2160a: Add FSL_PEX_STREAM_ID_END for LX2160AWasim Khan1-1/+1
Add FSL_PEX_STREAM_ID_END and remove FSL_PEX_STREAM_ID_NUM for lx2160a. Signed-off-by: Wasim Khan <wasim.khan@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-12-26pci: layerscape_gen4: Suffix API names with _ls_gen4Wasim Khan1-8/+12
Update API names for layerscape gen4 fixup. Suffix layerscape_gen4 fixup API names with _ls_gen4. This is required to organize device tree fixup in common, layerscape and layerscape_gen4 specific code. Signed-off-by: Wasim Khan <wasim.khan@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-12-26pci: layerscape: Suffix API names with _lsWasim Khan1-11/+11
Suffix layerscape fixup API names with _ls. This is required to organize device tree fixup in common, layerscape and layerscape_gen4 specific code. Signed-off-by: Wasim Khan <wasim.khan@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-12-26pci: layerscape: Add stream_id_cur field to ls_pcie structureWasim Khan2-2/+4
Add stream_id_cur field to ls_pcie structure and initialize it with 0 for all pcie controllers. This field will be used for streamId calculation. Signed-off-by: Wasim Khan <wasim.khan@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-12-26drivers/pci : enable pcie_layerscape code for lx2160a rev2Wasim Khan1-1/+1
lx2160a rev1 uses pcie_layerscape_gen4 driver and lx2160a rev2 uses pcie_layerscape driver. Enable pcie_layerscape code for CONFIG_PCIE_LAYERSCAPE_GEN4. Based on SoC and revision pcie controller probe will be invoked. Signed-off-by: Wasim Khan <wasim.khan@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-12-15dm: pci: Move pci_get_devfn() into a common fileSimon Glass1-16/+0
Early in boot it is necessary to decode the PCI device/function values for particular peripherals in the device tree or of-platdata. This is needed in TPL where CONFIG_PCI is not defined. To handle this, move pci_get_devfn() into a file that is built even when CONFIG_PCI is not defined. Also add a function for use by of-platdata, to convert a reg property to a pci_dev_t. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-15dm: pci: Allow delaying auto-config until after relocationSimon Glass1-5/+10
At present PCI auto-configuration happens in U-Boot both before and after relocation. This is a waste of time and may mess up static addresses used in board_init_f(). Adjust the code to supporting doing auto-configuration once, after relocation, under control of a device-tree property. This is needed for Apollo Lake for debugging the silicon-init code. Once the UART is moved to a different MMIO address the debug UART does not work and any debug output in Apollo Lake's arch_fsp_init_r() causes a hang. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-15dm: gpio: Allow control of GPIO uclass in SPLSimon Glass2-4/+4
At present if CONFIG_SPL_GPIO_SUPPORT is enabled then the GPIO uclass is included in SPL/TPL without any control for boards. Some boards may want to disable this to reduce code size where GPIOs are not needed in SPL or TPL. Add a new Kconfig option to permit this. Default it to 'y' so that existing boards work correctly. Change existing uses of CONFIG_DM_GPIO to CONFIG_IS_ENABLED(DM_GPIO) to preserve the current behaviour. Also update the 74x164 GPIO driver since it cannot build with SPL. This allows us to remove the hacks in config_uncmd_spl.h and Makefile.uncmd_spl (eventually those files should be removed). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-05drivers: pci: ignore disabled devicesMichael Walle1-0/+5
PCI devices may be disabled in the device tree. Devices which are probed by the device tree handle the "status" property and are skipped if disabled. Devices which are probed by the PCI enumeration don't check that property. Fix it. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Alex Marginean <alexandru.marginean@nxp.com> Tested-by: Alex Marginean <alexandru.marginean@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-03pci: Only link pci_rom.o in some casesTom Rini1-2/+2
The content of pci_rom.c is only used in a few cases. Only build and link in these cases to avoid a global variable as gcc doesn't always discard those when they are unused. Signed-off-by: Tom Rini <trini@konsulko.com>
2019-12-02common: Move pci_init_board() out of common.hSimon Glass2-0/+2
This function can be dropped when all boards use driver model for PCI. For now, move it into init.h with a comment. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-11-11Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriqTom Rini1-1/+5
- Rename CONFIG_SECURE_BOOT to CONFIG_NXP_ESBC. - Few bug fixes and updates related to SPI, hwconfig, ethernet, fsl-layerscape, pci, icid, PSCI
2019-11-08pci: layerscape: Only set EP CFG READY bitPankaj Bansal1-1/+5
In ls_pcie_ep_enable_cfg(), as part of EP setup,config ready bit of pci controller is set, so that RC can read the config space of EP. While setting the config ready bit, LTSSM_EN bit in same register was also inadvertently getting cleared. This restarts the link training between RC and EP. Update code to just set the desired CFG_READY bit (bit 0), while leaving the other bits unchanged. Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com> Reviewed-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-11-07arm: add initial support for the Phytium Durian Boardliu hao3-0/+208
This adds platform code and the device tree for the Phytium Durian Board. The initial support comprises the UART and the PCIE. Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Kever Yang <kever.yang@rock-chips.com> Cc: Tom Rini <trini@konsulko.com> Cc: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Steven Hao <liuhao@phytium.com.cn>
2019-11-06pci: add DM based mpc85xx driverHeiko Schocher3-0/+166
add DM based PCI Configuration space access support for MPC85xx PCI Bridge. This driver is based on arch/powerpc/cpu/mpc85xx/pci.c In the old driver there is a fix for a hw issue on the TARGET_MPC8555CDS and TARGET_MPC8541CDS boards. As I have no such hardware I did not port this part. Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-10-12Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86Tom Rini1-6/+24
- Remember the device being emulated for Sandbox PCI - Update Kconfig options for FSP 1.0 - Drop RESET_BASE and RESET_SEG_SIZE that are no longer used
2019-10-11pci: mediatek: add PCIe controller support for MT7623Ryder Lee3-0/+288
This adds PCIe controller support for MT7623. This is adapted from the Linux version. Tested-by: Frank Wunderlich <frank-w@public-files.de> Signed-off-by: Ryder Lee <ryder.lee@mediatek.com> Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
2019-10-11sandbox: pci: Remember the device being emulatedSimon Glass1-6/+24
Add a field to the PCI emulator per-device data which records which device is being emulated. This is useful when the emulator needs to check the device for something. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: rebase the patch against u-boot-x86/master to get it applied cleanly] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08sandbox: pci: Create a new sandbox_pci_read_bar() functionSimon Glass1-0/+20
The code in swapcase can be used by other sandbox drivers. Move it into a common place to allow this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: remove inclusion of <asm/test.h> in pci_sandbox.c] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08x86: pci: Drop the first parameter in pci_x86_r/w_config()Simon Glass1-2/+14
This parameter is needed by the PCI driver-mode interface but is always NULL on x86. There are a number of calls to this function so it makes sense to minimise the parameters. Adjust the x86 function to omit the first parameter, and introduce stub functions to handle the conversion. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: rebase the patch against u-boot-x86/next to get it applied cleanly] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08x86: Move acpi_s3.h to a common locationSimon Glass1-1/+1
At present this hedaer is only available on x86. To allow sandbox to use it for testing, move it to a common location. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08pci: Show a message if PCI autoconfig failsSimon Glass1-3/+9
At present this fails silently which can be confusing since some devices on the PCI bus may not work correctly. Show a message in this case. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: add a '\n' in the PCI autoconfig fail message] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08pci: Add more debug detail when resources are exhaustedSimon Glass1-1/+3
If PCI auto-config runs out of memory, show a few more details to help diagnose the problem. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: change %x to %llx to avoid build warnings on some platforms] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08pci: Disable autoconfig in SPLSimon Glass1-1/+1
At present U-Boot runs autoconfig in SPL but this is best left to U-Boot proper. For TPL and SPL we can normally used fixed BARs and save code size and time. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08pci: Show the result of binding a deviceSimon Glass1-1/+2
Update the debugging info a little to show the result of trying to bind a PCI device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08pci: sandbox: Probe PCI emulation devices when usedSimon Glass1-3/+2
At present PCI emulation devices are not probed before use, since they used to be children of the device that used them, and children cannot be probed before their parents. Now that PCI emulation devices are attached to the root node, we can simply probe them, and avoid using the internal function. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: rebase the patch against u-boot-x86/next to get it applied cleanly] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08pci: sandbox: Move the emulators into their own nodeSimon Glass1-6/+30
Sandbox pci works using emulation drivers which are currently children of the pci device: pci-controller { pci@1f,0 { compatible = "pci-generic"; reg = <0xf800 0 0 0 0>; emul@1f,0 { compatible = "sandbox,swap-case"; }; }; }; In this case the emulation device is attached to pci device on address f800 (device 1f, function 0) and provides the swap-case functionality. However this is not ideal, since every device on a PCI bus has a child device. This is only really the case for sandbox, but we want to avoid special-case code for sandbox. Worse, child devices cannot be probed before their parents. This forces us to use 'find' rather than 'get' to obtain the emulator device. In fact the emulator devices are never probed. There is code in sandbox_pci_emul_post_probe() which tries to track when emulators are active, but at present this does not work. A better approach seems to be to add a separate node elsewhere in the device tree, an 'emulation parent'. This could be given a bogus address (such as -1) to hide the emulators away from the 'pci' command, but it seems better to keep it at the root node to avoid such hacks. Then we can use a phandle to point from the device to the correct emulator, and only on sandbox. The code to find an emulator does not interfere with normal pci operation. Add a new UCLASS_PCI_EMUL_PARENT uclass which allows finding an emulator given a bus, and finding a bus given an emulator. Update the existing device trees and the code for finding an emulator. This brings PCI emulators more into line with I2C. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: fix 3 typos in the commit message; encode bus number in the labels of swap_case_emul nodes; mention commit 4345998ae9df in sandbox_pci_get_emul()] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08x86: fsp: Create a common fsp_support.h headerSimon Glass1-1/+1
Many support functions are common between FSP1 and FSP2. Add a new header to handle this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: remove forward declarations in fsp_support.h] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08x86: Rename existing FSP code to fsp1Simon Glass1-1/+1
Since there is now a new version of the FSP and it is incompatible with the existing version, move the code into an fsp1 directory. This will allow us to put FSP v2 code into an fsp2 directory. Add a Kconfig which defines which version is in use. Some of the code in this new fsp1/ directory is generic across both FSPv1 and FSPv2. Future patches will address this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
2019-09-02pci: sh7751: Convert to DM and DT probingMarek Vasut1-58/+106
Convert the SH7751 PCI driver to DM and add DT probing. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Bin Meng <bmeng.cn@gmail.com>
2019-08-28dm: pcie_fsl: Add MPC8548 PCIe supportHou Zhiqiang1-0/+1
Add compatible string for MPC8548 PCIe. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-28dm: pcie_fsl: Add P5040 PCIe supportHou Zhiqiang1-0/+1
Add compatible string for P5040 PCIe. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-28dm: pcie_fsl: Add P4080 PCIe supportHou Zhiqiang1-0/+1
Add compatible string for P4080 PCIe. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-28dm: pcie_fsl: Add P3041 PCIe supportHou Zhiqiang1-0/+1
Add compatible string for P3041 PCIe. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-28dm: pcie_fsl: Add P2041 PCIe supportHou Zhiqiang1-0/+7
Add compatible string for P2041 PCIe. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
generated by cgit v1.1 at 2024-07-14 12:30:36 +0000