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path: root/drivers/pci/pci-uclass.c
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2021-07-07Merge tag 'dm-pull-6jul21' of https://source.denx.de/u-boot/custodians/u-boot-dmWIP/07Jul2021Tom Rini1-0/+2
various minor sandbox improvements
2021-07-06dm: pci: Skip setting VGA bridge bits if parent device is the host busMasami Hiramatsu1-0/+3
Commit bbbcb5262839 ("dm: pci: Enable VGA address forwarding on bridges") sets the VGA bridge bits by checking pplat->class, but if the parent device is the pci host bus device, it can be skipped. Moreover, it shouldn't access the pplat because the parent has different plat data. Without this fix, "pci enum" command cause a synchronous abort. pci_auto_config_devices: start PCI Autoconfig: Bus Memory region: [78000000-7fffffff], Physical Memory [78000000-7fffffffx] PCI Autoconfig: Bus I/O region: [0-ffff], Physical Memory [77f00000-77f0ffffx] pci_auto_config_devices: device pci_6:0.0 PCI Autoconfig: BAR 0, Mem, size=0x1000000, address=0x78000000 bus_lower=0x79000000 PCI Autoconfig: BAR 1, Mem, size=0x8000000, No room in resource, avail start=79000000 / size=8000000, need=8000000 PCI: Failed autoconfig bar 14 PCI Autoconfig: BAR 2, I/O, size=0x4, address=0x1000 bus_lower=0x1004 PCI Autoconfig: BAR 3, Mem, size=0x2000000, address=0x7a000000 bus_lower=0x7c000000 PCI Autoconfig: BAR 4, I/O, size=0x80, address=0x1080 bus_lower=0x1100 PCI Autoconfig: ROM, size=0x80000, address=0x7c000000 bus_lower=0x7c080000 "Synchronous Abort" handler, esr 0x96000006 elr: 00000000e002bd28 lr : 00000000e002bce8 (reloc) elr: 00000000fff6fd28 lr : 00000000fff6fce8 x0 : 0000000000001041 x1 : 000000000000003e x2 : 00000000ffb0f8c8 x3 : 0000000000000001 x4 : 0000000000000080 x5 : 0000000000000000 x6 : 00000000fff718fc x7 : 000000000000000f x8 : 00000000ffb0f238 x9 : 0000000000000008 x10: 0000000000000000 x11: 0000000000000010 x12: 0000000000000006 x13: 000000000001869f x14: 00000000ffb0fcd0 x15: 0000000000000020 x16: 00000000fff71cc4 x17: 0000000000000000 x18: 00000000ffb13d90 x19: 00000000ffb14320 x20: 0000000000000000 x21: 00000000ffb14090 x22: 00000000ffb0f8c8 x23: 0000000000000001 x24: 00000000ffb14c10 x25: 0000000000000000 x26: 0000000000000000 x27: 0000000000000000 x28: 00000000ffb14c70 x29: 00000000ffb0f830 Code: 52800843 52800061 52800e00 97ffcf65 (b9400280) Resetting CPU ... Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-07-06dm: define LOG_CATEGORY for all uclassPatrick Delaunay1-0/+2
Define LOG_CATEGORY for all uclass to allow filtering with log command. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-05-02pci: pci-uclass: Add board_pci_fixup_dev for DM_PCITim Harvey1-0/+6
Add a board_pci_fixup_dev weak function to allow PCI device fixups during enumeration. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2021-05-02pci: Update the highest subordinate bus number for bridge setupMasami Hiramatsu1-0/+3
Update the highest subordinate bus number after probing the devices under the bus for setting up the bridge correctly. The commit 42f3663a3f67 ("pci: Update to use new sequence numbers") removed this but it is required if a PCIe bridge is under the bus. Fixes: 42f3663a3f67 ("pci: Update to use new sequence numbers") Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
2021-02-02common: Drop asm/global_data.h from common headerSimon Glass1-0/+1
Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
2021-01-15common: board_r: Drop initr_pci wrapperOvidiu Panait1-1/+3
Add a return value to pci_init and use it directly in the post-relocation init sequence, rather than using a wrapper stub. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-05dm: core: Use dev_has_ofnode() instead of dev_of_valid()Simon Glass1-3/+3
We have two functions which do the same thing. Standardise on dev_has_ofnode() since there is no such thing as an 'invalid' ofnode in normal operation: it is either null or missing. Also move the functions into one place. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2021-01-05dm: core: Rename sqq to seq_Simon Glass1-1/+1
Now that the sequence-numbering migration is complete, rename this member back to seq_, adding an underscore to indicate it is internal to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2021-01-05dm: Use access methods for dev/uclass private dataSimon Glass1-4/+4
Most drivers use these access methods but a few do not. Update them. In some cases the access is not permitted, so mark those with a FIXME tag for the maintainer to check. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Pratyush Yadav <p.yadav@ti.com>
2020-12-18dm: core: Update uclass_find_next_free_req_seq() for new schemeSimon Glass1-1/+1
This function current deals with req_seq which is deprecated. Update it to use the new sequence numbers, putting them above existing aliases. Rename the function to make this clear. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-18pci: Update to use new sequence numbersSimon Glass1-18/+27
Now that we know the sequence number at bind time, there is no need for special-case code in dm_pci_hose_probe_bus(). Note: the PCI_CAP_ID_EA code may need a look, but there are no test failures so I have left it as is. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-18dm: Avoid accessing seq directlySimon Glass1-18/+18
At present various drivers etc. access the device's 'seq' member directly. This makes it harder to change the meaning of that member. Change access to go through a function instead. The drivers/i2c/lpc32xx_i2c.c file is left unchanged for now. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13dm: treewide: Rename ..._platdata variables to just ..._platSimon Glass1-13/+13
Try to maintain some consistency between these variables by using _plat as a suffix for them. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13dm: treewide: Update 'auto' declarations to be on one lineSimon Glass1-2/+1
Fix up the code style for those declarations that should now fit onto one line, which is all of them that currently do not. This is needed for dtoc to detect the structs correctly, at present. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13dm: treewide: Rename ofdata_to_platdata() to of_to_plat()Simon Glass1-1/+1
This name is far too long. Rename it to remove the 'data' bits. This makes it consistent with the platdata->plat rename. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13dm: treewide: Rename 'platdata' variables to just 'plat'Simon Glass1-12/+12
We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13dm: treewide: Rename auto_alloc_size members to be shorterSimon Glass1-2/+2
This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13dm: core: Rename device_bind_ofnode() to device_bind()Simon Glass1-2/+2
This is the standard function to use when binding devices. Drop the '_ofnode' suffix to make this clear. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-08-26CONFIG_NR_DRAM_BANKS: Remove unreferenced code as its always definedStefan Roese1-1/+2
Since commit 86cf1c82850f ("configs: Migrate CONFIG_NR_DRAM_BANKS") & commit 999a772d9f24 ("Kconfig: Migrate CONFIG_NR_DRAM_BANKS"), CONFIG_NR_DRAM_BANKS is always defined with a value (4 is default). It makes no sense to still carry code that is guarded with "#ifndef CONFIG_NR_DRAM_BANKS" (and similar). This patch removes all these unreferenced code paths. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Pali Rohár <pali@kernel.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-08-25pci: pci-uclass: Check validity of ofnodeSuneel Garapati1-3/+7
Add check if the referenced ofnode is valid. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25pci: pci-uclass: Add support for Alternate-RoutingID capabilitySuneel Garapati1-0/+26
If ARI capability is found on device, use it to update next function number in bus scan and also helps to skip unnecessary bdf scans. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25pci: pci-uclass: Add VF BAR map support for Enhanced AllocationSuneel Garapati1-5/+62
Makes dm_pci_map_bar API available to map BAR for Virtual function PCI devices which support Enhanced Allocation. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25pci: pci-uclass: Add support for Single-Root I/O VirtualizationSuneel Garapati1-0/+114
SR-IOV - Single Root I/O Virtualization PF - Physical Function VF - Virtual Function If SR-IOV capability is present, use it to initialize Virtual Function PCI device instances. pci_sriov_init function will read SR-IOV registers to create VF devices under the PF PCI device and also bind driver if available. This function needs to be invoked from Physical function device driver which expects VF device support, creating minimal impact on existing framework. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25pci: pci-uclass: Add support for Enhanced Allocation in BridgesSuneel Garapati1-6/+18
If Enhanced Allocation capability is present in bridges, use it to read the fixed sub-ordinate bus number. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25pci: pci-uclass: Add multi entry support for memory regionsSuneel Garapati1-3/+6
Enable PCI memory regions in ranges property to be of multiple entry. This helps to add support for SoC's like OcteonTX/TX2 where every peripheral is on PCI bus. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25pci: pci-uclass: Make DT subnode parse optionalSuneel Garapati1-1/+2
Parse subnode DT properties only if parent node is valid. Otherwise, assert is triggered on ofnode_valid in ofnode_first_subnode from dev_for_each_subnode. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25pci: pci-uclass: Fix incorrect argument in map_physmemSuneel Garapati1-2/+2
Fix argument ordering for map_physmem() called in dm_pci_map_ea_bar(). Additinally minor spelling correction. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25pci: pci-uclass: Dynamically allocate the PCI regionsStefan Roese1-6/+8
Instead of using a fixed length pre-allocated array of regions, this patch moves to dynamically allocating the regions based on the number of available regions plus the necessary regions for DRAM banks. Since MAX_PCI_REGIONS is not needed any more, its removed completely with this patch. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Thierry Reding <treding@nvidia.com> Cc: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-08-25pci: pci-uclass: Remove #ifdef CONFIG_NR_DRAM_BANKS as its always setStefan Roese1-16/+1
Since the migration to Kconfig, CONFIG_NR_DRAM_BANKS is configured for all boards. Hence we can remove the conditional compilation and the code path that will never get compiled. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-14drivers: pci: add api to get dma regionsRayagonda Kokatanur1-0/+42
Add api to get dma regions. Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
2020-07-17treewide: convert bd_t to struct bd_info by coccinelleMasahiro Yamada1-1/+1
The Linux coding style guide (Documentation/process/coding-style.rst) clearly says: It's a **mistake** to use typedef for structures and pointers. Besides, using typedef for structures is annoying when you try to make headers self-contained. Let's say you have the following function declaration in a header: void foo(bd_t *bd); This is not self-contained since bd_t is not defined. To tell the compiler what 'bd_t' is, you need to include <asm/u-boot.h> #include <asm/u-boot.h> void foo(bd_t *bd); Then, the include direcective pulls in more bloat needlessly. If you use 'struct bd_info' instead, it is enough to put a forward declaration as follows: struct bd_info; void foo(struct bd_info *bd); Right, typedef'ing bd_t is a mistake. I used coccinelle to generate this commit. The semantic patch that makes this change is as follows: <smpl> @@ typedef bd_t; @@ -bd_t +struct bd_info </smpl> Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
2020-05-18common: Drop linux/delay.h from common headerSimon Glass1-0/+1
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18common: Drop log.h from common headerSimon Glass1-0/+1
Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18common: Drop init.h from common headerSimon Glass1-0/+1
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-30pci: Avoid auto-config when chain loadingSimon Glass1-2/+2
When U-Boot is not the first-stage bootloader we don't want to re-configure the PCI devices, since this has already been done. Add a check to avoid this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-04-16pci: Adjust dm_pci_read_bar32() to return errors correctlySimon Glass1-1/+8
At present if reading a BAR returns 0xffffffff then the value is masked and a different value is returned. This makes it harder to detect the problem when debugging. Update the function to avoid masking in this case. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2020-04-16dm: pci: Allow disabling auto-config for a deviceSimon Glass1-0/+2
Add a means to avoid configuring a device when needed. Add an explanation of why this is useful to the binding file. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-02-05dm: core: Create a new header file for 'compat' featuresSimon Glass1-0/+1
At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-02-05dm: pci: Update a few more interfaces for const udevice *Simon Glass1-9/+9
Tidy up a few places where const * should be used. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-02-05dm: pci: Update the PCI read_config() method to const dev *Simon Glass1-6/+8
At present this method uses a non-const udevice pointer, but the call should not modify the device. Use a const pointer. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-07pci: Print a warning if the bus is accessed before probingSimon Glass1-0/+13
It is not possible to access a device on a PCI bus that has not yet been probed, since the bus number is not known. Add a warning to catch this error. Signed-off-by: Simon Glass <sjg@chromium.org>
2019-12-15dm: pci: Move pci_get_devfn() into a common fileSimon Glass1-16/+0
Early in boot it is necessary to decode the PCI device/function values for particular peripherals in the device tree or of-platdata. This is needed in TPL where CONFIG_PCI is not defined. To handle this, move pci_get_devfn() into a file that is built even when CONFIG_PCI is not defined. Also add a function for use by of-platdata, to convert a reg property to a pci_dev_t. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-15dm: pci: Allow delaying auto-config until after relocationSimon Glass1-5/+10
At present PCI auto-configuration happens in U-Boot both before and after relocation. This is a waste of time and may mess up static addresses used in board_init_f(). Adjust the code to supporting doing auto-configuration once, after relocation, under control of a device-tree property. This is needed for Apollo Lake for debugging the silicon-init code. Once the UART is moved to a different MMIO address the debug UART does not work and any debug output in Apollo Lake's arch_fsp_init_r() causes a hang. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-05drivers: pci: ignore disabled devicesMichael Walle1-0/+5
PCI devices may be disabled in the device tree. Devices which are probed by the device tree handle the "status" property and are skipped if disabled. Devices which are probed by the PCI enumeration don't check that property. Fix it. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Alex Marginean <alexandru.marginean@nxp.com> Tested-by: Alex Marginean <alexandru.marginean@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08pci: Disable autoconfig in SPLSimon Glass1-1/+1
At present U-Boot runs autoconfig in SPL but this is best left to U-Boot proper. For TPL and SPL we can normally used fixed BARs and save code size and time. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08pci: Show the result of binding a deviceSimon Glass1-1/+2
Update the debugging info a little to show the result of trying to bind a PCI device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08x86: fsp: Create a common fsp_support.h headerSimon Glass1-1/+1
Many support functions are common between FSP1 and FSP2. Add a new header to handle this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: remove forward declarations in fsp_support.h] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08x86: Rename existing FSP code to fsp1Simon Glass1-1/+1
Since there is now a new version of the FSP and it is incompatible with the existing version, move the code into an fsp1 directory. This will allow us to put FSP v2 code into an fsp2 directory. Add a Kconfig which defines which version is in use. Some of the code in this new fsp1/ directory is generic across both FSPv1 and FSPv2. Future patches will address this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
2019-07-12pci: ensure enumeration of all devices in pci_initMarek Behún1-2/+2
Use the uclass_first_device_check and uclass_next_device_check functions instead of uclass_first_device and uclass_next_device in pci_init. This ensures that all PCI devices are tried to be probed. Currently if a device fails to probe, the enumeration stops and the devices which come after the failed device are not probed. Signed-off-by: Marek Behún <marek.behun@nic.cz> Cc: Stefan Roese <sr@denx.de> Cc: Anton Schubert <anton.schubert@gmx.de> Cc: Dirk Eibach <dirk.eibach@gdsys.cc> Cc: Mario Six <mario.six@gdsys.cc> Cc: Chris Packham <chris.packham@alliedtelesis.co.nz> Cc: Phil Sutter <phil@nwl.cc> Cc: VlaoMao <vlaomao@gmail.com> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
generated by cgit v1.1 at 2024-08-02 04:09:30 +0000