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2020-09-24net: tsec: Add fixed-link PHY supportHou Zhiqiang1-1/+4
The info of fixed-link PHY is described in DT node instead of getting from MII, so detect the fixed-link PHY DT node first, if it doesn't exist then probe the MII. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> [Rebased] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24net: tsec: convert to use DM_MDIO when DM_ETH enabledHou Zhiqiang1-33/+5
For the platforms on which the eTSEC driver uses DM_ETH, convert its MDIO controller code to also use DM_MDIO. Note that for handling the TBI PHY (the MAC PCS for SGMII), we still don't register a udevice for it, since we can drive it locally and there is no point in doing otherwise. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> [Reworked to fix gazerbeam config] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24net: fsl_mdio: Correct the MII management register block addressHou Zhiqiang1-6/+22
The MII management register block offset is different between gianfar and etsec2 compatible devices, this patch is to fix this issue by adding driver data for different compatible string. Fixes: 2932c5a802a9 ("net: tsec: fsl_mdio: add DM MDIO support") Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24net: fsl_mdio: Change to use virtual addressHou Zhiqiang1-1/+1
Use virtual address to access the MII block registers instead of physical address. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24phy: make phy_connect_fixed work with a null mdio busVladimir Oltean1-2/+2
It is utterly pointless to require an MDIO bus pointer for a fixed PHY device. The fixed.c implementation does not require it, only phy_device_create. Fix that. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-23net: xilinx: axi_emac: Typecast flush_cache argumentsAshok Reddy Soma1-6/+6
flush_cache() arguments are not type casted to take care of 64 bit systems. Use phys_addr_t to type cast for it to work properly for 32 bit and 64 bit systems. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2020-09-23net: xilinx: axi_emac: Fix dma descriptors for 64bit and compilation warningsAshok Reddy Soma1-12/+24
There are compilation warnings showing up when we compile AXI ethernet driver for 64bit architectures. Fix them, so that it works on both 32 and 64 bit architectures. DMA descriptors are not taking care of 64bit addresses. To fix it, change axidma_bd members as below: next ==> next_desc reserverd1 ==> next_desc_msb phys ==> buf_addr reserverd2 ==> buf_addr_msb and update next_desc and buf_addr with lower 32 bits of the addresses, update next_desc_msb and buf_addr_msb with upper 32 bits of the 64bit addresses. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2020-09-23net: gem: Add support for more PHYs on MDIO busMichal Simek1-0/+10
Find out MDIO bus and enable MDIO access to it if this is done via different GEM controller. Only works across GEM instances. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-09-21Merge branch 'master' into nextTom Rini1-9/+11
Merge in v2020.10-rc5
2020-09-17net, qe: add DM support for QE UEC ethernetHeiko Schocher10-0/+2688
add DM/DTS support for the UEC ethernet on QUICC Engine Block. Signed-off-by: Heiko Schocher <hs@denx.de> Patch-cc: Mario Six <mario.six@gdsys.cc> Patch-cc: Qiang Zhao <qiang.zhao@nxp.com> Patch-cc: Holger Brunck <holger.brunck@hitachi-powergrids.com> Patch-cc: Madalin Bucur <madalin.bucur@oss.nxp.com> Series-changes: 3 - revert: commit "3374264df97b" ("drivers: net: qe: deselect QE when DM_ETH is enabled") as now qe works with DM and DM_ETH support. - fix mailaddress from Holger Series-changes: 2 - add comments from Qiang Zhao: - add device node documentation - I did not drop the dm_qe_uec_phy.c and use drivers/net/fsl_mdio.c because using drivers/net/fsl_mdio.c leads in none existent udevice mdio@3320 instead boards with DM ETH support should use now this driver. - remove RFC tag Commit-notes: - I let the old none DM based implementation in code so boards should work with old implementation. This Code should be removed if all boards are converted to DM/DTS. - add the DM based qe uec driver under drivers/net/qe - Therefore copied the files uccf.c uccf.h uec.h from drivers/qe. So there are a lot of Codingstyle problems currently. I fix them in next version if this RFC patch is OK or it needs some changes. - The dm based driver code is now under drivers/net/qe/dm_qe_uec.c Used a lot of functions from drivers/qe/uec.c - seperated the PHY specific code into seperate file drivers/net/qe/dm_qe_uec_phy.c END
2020-09-08bcmgenet: Add support for rgmii-rxidJason Wessel1-1/+2
The commit 57805f2270c4 ("net: bcmgenet: Don't set ID_MODE_DIS when not using RGMII") needed to be extended for the case of using the rgmii-rxid. The latest version of the Rasbperry Pi4 dtb files for the 5.4 now specify the rgmii-rxid. Signed-off-by: Jason Wessel <jason.wessel@windriver.com> Tested-by: Petr Tesarik <ptesarik@suse.com> Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2020-09-08bcmgenet: fix DMA buffer managementJason Wessel1-8/+9
This commit fixes a serious issue occurring when several network commands are run on a raspberry pi 4 board: for instance a "dhcp" command and then one or several "tftp" commands. In this case, packet recv callbacks were called several times on the same packets, and send function was failing most of the time. note: if the boot procedure is made of a single network command, the issue is not visible. The issue is related to management of the packet ring buffers (producer / consumer) and DMA. Each time a packet is received, the ethernet device stores it in the buffer and increments an index called RDMA_PROD_INDEX. Each time the driver outputs a received packet, it increments another index called RDMA_CONS_INDEX. Between each pair of network commands, as part of the driver 'start' function, previous code tried to reset both RDMA_CONS_INDEX and RDMA_PROD_INDEX to 0. But RDMA_PROD_INDEX cannot be written from driver side, thus its value was actually not updated, and only RDMA_CONS_INDEX was reset to 0. This was resulting in a major synchronization issue between the driver and the device. Most visible behavior was that the driver seemed to receive again the packets from the previous commands (e.g. DHCP response packets "received" again when performing the first TFTP command). This fix consists in setting RDMA_CONS_INDEX to the same value as RDMA_PROD_INDEX, when resetting the driver. The same kind of fix was needed on the TX side, and a few variables had to be reset accordingly (c_index, tx_index, rx_index). The rx_index and tx_index have only 256 entries so the bottom 8 bits must be masked off. Originated-by: Etienne Dublé <etienne.duble@imag.fr> Signed-off-by: Jason Wessel <jason.wessel@windriver.com> Tested-by: Petr Tesarik <ptesarik@suse.com> Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2020-08-20xilinx: kconfig: Change Kconfig dependencies for Xilinx driversMichal Simek1-3/+3
Zynq/ZynqMP/Versal IPs should be possible to called also from Microblaze in PL and vice versa. That's why change dependencies and do not limit enabling just for some platforms. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2020-08-04net: dwc_eth_qos: add Kconfig option to select supported configurationPatrick Delaunay2-6/+33
Add configuration flag to select the supported dwc driver configuration: - CONFIG_DWC_ETH_QOS_TEGRA186 - CONFIG_DWC_ETH_QOS_IMX - CONFIG_DWC_ETH_QOS_STM32 See Linux driver ethernet/stmicro/stmmac and associated glue layers for other configuration examples. This patch removes the not-selected compatibles and lets the linker remove the unused functions to reduce the size of the driver. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-08-03net: Drop duplicate include of dm.h in pcnet.cSimon Glass1-1/+0
This file includes the header twice. Drop the second one. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-28eth: mtk-eth: enable mt7629 sgmii mode support in mediatek eth driverMarkLee2-1/+3
The sgmii mode init flow is almost the same for all mediatek SoC, the only difference is the register offset(SGMSYS_GEN2_SPEED) is 0x2028 in the old chip(mt7622) but changed to 0x128 for the newer chip(mt7629 and the following chips). Signed-off-by: MarkLee <Mark-MC.Lee@mediatek.com>
2020-07-28Convert CONFIG_DRIVER_TI_EMAC_USE_RMII to KconfigAdam Ford1-0/+6
This converts the following to Kconfig: CONFIG_DRIVER_TI_EMAC_USE_RMII Signed-off-by: Adam Ford <aford173@gmail.com>
2020-07-27Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriqTom Rini2-2/+45
- Bug fixes and updates on ls2088a,ls1028a, ls1046a, ls1043a, ls1012a - lx2-watchdog support - layerscape: pci-endpoint support, spin table relocation fixes and cleanups - fsl-crypto: RNG support and bug fixes
2020-07-27Merge tag 'dm-pull-20jul20-take2a' of ↵Tom Rini21-22/+22
https://gitlab.denx.de/u-boot/custodians/u-boot-dm binman support for FIT new UCLASS_SOC patman switch 'test' command minor fdt fixes patman usability improvements
2020-07-27armv8: ls1012a: RGMII ports require internal delayChaitanya Sakinam1-1/+1
The correct setting for the RGMII ports on LS1012ARDB is to enable delay on both Rx and Tx so the interface mode used should be PHY_INTERFACE_MODE_RGMII_ID Signed-off-by: Chaitanya Sakinam <chaitanya.sakinam@nxp.com> Signed-off-by: Anji J <anji.jagarlmudi@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27net: pfe_eth: Use spi_flash_read API to access flash memoryKuldeep Singh1-1/+44
Current PFE firmware access spi-nor memory directly. New spi-mem framework does not support direct memory access. So, let's use spi_flash_read API to access memory instead of directly using it. Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com> Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-25treewide: convert devfdt_get_addr() to dev_read_addr()Masahiro Yamada21-22/+22
When you enable CONFIG_OF_LIVE, you will end up with a lot of conversions. To generate this commit, I used coccinelle excluding drivers/core/, include/dm/, and test/ The semantic patch that makes this change is as follows: <smpl> @@ expression dev; @@ -devfdt_get_addr(dev) +dev_read_addr(dev) </smpl> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-25treewide: remove (phys_addr_t) casts from devfdt_get_addr()Masahiro Yamada5-5/+5
This cast is unneeded. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-25net: dc2114x: Add DM supportMarek Vasut1-2/+145
With all the changes in place, add support for DM into the dc2114x driver. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Ramon Fried <rfried.dev@gmail.com>
2020-07-25net: dc2114x: Split common parts of non-DM functions outMarek Vasut1-50/+67
Split the common code from the non-DM code, so it can be reused by the DM code later. As always, the recv() function had to be split into the actual receiving part and free_pkt part to fit with the DM. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Ramon Fried <rfried.dev@gmail.com>
2020-07-25net: dc2114x: Split RX pathMarek Vasut1-24/+43
Split the RX data check from the rest of the RX function, so that the check can be performed separately from the processing of the packet and the release of the received packet once the processing is finished. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Ramon Fried <rfried.dev@gmail.com>
2020-07-25net: dc2114x: Add RX/TX rings into the private dataMarek Vasut1-46/+46
The RX/TX DMA descriptor rings are per-device-instance private data, so move them into the private data. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Ramon Fried <rfried.dev@gmail.com>
2020-07-25net: dc2114x: Pass PCI BDF into phys_to_bus()Marek Vasut1-13/+16
This is a trick in preparation for adding DM support. By passing in the PCI BDF into the phys_to_bus() macros and calling that dev, we can substitute dev with udevice when DM support lands and do minor adjustment to the macros to support both DM and non-DM operation. No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Ramon Fried <rfried.dev@gmail.com>
2020-07-25net: dc2114x: Pass private data aroundMarek Vasut1-64/+71
This patch replaces the various uses of struct eth_device for accessing device private data with struct dc2114x_priv, which is compatible both with DM and non-DM operation. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Ramon Fried <rfried.dev@gmail.com>
2020-07-25net: dc2114x: Introduce private dataMarek Vasut1-7/+18
Introduce dc2114x_priv, which is a super-structure around eth_device and tracks per-device state and the device IO address. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Ramon Fried <rfried.dev@gmail.com>
2020-07-25net: dc2114x: Use standard I/O accessorsMarek Vasut1-2/+3
The current dc21x4x driver accesses its memory mapped registers directly instead of using the standard I/O accessors. This can cause problems on some systems as the accesses can get out of order. So convert the direct volatile dereferences to use the normal in/out macros. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Ramon Fried <rfried.dev@gmail.com>
2020-07-25net: dc2114x: Drop update_srom()Marek Vasut1-91/+0
This code is never used, remove it. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Ramon Fried <rfried.dev@gmail.com>
2020-07-25net: dc2114x: Add Kconfig entriesMarek Vasut1-0/+6
Add Kconfig entries for the dc2114x driver and convert various boards. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Ramon Fried <rfried.dev@gmail.com>
2020-07-25net: dc2114x: Support all DC2114xMarek Vasut1-9/+0
For the usage in this driver, the chips are identical, so support all of them. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Ramon Fried <rfried.dev@gmail.com>
2020-07-25net: dc2114x: Use PCI_DEVICE() to define PCI device compat listMarek Vasut1-2/+2
Use this macro to fully fill the PCI device ID table. This is mandatory for the DM PCI support, which checks all the fields. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Ramon Fried <rfried.dev@gmail.com>
2020-07-24Revert "Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm"Tom Rini21-22/+22
This reverts commit 5d3a21df6694ebd66d5c34c9d62a26edc7456fc7, reversing changes made to 56d37f1c564107e27d873181d838571b7d7860e7. Unfortunately this is causing CI failures: https://travis-ci.org/github/trini/u-boot/jobs/711313649 Signed-off-by: Tom Rini <trini@konsulko.com>
2020-07-20treewide: convert devfdt_get_addr() to dev_read_addr()Masahiro Yamada21-22/+22
When you enable CONFIG_OF_LIVE, you will end up with a lot of conversions. To generate this commit, I used coccinelle excluding drivers/core/, include/dm/, and test/ The semantic patch that makes this change is as follows: <smpl> @@ expression dev; @@ -devfdt_get_addr(dev) +dev_read_addr(dev) </smpl> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-20treewide: remove (phys_addr_t) casts from devfdt_get_addr()Masahiro Yamada5-5/+5
This cast is unneeded. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-17treewide: convert bd_t to struct bd_info manuallyMasahiro Yamada3-4/+4
Some code was not converted by coccinelle, somehow. I manually fixed up the remaining, and comments, README docs. Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> [trini: Add arch/arm/mach-davinci/include/mach/sdmmc_defs.h and include/fdt_support.h] Signed-off-by: Tom Rini <trini@konsulko.com>
2020-07-17treewide: convert bd_t to struct bd_info by coccinelleMasahiro Yamada44-79/+82
The Linux coding style guide (Documentation/process/coding-style.rst) clearly says: It's a **mistake** to use typedef for structures and pointers. Besides, using typedef for structures is annoying when you try to make headers self-contained. Let's say you have the following function declaration in a header: void foo(bd_t *bd); This is not self-contained since bd_t is not defined. To tell the compiler what 'bd_t' is, you need to include <asm/u-boot.h> #include <asm/u-boot.h> void foo(bd_t *bd); Then, the include direcective pulls in more bloat needlessly. If you use 'struct bd_info' instead, it is enough to put a forward declaration as follows: struct bd_info; void foo(struct bd_info *bd); Right, typedef'ing bd_t is a mistake. I used coccinelle to generate this commit. The semantic patch that makes this change is as follows: <smpl> @@ typedef bd_t; @@ -bd_t +struct bd_info </smpl> Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
2020-07-13net: ti: am65-cpsw-nuss: Update driver to use kernel DTVignesh Raghavendra1-1/+1
Kernel DT has CPSW ports under ethernet-ports subnode. Update the driver to look for the same. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-07-13net: ti: am65-cpsw-nuss: Set ALE default thread enableVignesh Raghavendra1-0/+6
Force default thread to be used for RX as ALE is anyways set to Bypass mode. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-07-13net: ti: am65-cpsw-nuss: Remove dead codeVignesh Raghavendra1-7/+0
MDIO node is not referenced further, therefore drop the dead code. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-07-09net: mvpp2: fix second cp110 initializationSven Auhagen1-29/+34
Since the mdio code got upstreamed it is not possible to activate network ports on CP110 Master and Slave. The problem is in mvpp2_base_probe which is called for each CP110 and it initializes the buffer area for descs and rx_buffers. This should only happen once though and the bd space is actually set to 0 after the first run of the function. This leads to an error when the second CP110 tries the initialization again and disables all network ports on this CP110. This patch adds a static variable to check if the buffer area is initialized only once globally. Signed-off-by: Sven Auhagen <sven.auhagen@voleatech.de> Reviewed-by: Stefan Roese <sr@denx.de>
2020-07-07net: smc911x: Properly handle EEPROM MAC addressAndre Przywara1-24/+36
When compiled as a DM_ETH driver, the scm911x driver was reading the MAC address from the optional EEPROM storage, but failed to copy this to the platdata struct. Since it was also missing a definition of the read_rom_hwaddr() function, the generic Ethernet code was dismissing this MAC address, falling back to a random address or denying to start at all. Add an implementation of .read_rom_hwaddr, and refactor the function reading the ROM address to be called by all interested parties. This fixes MAC address issues when using the driver in DM_ETH "mode". Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-By: Ramon Fried <rfried.dev@gmail.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2020-07-07net: designware: s700: Add glue code for S700 macAmit Singh Tomar3-0/+75
This patchs adds glue logic to enable designware mac present on Action Semi based S700 SoC, Configures SoC specific bits. Undocumented bit that programs the PHY interface select register comes from vendor source. It has been tested on Cubieboard7-lite based on S700 SoC. Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
2020-07-07net: phy: realtek: Introduce PHY_RTL8201F_S700_RMII_TIMINGS to adjust rx/tx ↵Amit Singh Tomar2-0/+44
timings RTL8201F PHY module found on Actions Semi Cubieboard7 seems to have specific Rx/Tx interface timings requirement for proper PHY operations. These timing values are not documented anywhere and picked from vendor code. This commits lets proper packets to be transmitted over the network. Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
2020-07-07net: phy: realtek: Add support for RTL8201F PHY module.Amit Singh Tomar1-0/+20
This patch adds support for Realtek PHY RTL8201F 10/100Mbs (with variants: RTL8201FN and RTL8201FL) PHYceiver. It is present on Actions Semi Cubieboard7 board. Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
2020-07-07net: dwc_eth_qos: update the compatible supported for STM32Patrick Delaunay1-1/+1
Update the compatible associated with the STM32 MPU glue in the DWC ethernet driver. The supported compatible is the specific "st,stm32mp1-dwmac" as indicated in Linux binding Documentation/devicetree/bindings/net/stm32-dwmac.txt and not the "snps,dwmac-4.20a" only used to the select IP version. This glue is implemented in Linux kernel in: drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c For information in stm32mp151.dtsi, the 2 compatibles are supported: ethernet0: ethernet@5800a000 { compatible = "st,stm32mp1-dwmac", "snps,dwmac-4.20a"; ... }; Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-06-30Merge tag 'mips-pull-2020-06-29' of ↵Tom Rini1-0/+1
https://gitlab.denx.de/u-boot/custodians/u-boot-mips into next - net: pcnet: cleanup and add DM support - Makefile: add rule to build an endian-swapped U-Boot image used by MIPS Malta EL variants - CI: add Qemu tests for MIPS Malta
generated by cgit v1.1 at 2024-07-15 18:59:40 +0000