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2022-04-10treewide: Rename PHY_INTERFACE_MODE_NONE to PHY_INTERFACE_MODE_NAMarek Behún3-3/+3
Rename constant PHY_INTERFACE_MODE_NONE to PHY_INTERFACE_MODE_NA to make it compatible with Linux' naming. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
2022-04-10net: introduce helpers to get PHY interface mode from a device/ofnodeMarek Behún3-32/+17
Add helpers ofnode_read_phy_mode() and dev_read_phy_mode() to parse the "phy-mode" / "phy-connection-type" property. Add corresponding UT test. Use them treewide. This allows us to inline the phy_get_interface_by_name() into ofnode_read_phy_mode(), since the former is not used anymore. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Tested-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-02-03net: ti: am65-cpsw: Cleanup resources before jump to kernelVignesh Raghavendra1-1/+1
In case fastboot over Ethernet, am65_cpsw_stop() is not called unless DM_FLAG_OS_PREPARE is set. Without call to am65_cpsw_stop(), DMA resources are not released thus leading to failures in kernel. Fix this by adding DM_FLAG_OS_PREPARE flag to am65_cpsw_nuss_port driver. Reported-by: Christian Gmeiner <christian.gmeiner@gmail.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2022-01-28net: ti: am65-cpsw-nuss: Fix err msg for port bind failuresVignesh Raghavendra1-1/+1
Replace error case print with meaning full message. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2022-01-15net: ti: am65-cpsw: Add support for multi port independent MAC modeVignesh Raghavendra2-27/+52
On certain TI SoC, like AM64x there is a CPSW3G which supports 2 external independent MAC ports for single CPSW instance. It is not possible for Ethernet driver to register more than one port for given instance. This patch modifies top level CPSW NUSS as UCLASS_MISC and binds UCLASS_ETH to individual ports so as to support bring up more than one Ethernet interface in U-Boot. Note that there is no isolation in the since, CPSW NUSS is in promisc mode and forwards all packets to host. Since top level driver is now UCLASS_MISC, board files would need to instantiate this driver explicitly. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2021-09-28net: davinci_emac: ensure mdiodev->name is NULL terminated after ↵Vladimir Oltean1-1/+1
MDIO_NAME_LEN truncation strncpy() simply bails out when copying a source string whose size exceeds the destination string size, potentially leaving the destination string unterminated. One possible way to address is to pass MDIO_NAME_LEN - 1 and a previously zero-initialized destination string, but this is more difficult to maintain. The chosen alternative is to use strlcpy(), which properly limits the copy len in the (srclen >= size) case to "size - 1", and which is also more efficient than the strncpy() byte-by-byte implementation by using memcpy. The destination string returned by strlcpy() is always NULL terminated. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-05-12net: ti: am65-cpsw-nuss: Add a new compatible for AM64Vignesh Raghavendra1-0/+1
Add a new compatible to support AM64 SoC Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2021-05-12net: ti: am65-cpsw-nuss: Don't cache disabled port IDVignesh Raghavendra1-1/+1
Currently driver may end up caching disabled port ID as active interface. Fix this by bailing out earlier in case port is marked disabled in the DT. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2021-05-12net: ti: am65-cpsw-nuss: Prepare to support non primary ext portVignesh Raghavendra1-1/+1
CPSW NUSS IP on K3 SoCs can have more than one external port (upto 8) Therefore increase AM65_CPSW_CPSWNU_MAX_PORTS to 9 (8 ext + 1 Root port) as preparation to allow any one of the 8 ports to be used as ethernet interface in U-Boot. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2021-02-02common: Drop asm/global_data.h from common headerSimon Glass2-0/+2
Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
2020-12-13dm: treewide: Rename ofdata_to_platdata() to of_to_plat()Simon Glass2-6/+6
This name is far too long. Rename it to remove the 'data' bits. This makes it consistent with the platdata->plat rename. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13dm: treewide: Rename dev_get_platdata() to dev_get_plat()Simon Glass4-14/+14
Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13dm: treewide: Rename 'platdata' variables to just 'plat'Simon Glass4-5/+5
We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13dm: treewide: Rename auto_alloc_size members to be shorterSimon Glass4-9/+9
This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-09-30net: ti: cpsw: Fix not calling dev_dbg with a deviceSean Anderson1-0/+6
Without DM_ETH, cpsw_priv.dev is an eth_device. Just use its name instead. Signed-off-by: Sean Anderson <seanga2@gmail.com> Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-07-28Convert CONFIG_DRIVER_TI_EMAC_USE_RMII to KconfigAdam Ford1-0/+6
This converts the following to Kconfig: CONFIG_DRIVER_TI_EMAC_USE_RMII Signed-off-by: Adam Ford <aford173@gmail.com>
2020-07-25treewide: convert devfdt_get_addr() to dev_read_addr()Masahiro Yamada1-1/+1
When you enable CONFIG_OF_LIVE, you will end up with a lot of conversions. To generate this commit, I used coccinelle excluding drivers/core/, include/dm/, and test/ The semantic patch that makes this change is as follows: <smpl> @@ expression dev; @@ -devfdt_get_addr(dev) +dev_read_addr(dev) </smpl> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-24Revert "Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm"Tom Rini1-1/+1
This reverts commit 5d3a21df6694ebd66d5c34c9d62a26edc7456fc7, reversing changes made to 56d37f1c564107e27d873181d838571b7d7860e7. Unfortunately this is causing CI failures: https://travis-ci.org/github/trini/u-boot/jobs/711313649 Signed-off-by: Tom Rini <trini@konsulko.com>
2020-07-20treewide: convert devfdt_get_addr() to dev_read_addr()Masahiro Yamada1-1/+1
When you enable CONFIG_OF_LIVE, you will end up with a lot of conversions. To generate this commit, I used coccinelle excluding drivers/core/, include/dm/, and test/ The semantic patch that makes this change is as follows: <smpl> @@ expression dev; @@ -devfdt_get_addr(dev) +dev_read_addr(dev) </smpl> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-17treewide: convert bd_t to struct bd_info by coccinelleMasahiro Yamada1-1/+1
The Linux coding style guide (Documentation/process/coding-style.rst) clearly says: It's a **mistake** to use typedef for structures and pointers. Besides, using typedef for structures is annoying when you try to make headers self-contained. Let's say you have the following function declaration in a header: void foo(bd_t *bd); This is not self-contained since bd_t is not defined. To tell the compiler what 'bd_t' is, you need to include <asm/u-boot.h> #include <asm/u-boot.h> void foo(bd_t *bd); Then, the include direcective pulls in more bloat needlessly. If you use 'struct bd_info' instead, it is enough to put a forward declaration as follows: struct bd_info; void foo(struct bd_info *bd); Right, typedef'ing bd_t is a mistake. I used coccinelle to generate this commit. The semantic patch that makes this change is as follows: <smpl> @@ typedef bd_t; @@ -bd_t +struct bd_info </smpl> Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
2020-07-13net: ti: am65-cpsw-nuss: Update driver to use kernel DTVignesh Raghavendra1-1/+1
Kernel DT has CPSW ports under ethernet-ports subnode. Update the driver to look for the same. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-07-13net: ti: am65-cpsw-nuss: Set ALE default thread enableVignesh Raghavendra1-0/+6
Force default thread to be used for RX as ALE is anyways set to Bypass mode. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-07-13net: ti: am65-cpsw-nuss: Remove dead codeVignesh Raghavendra1-7/+0
MDIO node is not referenced further, therefore drop the dead code. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-06-16net: cpsw: Add __maybe_unused to generated inlinesTom Rini1-2/+3
We generate a number of helper inline functions to make accesses easier. However not all permutations of each function will be used and clang will warn about unused ones. Decorate all of them with __maybe_unused because of this. Cc: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
2020-05-18common: Drop linux/bitops.h from common headerSimon Glass3-0/+3
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18common: Drop linux/delay.h from common headerSimon Glass3-0/+3
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18common: Drop log.h from common headerSimon Glass3-0/+3
Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18common: Drop image.h from common headerSimon Glass1-0/+1
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18common: Drop net.h from common headerSimon Glass2-0/+2
Move this header out of the common header. Network support is used in quite a few places but it still does not warrant blanket inclusion. Note that this net.h header itself has quite a lot in it. It could be split into the driver-mode support, functions, structures, checksumming, etc. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-09net: ethernet: ti: am65-cpsw-nuss: enable 10Mbps link speed in rgmii modeMurali Karicheri1-0/+4
In RGMII mode the 10Mbps link speed is supported only when CPSW2G MAC SL is configured for External Control ("in band") mode CPSW_PN_MAC_CONTROL_REG.CTL_EN(18) = 1 Hence update am65_cpsw_update_link() to follow documentation. Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
2020-02-05dm: core: Create a new header file for 'compat' featuresSimon Glass4-0/+5
At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
2019-12-09net: ti: am65-cpsw-nuss: Add new compatible for J721eVignesh Raghavendra1-0/+1
Add new compatible to handle J721e SoC Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
2019-12-09net: ti: am65-cpsw-nuss: Rework RX flow ID handlingVignesh Raghavendra1-9/+6
Get flow ID information for RX DMA channel using dma_get_cfg() interface instead of reading from DT. This is required in order to avoid DT update whenever there is change in the range of flow ID allocated to the host. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
2019-12-03net: cpsw: Add NULL pointer checkFaiz Abbas1-0/+3
Add null pointer check to take care of out of memory errors. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
2019-12-02common: Move ARM cache operations out of common.hSimon Glass2-0/+2
These functions are CPU-related and do not use driver model. Move them to cpu_func.h Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-11-04net: ti: cpsw: convert to use dev/ofnode apiGrygorii Strashko1-69/+50
Conver TI CPSW driver to use dev/ofnode api. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> [trini: Add <dm/ofnode.h> to provide the prototype to ofnode] Signed-off-by: Tom Rini <trini@konsulko.com>
2019-11-03net: ti: am65x-cpsw: fix mac tx internal delay for rgmii-rxid modeGrygorii Strashko1-1/+1
Now AM65x CPSW2G driver will disable MAC TX internal delay for PHY interface mode "rgmii-rxid" which is incorrect. Hence, fix it by keeping default value (enabled) for MAC TX internal delay when "rgmii-rxid" interface mode is selected. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
2019-11-03net: ti: cpsw: fix mac tx internal delay for rgmii-rxid modeGrygorii Strashko1-1/+1
Now TI CPSW driver will disable MAC TX internal delay for PHY interface mode "rgmii-rxid" which is incorrect. Hence, fix it by keeping default value (enabled) for MAC TX internal delay when "rgmii-rxid" interface mode is selected. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
2019-11-03net: ti: cpsw: add support for standard eth "max-speed" dt propertyGrygorii Strashko1-0/+15
This patch adds support for standard Ethernet "max-speed" DT property to allow PHY link speed limitation. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
2019-11-03net: ti: cpsw: move parsing of dt port's parameters in separate funcGrygorii Strashko1-24/+33
Move parsing of dt port's parameters in separate func for better code readability. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
2019-11-03net: ti: cpsw: enable 10Mbps link speed support in rgmii modeGrygorii Strashko1-0/+3
According to TRMs the 10Mbps link speed is supported in RGMII only when CPSW2G MAC SL is configured for External Control ("in band") mode CPSW_SL_MACCTRL.EXT_EN(18) = 1. Hence update cpsw_slave_update_link() to follow documentation. [1] https://patchwork.kernel.org/patch/10285239/ Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
2019-08-11env: Drop environment.h header file where not neededSimon Glass1-1/+0
This header file is now only used by files that access internal environment features. Drop it from various places where it is not needed. Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Simon Glass <sjg@chromium.org>
2019-07-25net: davinci_emac: convert to using the driver modelBartosz Golaszewski1-35/+42
Now that we removed all legacy boards selecting TI_EMAC we can completely convert the driver code to using the driver model. This patch also updates all remaining users of davinci_emac. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Tested-by: Adam Ford <aford173@gmail.com> #am3517-evm & da850-evm Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2019-07-15net: ethernet: ti: Introduce am654 gigabit eth switch subsystem driverKeerthy3-0/+801
Add new driver for the TI AM65x SoC Gigabit Ethernet Switch subsystem (CPSW NUSS). It has two ports and provides Ethernet packet communication for the device and can be configured as an Ethernet switch. CPSW NUSS features: the Reduced Gigabit Media Independent Interface (RGMII), Reduced Media Independent Interface (RMII), and the Management Data Input/Output (MDIO) interface for physical layer device (PHY) management. The TI AM65x SoC has integrated two-port Gigabit Ethernet Switch subsystem into device MCU domain named MCU_CPSW0. One Ethernet port (port 1) with selectable RGMII and RMII interfaces and an internal Communications Port Programming Interface (CPPI) port (Host port 0). Host Port 0 CPPI Packet Streaming Interface interface supports 8 TX channels and on RX channels operating by TI am654 NAVSS Unified DMA Peripheral Root Complex (UDMA-P) controller. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Keerthy <j-keerthy@ti.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-07-15driver: net: ti: cpsw-mdio: use phys_addr_t for mdio_base addrKeerthy2-3/+3
Use phys_addr_t for mdio_base address to avoid build warnings on arm64 and dra7. Cast it to uintprt_t before assigning to regs. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Keerthy <j-keerthy@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-05-04net: davinci_emac: drop support for unused PHYsBartosz Golaszewski1-49/+6
The boards with SoCs from the DaVinci DM* family used to come with different PHYs that needed special support implemented in mach-davinci. Since the support for these chips has long been removed, we can now drop this unnused code from the emac driver. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
2019-04-12board: ti: am335x: Add platdata for cpsw in SPLFaiz Abbas1-18/+0
The SPL image overflows when cpsw dt nodes are added and SPL_OF_CONTROL is enabled. Use static platdata instead to save space. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2019-04-12net: ti: cpsw: Enable DM_FLAG_PRE_RELOCFaiz Abbas1-1/+1
Add DM_FLAG_PRE_RELOC to make the driver probe in SPL. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2019-04-12net: ti: cpsw: Block off ofdata_to_platdata with OF_CONTROLFaiz Abbas1-7/+11
The ofdata_to_platdata function should not be called if OF_CONTROL is not enabled because fdtdec_* calls will fail. Block the function with OF_CONTROL Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2019-04-12net: ti: cpsw-common: Isolate getting syscon address from assigning macidFaiz Abbas2-72/+58
ti_cm_get_macid() is used to get a syscon node from the dt, read the efuse address and then assign the macid read from the address. Divide these two steps into separate functions one of which can be called from ofdata_to_platdata() while the other can be called from _probe(). This ensures that platdata can be assigned statically in a board file when OF_CONTROL is not enabled. Also add a macid_sel_compat in private data to get information about the macid byte placement. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
generated by cgit v1.1 at 2024-09-06 05:23:22 +0000