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2021-10-23Merge https://source.denx.de/u-boot/custodians/u-boot-spiWIP/23Oct2021Tom Rini12-76/+79
- Fix mtd erase with mtdpart (Marek Behún) - NXP fspi driver fixes (Kuldeep Singh)
2021-10-23mtd: spi-nor-ids: Add SECT_4K to mt25qu512aKris Chaplin1-1/+1
The mt25qu512a supports 4K or 64K sectors, so adding SECT_4K to enable 4K sector usage. Tested on Intel n5x hardware with QSPI carrier card Signed-off-by: Kris Chaplin <kris.chaplin@linux.intel.com> Acked-by: Pratyush Yadav <p.yadav@ti.com> [jagan: droped Tested-by of patch author and datasheet link] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2021-10-23mtd: spi-nor-ids: Add is25lp512 and is25wp512 devicesKris Chaplin1-0/+4
Add is25lp512 and is25wp512 devices to spi-nor id table Tested on Intel n5x hardware with QSPI carrier card Signed-off-by: Kris Chaplin <kris.chaplin@linux.intel.com> [jagan: droped Tested-by of patch author] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2021-10-23mtd: Remove mtd_erase_callback() entirelyMarek Behún10-68/+2
The original purpose of mtd_erase_callback() in Linux at the time it was imported to U-Boot, was to inform the caller that erasing is done (since it was an asynchronous operation). All supplied callback methods in U-Boot do nothing, but the mtd_erase_callback() function was (until previous patch) grossly abused in U-Boot's mtdpart implementation for completely different purpose. Since we got rid of the abusement, remove the mtd_erase_callback() function and the .callback member from struct erase_info entirely, in order to avoid such problems in the future. Signed-off-by: Marek Behún <marek.behun@nic.cz>
2021-10-23mtd: mtdpart: Make mtdpart's _erase method saneMarek Behún1-8/+18
The _erase() method of the mtdpart driver, part_erase(), currently implements offset shifting (for given mtdpart partition) in a weird way: 1. part_erase() adds partition offset to block address 2. parent driver's _erase() method is called 3. parent driver's _erase() method calls mtd_erase_callback() 4. mtd_erase_callback() subtracts partition offset from block address so that the callback function is given correct address The problem here is that if the parent's driver does not call mtd_erase_callback() in some scenario (this was recently a case for spi_nor_erase(), which did not call mtd_erase_callback() at all), the offset is not shifted back. Moreover the code would be more readable if part_erase() not only added partition offset before calling parent's _erase(), but also subtracted it back afterwards. Currently the mtd_erase_callback() is expected to do this subtracting since it does have to do it anyway. Add the more steps to this procedure: 5. mtd_erase_callback() adds partition offset to block address so that it returns the the erase_info structure members as it received them 6. part_erase() subtracts partition offset from block address This makes the code more logical and also prevents errors in case parent's driver does not call mtd_erase_callback() for some reason. (BTW, the purpose of mtd_erase_callback() in Linux is to inform the caller that it is done, since in Linux erasing is done asynchronously. We are abusing the purpose of mtd_erase_callback() in U-Boot for completely different purpose. The callback function itself has empty implementation in all cases in U-Boot.) Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
2021-10-23mtd: spi-nor-core: Check for ctrlc() in spi_nor_erase()Marek Behún1-0/+5
May it possible to interrupt the spi_nor_erase() function. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
2021-10-23mtd: spi-nor-core: Call mtd_erase_callback() from spi_nor_erase()Marek Behún1-2/+18
The spi_nor_erase() function does not call mtd_erase_callback() as it should. The mtdpart code currently implements the subtraction of partition offset in mtd_erase_callback(). This results in partition offset being added prior calling spi_nor_erase(), but not subtracted back on return. The result is that the `mtd erase` command does not erase the whole partition, only some of it's blocks: => mtd erase "Rescue system" Erasing 0x00000000 ... 0x006fffff (1792 eraseblock(s)) jedec_spi_nor spi-nor@0: at 0x100000, len 4096 jedec_spi_nor spi-nor@0: at 0x201000, len 4096 jedec_spi_nor spi-nor@0: at 0x302000, len 4096 jedec_spi_nor spi-nor@0: at 0x403000, len 4096 jedec_spi_nor spi-nor@0: at 0x504000, len 4096 jedec_spi_nor spi-nor@0: at 0x605000, len 4096 jedec_spi_nor spi-nor@0: at 0x706000, len 4096 This is obviously wrong. Add proper calling of mtd_erase_callback() into the spi_nor_erase() function. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Simon Glass <sjg@chromium.org> Reported-by: Masami Hiramatsu <masami.hiramatsu@linaro.org> Tested-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
2021-10-23mtd: spi-nor-core: Don't check for zero length in spi_nor_write() / ↵Marek Behún1-6/+0
spi_nor_erase() This check is already done in all callers: mtdcore's mtd_write() / mtd_erase(), legacy spi_nor_write() / spi_flash_erase(). No reason to do this here as well. Signed-off-by: Marek Behún <marek.behun@nic.cz>
2021-10-23mtd: spi-nor-core: Check return value of write_disable() in spi_nor_erase()Marek Behún1-1/+3
The cleanup code of spi_nor_erase() function calls write_disable(), but does not return it's return value even in case of failure. Fix this. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
2021-10-23mtd: spi-nor-core: Don't overwrite return value if it is non-zeroMarek Behún1-2/+4
The cleanup code of the spi_nor_erase() function overwrites the ret variable with return value of clean_bar(), even if the ret variable is already set. Fix this. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
2021-10-23mtd: spi-nor-core: Check return value of write_enable() in spi_nor_erase()Marek Behún1-1/+3
The spi_nor_erase() function does not check return value of the write_enable() call. Fix this. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Pratyush Yadav <p.yadav@ti.com> Tested-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
2021-10-23mtd: spi-nor-core: Try cleaning up in case writing BAR failedMarek Behún1-1/+1
Use the cleanup codepath of spi_nor_erase() also in the event of failure of writing the BAR register. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Pratyush Yadav <p.yadav@ti.com> Tested-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
2021-10-23mtd: spi-nor: Add support for Spansion S25FL256LTakahiro Kuwano2-0/+20
The S25FL256L is a part of the S25FL-L family and has the same feature set as S25FL128L except the density. The datasheet can be found in the following link. https://www.cypress.com/file/316171/download The S25FL256L is 32MB NOR Flash that does not support Bank Address Register. This fixup is activated if CONFIG_SPI_FLASH_BAR is enabled and returns ENOTSUPP in setup() hook to avoid further ops. Tested on Xilinx Zynq-7000 FPGA board. Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
2021-10-23mtd: spi-nor-ids: Add GD25LQ256D ChipYanhong Wang1-0/+5
Add Gigadevice GD25LQ256D SPI NOR chip. https://www.gigadevice.com/datasheet/gd25lq256d/ Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> [jagan: updated commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2021-10-20Merge tag 'u-boot-imx-20211020' of ↵WIP/20Oct2021Tom Rini2-1/+7
https://source.denx.de/u-boot/custodians/u-boot-imx u-boot-imx-20211020 ------------------- First PR from u-boot-imx for 2022.01 CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/9535 - new board: kontron-sl-mx8mm - imx8m: - fix secure boot - imx ESDHC: fixes - i.MX53: Support thum2, bmode and fixes for Menlo board usbarmory switch to Ethernet driver model - imx6 : - DDR calibration for Toradex boards - imx7: - Fixes - Updated gateworks boards (ventana / venice) # gpg verification failed.
2021-10-12mtd: rawnand: Add Macronix raw NAND controller driverZhengxun Li3-0/+610
Add a driver for Macronix raw NAND controller. This patch referred from linux mxic_nand.c. The difference from the linux version is described here. 1. In order to adapt to the uboot nand framework, add function binding (cmdfunc, read_byte, read_buf, write_buf). 2. Added parsing command format to use hardware correctly. 3. Remove the incompatible functions of Uboot. Signed-off-by: Zhengxun Li <zhengxunli@mxic.com.tw>
2021-10-12Merge tag 'u-boot-stm32-20211012' of ↵Tom Rini1-0/+7
https://source.denx.de/u-boot/custodians/u-boot-stm - Disable ATAGS for STM32 MCU and MPU boards - Disable bi_boot_params for STM32 MCU and MPU boards - Update stm32-usbphyc node management - Convert CONFIG_STM32_FLASH to Kconfig for STM32 MCU boards - Convert some USB config flags to Kconfig for various boards - Convert CONFIG_BOOTCOMMAND flag to Kconfig for STM32 F429 board - Remove specific CONFIG_STV0991 flags - Remove unused CONFIG_USER_LOWLEVEL_INIT flag - Add ofdata_to_platdata() callback for stm32_spi driver - Update for stm32f7_i2c driver - Remove gpio_hog_probe_all() from STM32 MP1 board - Fix bind command Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-08mtd: spi-nor-ids: Reinstate Micron MT25QL02GMarek Vasut1-0/+1
This ID disappeared in 5b66fdb29dc ("mtd: spi: Remove unused files"), add the ID back, since the chip is used on devices supported by U-Boot. Fixes: 5b66fdb29dc ("mtd: spi: Remove unused files") Signed-off-by: Marek Vasut <marex@denx.de> Cc: Horatiu Vultur <horatiu.vultur@microchip.com> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Cc: Stefan Roese <sr@denx.de> Cc: Vignesh R <vigneshr@ti.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2021-10-08mtd: spinand: macronix: Fix ECC Status ReadHaolin Li1-1/+9
According to datasheet, the upper four bits are reserved or used for reflecting the ECC status of the accumulated pages. The error bits number for the worst segment of the current page is encoded on lower four bits. Fix it by masking the upper bits. This same issue has been already fixed in the linux kernel by: "mtd: spinand: macronix: Fix ECC Status Read" (sha1: f4cb4d7b46f6409382fd981eec9556e1f3c1dc5d) Apply the same fix in the U-Boot driver. Signed-off-by: Haolin Li <li.haolin@qq.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2021-10-08Convert CONFIG_STM32_FLASH to KconfigPatrick Delaunay1-0/+7
This converts the CONFIG_STM32_FLASH to Kconfig by using tools/moveconfig.py Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-10-07mtd: nand: mxs_nand_spl: Add nand_spl_adjust_offsetYe Li1-0/+6
Since the mxs_nand_spl has implemented adjust read offset in nand_spl_load_image, so we don't need to check the bad block in nand_spl_adjust_offset. Directly return the offset to continue read by nand_spl_load_image. Signed-off-by: Ye Li <ye.li@nxp.com>
2021-10-07mtd: nand: Fix typo in MXC Kconfig symbol descriptionHaolin Li1-1/+1
Trivial typo fix. Signed-off-by: Haolin Li <li.haolin@qq.com> Reviewed-by: Michal Simek <michal.simek@xilinx.com>
2021-10-06Convert CONFIG_NAND_OMAP_ECCSCHEME to KconfigWIP/2021-10-06-assorted-improvementsTom Rini1-2/+101
The values of CONFIG_NAND_OMAP_ECCSCHEME map to the enum in include/linux/mtd/omap_gpmc.h for valid ECC schemes. Make which one we will use be a choice statement, enumerating the ones which we have implemented. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-06Convert CONFIG_NAND_FSL_ELBC et al to KconfigTom Rini1-0/+11
This converts the following to Kconfig: CONFIG_NAND_FSL_ELBC CONFIG_NAND_FSL_IFC Note that a number of PowerPC platforms had previously enabled CONFIG_NAND_FSL_ELBC without CONFIG_MTD_RAW_NAND, and now they no longer enable the option, reducing the size of a few functions. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-06Convert CONFIG_SYS_NAND_MAX_CHIPS to KconfigTom Rini2-7/+8
This converts the following to Kconfig: CONFIG_SYS_NAND_MAX_CHIPS Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-06nand.h: Cleanup linux/mtd/rawnand.h usageTom Rini26-0/+26
We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-06Convert CONFIG_SYS_NAND_ONFI_DETECTION to KconfigTom Rini1-1/+8
This converts the following to Kconfig: CONFIG_SYS_NAND_ONFI_DETECTION Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-06Convert CONFIG_SYS_NAND_5_ADDR_CYCLE to KconfigTom Rini1-0/+9
This converts the following to Kconfig: CONFIG_SYS_NAND_5_ADDR_CYCLE Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-06Convert CONFIG_SYS_NAND_BAD_BLOCK_POS to KconfigTom Rini1-0/+21
This converts the following to Kconfig: CONFIG_SYS_NAND_BAD_BLOCK_POS In order to do this, introduce a choice for HAS_LARGE/SMALL_BADBLOCK_POS as those are the only valid values. Use LARGE as the default as no in-tree boards use SMALL, but it is possible. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-06nand_spl_simple: Drop CONFIG_SYS_NAND_4_ADDR_CYCLE supportTom Rini1-5/+0
This code is unused, drop it. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-06Convert CONFIG_SYS_NAND_PAGE_COUNT to KconfigTom Rini1-0/+7
This converts the following to Kconfig: CONFIG_SYS_NAND_PAGE_COUNT Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-06Convert CONFIG_SPL_NAND_LOAD et al to KconfigTom Rini1-3/+14
This converts the following to Kconfig: CONFIG_SPL_NAND_LOAD CONFIG_SYS_NAND_BLOCK_SIZE CONFIG_SYS_NAND_PAGE_SIZE CONFIG_SYS_NAND_OOBSIZE Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-06Convert CONFIG_NAND_LPC32XX_MLC to KconfigTom Rini1-0/+5
This converts the following to Kconfig: CONFIG_NAND_LPC32XX_MLC Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-01arm: Remove zmx25 board and ARCH_MX25Tom Rini2-6/+1
This board has not been converted to CONFIG_DM by the deadline. Remove it. As this is the last ARCH_MX25 platform, remove those references as well. Cc: Matthias Weisser <weisserm@arcor.de> Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-01arm: Remove flea3 boardTom Rini2-2/+2
This board has not been converted to CONFIG_DM by the deadline. Remove it. As this is the last mx35 platform, remove that support as well. Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Stefano Babic <sbabic@denx.de>
2021-09-30Merge tag 'xilinx-for-v2022.01-rc1' of ↵Tom Rini2-4/+15
https://source.denx.de/u-boot/custodians/u-boot-microblaze into next Xilinx changes for v2022.01-rc1 zynq: - Enable capsule update for qspi and mmc - Update zed DT qspi compatible string zynqmp: - Add missing modeboot for EMMC - Add missing nand DT properties - List all eeproms for SC on vck190 - Add vck190 SC psu_init clk: - Handle only GATE type clock for Versal watchdog: - Update versal driver to handle system reset
2021-09-30WS cleanup: remove SPACE(s) followed by TABWolfgang Denk8-29/+29
Signed-off-by: Wolfgang Denk <wd@denx.de>
2021-09-30WS cleanup: remove trailing white spaceWolfgang Denk4-5/+5
Signed-off-by: Wolfgang Denk <wd@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-09-30WS cleanup: remove excessive empty linesWolfgang Denk1-2/+0
Signed-off-by: Wolfgang Denk <wd@denx.de>
2021-09-30WS cleanup: remove trailing empty linesWolfgang Denk1-1/+0
Signed-off-by: Wolfgang Denk <wd@denx.de>
2021-09-28Merge branch '2021-09-25-TI-platform-updates' into nextTom Rini2-6/+10
- Start moving some TI board docs to rST - Assorted TI-specific Kconfig migrations and namespace cleanups. This also allows for some code cleanups.
2021-09-28mtd: nand: raw: convert nand_dt_init() to ofnode_xx() interfacePatrice Chotard5-20/+15
nand_dt_init() is still using fdtdec_xx() interface. If OF_LIVE flag is enabled, dt property can't be get anymore. Updating all fdtdec_xx() interface to ofnode_xx() to solve this issue. For doing this, node parameter type must be ofnode. First idea was to convert "node" parameter to ofnode type inside nand_dt_init() using offset_to_ofnode(node). But offset_to_ofnode() is not bijective, in case OF_LIVE flag is enabled, it performs an assert(). So, this leads to update nand_chip struct flash_node field from int to ofnode and to update all nand_dt_init() callers. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-09-28mtd: spi: Set CONFIG_SF_DEFAULT_MODE default to 0Marek Vasut1-1/+1
Before e2e95e5e254 ("spi: Update speed/mode on change") most systems silently defaulted to SF bus mode 0. Now the mode is always updated, which causes breakage. It seems most SF which are used as boot media operate in bus mode 0, so switch that as the default. This should fix booting at least on Altera SoCFPGA, ST STM32, Xilinx ZynqMP, NXP iMX and Rockchip SoCs, which recently ran into trouble with mode 3. Marvell Kirkwood and Xilinx microblaze need to be checked as those might need mode 3. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com> Cc: Andreas Biessmann <andreas@biessmann.org> Cc: Eugen Hristev <eugen.hristev@microchip.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Siew Chin Lim <elly.siew.chin.lim@intel.com> Cc: Tom Rini <trini@konsulko.com> Cc: Valentin Longchamp <valentin.longchamp@hitachi-powergrids.com> Cc: Vignesh Raghavendra <vigneshr@ti.com>
2021-09-28mtd: spi: nor: force mtd name to "nor%d"Patrick Delaunay1-3/+14
Force the mtd name of spi-nor to "nor" + the driver sequence number: "nor0", "nor1"... beginning after the existing nor devices. This patch is coherent with existing "nand" and "spi-nand" mtd device names. When CFI MTD NOR device are supported, the spi-nor index is chosen after the last CFI device defined by CONFIG_SYS_MAX_FLASH_BANKS. When CONFIG_SYS_MAX_FLASH_BANKS_DETECT is activated, this config is replaced by to cfi_flash_num_flash_banks in the include file mtd/cfi_flash.h. This generic name "nor%d" can be use to identify the mtd spi-nor device without knowing the real device name or the DT path of the device, used with API get_mtd_device_nm() and is used in mtdparts command. This patch also avoids issue when the same NOR device is present 2 times, for example on STM32MP15F-EV1: STM32MP> mtd list SF: Detected mx66l51235l with page size 256 Bytes, erase size 64 KiB, \ total 64 MiB List of MTD devices: * nand0 - type: NAND flash - block size: 0x40000 bytes - min I/O: 0x1000 bytes - OOB size: 224 bytes - OOB available: 118 bytes - ECC strength: 8 bits - ECC step size: 512 bytes - bitflip threshold: 6 bits - 0x000000000000-0x000040000000 : "nand0" * mx66l51235l - device: mx66l51235l@0 - parent: spi@58003000 - driver: jedec_spi_nor - path: /soc/spi@58003000/mx66l51235l@0 - type: NOR flash - block size: 0x10000 bytes - min I/O: 0x1 bytes - 0x000000000000-0x000004000000 : "mx66l51235l" * mx66l51235l - device: mx66l51235l@1 - parent: spi@58003000 - driver: jedec_spi_nor - path: /soc/spi@58003000/mx66l51235l@1 - type: NOR flash - block size: 0x10000 bytes - min I/O: 0x1 bytes - 0x000000000000-0x000004000000 : "mx66l51235l" The same mtd name "mx66l51235l" identify the 2 instances mx66l51235l@0 and mx66l51235l@1. This patch fixes a ST32CubeProgrammer / stm32prog command issue with nor0 target on STM32MP157C-EV1 board introduced by commit b7f060565e31 ("mtd: spi-nor: allow registering multiple MTDs when DM is enabled"). Fixes: b7f060565e31 ("mtd: spi-nor: allow registering multiple MTDs when DM is enabled") Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> [trini: Add <dm/device.h> to <mtd.h> for DM_MAX_SEQ_STR] Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-28mtd: nand: raw: convert nand_dt_init() to ofnode_xx() interfacePatrice Chotard5-20/+15
nand_dt_init() is still using fdtdec_xx() interface. If OF_LIVE flag is enabled, dt property can't be get anymore. Updating all fdtdec_xx() interface to ofnode_xx() to solve this issue. For doing this, node parameter type must be ofnode. First idea was to convert "node" parameter to ofnode type inside nand_dt_init() using offset_to_ofnode(node). But offset_to_ofnode() is not bijective, in case OF_LIVE flag is enabled, it performs an assert(). So, this leads to update nand_chip struct flash_node field from int to ofnode and to update all nand_dt_init() callers. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-09-27ti: keystone: Clean up or migrate some NAND related options.Tom Rini2-6/+10
The COFNIG_KEYSTONE_RBL_NAND option is always enabled for the driver on keystone platforms, but not older davinci platforms. Use def_bool for the symbol. For CONFIG_KEYSTONE_NAND_MAX_RBL_PAGE, it's only used within the driver and derived from another symbol, so remove CONFIG from the name. Finally, CONFIG_KEYSTONE_NAND_MAX_RBL_SIZE is a bit more fixed. For now, use the value directly. Long term, as part of DM'ifying NAND, this should come from the device tree. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-27Merge tag 'v2021.10-rc5' into nextTom Rini2-566/+0
Prepare v2021.10-rc5
2021-09-24mtd: remove SPEAr flash driver st_smiPatrick Delaunay2-566/+0
Remove the driver st_smic.c used in SPEAr products and the associated config CONFIG_ST_SMI; this driver is no more used in U-Boot after the commit 570c3dcfc153 ("arm: Remove spear600 boards and the rest of SPEAr support"). Fixes: 570c3dcfc153 ("arm: Remove spear600 boards and the rest of SPEAr support") Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
2021-08-31Kconfig: Remove all default n/no optionsMichal Simek3-6/+0
default n/no doesn't need to be specified. It is default option anyway. Signed-off-by: Michal Simek <michal.simek@xilinx.com> [trini: Rework FSP_USE_UPD portion] Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-30nand: vf610_nfc: Do not abuse CONFIG namespaceTom Rini1-27/+27
This driver uses the CONFIG namespace to set the chips internal CONFIG namespace related bits. However, CONFIG is reserved for the top-level Kconfig based configuration system. Use CFG as the namespace here instead to avoid pollution. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
generated by cgit v1.1 at 2024-07-10 02:33:02 +0000