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path: root/drivers/mtd/nand
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2022-10-09mtd: mxs_nand: Support EDO mode for imx8mn architectureMichael Trimarchi2-27/+239
Add support for imx8mn architecture in order to run the NAND in fast edo mode. Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-10-09mtd: mxs_nand: get the clock with the right nameDario Binacchi1-3/+3
Rename the gpmi_apb_bch clock name to gpmi_bch_apb, as you can find in the device tree. Fixes: commit a59691280daca ("MXS_NAND: Add clock support for iMX8") Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
2022-10-09mtd: mxs_nand: don't get the gpmi_apbh_dma clockDario Binacchi1-13/+0
This clock name is not present in any U-boot and Linux kernel device tree. Fixes: commit a59691280daca ("MXS_NAND: Add clock support for iMX8") Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
2022-10-08mtd: nand: Fix SPL build after migration of CONFIG_SYS_NAND_SELF_INIT to KconfigRoger Quadros1-1/+1
This fixes the below build error if nand.c is included in an SPL build. /work/u-boot/drivers/mtd/nand/raw/nand.c: In function ‘nand_init_chip’: /work/u-boot/drivers/mtd/nand/raw/nand.c:82:28: error: ‘nand_chip’ undeclared (first use in this function) 82 | struct nand_chip *nand = &nand_chip[i]; | ^~~~~~~~~ /work/u-boot/drivers/mtd/nand/raw/nand.c:82:28: note: each undeclared identifier is reported only once for each function it appears in /work/u-boot/drivers/mtd/nand/raw/nand.c:84:20: error: ‘base_address’ undeclared (first use in this function); did you mean ‘base_addr’? 84 | ulong base_addr = base_address[i]; | ^~~~~~~~~~~~ | base_addr Fixes: 068c41f1cc77 ("Finish conversion CONFIG_SYS_NAND_SELF_INIT to Kconfig") Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-10-06mtd: nand: pxa3xx: simplify ECC hardware parametersChris Packham1-179/+68
Replace the if/else chain in pxa_ecc_init() with a lookup table. This makes the code more concise and hopefully easier to follow. Remove the unused ecc_layout tables and replace it with a single dummy one (the pxa3xx driver has never used this but the mtd subsystem expects it to be provided). Tested on an Allied Telesis x530 switch with Micron MT29F2G08ABAEAWP NAND Flash. Signed-off-by: Chris Packham <judge.packham@gmail.com>
2022-09-29dm: core: Drop ofnode_is_available()Simon Glass1-1/+1
This function is also available as ofnode_is_enabled(), so use that instead. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-18cyclic: Use schedule() instead of WATCHDOG_RESET()Stefan Roese5-14/+14
Globally replace all occurances of WATCHDOG_RESET() with schedule(), which handles the HW_WATCHDOG functionality and the cyclic infrastructure. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Tom Rini <trini@konsulko.com> [am335x_evm, mx6cuboxi, rpi_3,dra7xx_evm, pine64_plus, am65x_evm, j721e_evm]
2022-08-22mtd: rawnand: fsl_elbc: Fix reading address pointer from DTPali Rohár1-1/+1
During compilation gcc throws warning: drivers/mtd/nand/raw/fsl_elbc_nand.c: In function ‘fsl_elbc_nand_probe’: drivers/mtd/nand/raw/fsl_elbc_nand.c:841:31: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] return fsl_elbc_chip_init(0, (void *)dev_read_addr(dev), dev); ^ Fix it by using dev_read_addr_ptr() function which returns pointer instead of dev_read_addr() which returns integer type. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-08-22mtd: rawnand: fsl_elbc: Remove NAND_NO_SUBPAGE_WRITE flagPali Rohár1-1/+0
Subpage write support for freescale eLBC NAND controller driver is implemented in U-Boot and was fixes in the commit d3963721d93f ("nand: Sync with Linux v4.1"). So remove NAND_NO_SUBPAGE_WRITE flag from the fsl_elbc_nand.c driver. This partially revert commit cb04c7723429 ("nand/fsl: add NAND_NO_SUBPAGE_WRITE to eLBC and IFC drivers"), only eLBC driver part. With this change U-Boot with default settings can read from NAND UBIFS image created on Linux with Linux default settings. Prior this change U-Boot was unable to read from NAND UBIFS images created with Linux default settings due to differnet UBI geometry. Linux kernel fsl_elbc_nand.c driver also does not set NAND_NO_SUBPAGE_WRITE flag and has implemented subpage write support. Fixes: cb04c7723429 ("nand/fsl: add NAND_NO_SUBPAGE_WRITE to eLBC and IFC drivers") Fixes: d3963721d93f ("nand: Sync with Linux v4.1") Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Acked-By: Michael Trimarchi<michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-08-22mtd: nand: samsung: Retrieve ECC requirements from extendedMichael Trimarchi1-0/+20
Upstream linux commit 8fc82d456e40a0. On some nand controllers with hw-ecc the controller code wants to know the ecc strength and size and having these as 0, 0 is not accepted. Specifying these in devicetree is possible but undesirable as the nand may be different in different production runs of the same board, so it is better to get this info from the nand id where possible. This commit adds code to read the ecc strength and size from the nand for Samsung extended-id nands. This code is based on the info for the 5th id byte in the datasheets for the following Samsung nands: K9GAG08U0E, K9GAG08U0F, K9GAG08X0D, K9GBG08U0A, K9GBG08U0B. These all use these bits in the exact same way. Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-08-22mtd: nand: Rename nand_get_flash_type() into nand_detect()Michael Trimarchi3-9/+7
Upstream linux commit 7bb427990ee364. Rename the function to match this new behavior. NOTE: fix nand_detect/nand_get_flash_type parameters in mxs_nand_spl. This code seems never executed by any board as alternative for nand detect Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-08-22mtd: nand: change return type of nand_get_flash_type() to intMichael Trimarchi3-24/+22
Upstream linux commit 4722c0e958e636. The returned "type" is never used in nand_scan_ident() and spl code Make nand_get_flash_type() simply return an integer value in order to avoid unnecessary ERR_PTR/PTR_ERR dance. Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-08-22mtd: nand: Rename the nand_manufacturers structMichael Trimarchi2-3/+3
Upstream linux commit 8cfb9ab68f9070. Drop the 's' at the end of nand_manufacturers since the struct is actually describing a single manufacturer, not a manufacturer table. Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-07-29arm: mvebu: Fix compatible string for nand controllerPali Rohár1-1/+1
Linux kernel uses compatible string "marvell,armada370-nand-controller" for nand controllers on Armada 370/XP/38x. U-Boot currently uses mix of "marvell,armada370-nand" and "marvell,mvebu-pxa3xx-nand". So unify it and use just Linux kernel compatible string. Signed-off-by: Pali Rohár <pali@kernel.org> Acked-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Stefan Roese <sr@denx.de>
2022-07-22mtd: decommission the NAND museumMichael Trimarchi1-10/+0
Upstream linux commit f7025a43a9da26. The MTD subsystem has its own small museum of ancient NANDs in a form of the CONFIG_MTD_NAND_MUSEUM_IDS configuration option. The museum contains stone age NANDs with 256 bytes pages, as well as iron age NANDs with 512 bytes per page and up to 8MiB page size. It is with great sorrow that I inform you that the museum is being decommissioned. The MTD subsystem is out of budget for Kconfig options and already has too many of them, and there is a general kernel trend to simplify the configuration menu. We remove the stone age exhibits along with closing the museum REMARK Don't apply this part from upstream: Some of the iron age ones are transferred to the regular NAND depot. Namely, only those which have unique device IDs are transferred, and the ones which have conflicting device IDs are removed. Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-07-22mtd: nand: toshiba: Retrieve ECC requirements from extended IDMichael Trimarchi1-0/+26
Upstream linux commit fb3bff5b407e58. This patch enables support to read the ECC strength and size from the NAND flash using Toshiba Memory SLC NAND extended-ID. This patch is based on the information of the 6th ID byte of the Toshiba Memory SLC NAND. Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-07-22mtd: nand: Move Macronix specific initialization in nand_macronix.cMichael Trimarchi4-13/+35
Upstream linux commit 3b5206f4be9b65. Move Macronix specific initialization logic into nand_macronix.c. This is part of the "separate vendor specific code from core" cleanup process. Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-07-22mtd: nand: Move AMD/Spansion specific init/detection logic in nand_amd.cMichael Trimarchi4-18/+57
Upstream linux commit 229204da53b31d. Move AMD/Spansion specific initialization/detection logic into nand_amd.c. This is part of the "separate vendor specific code from core" cleanup process. Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-07-22mtd: nand: Move Micron specific init logic in nand_micron.cMichael Trimarchi4-33/+92
Upstream linux commit 10d4e75c36f6c1. Move Micron specific initialization logic into nand_micron.c. This is part of the "separate vendor specific code from core" cleanup process. Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-07-22mtd: nand: Move Toshiba specific init/detection logic in nand_toshiba.cMichael Trimarchi4-21/+58
Upstream linux commit 9b2d61f80b060c. Move Toshiba specific initialization and detection logic into nand_toshiba.c. This is part of the "separate vendor specific code from core" cleanup process. Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-07-22mtd: nand: Move Hynix specific init/detection logic in nand_hynix.cMichael Trimarchi4-88/+119
Upstream linux commit 01389b6bd2f4f7. Move Hynix specific initialization and detection logic into nand_hynix.c. This is part of the "separate vendor specific code from core" cleanup process. Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-07-22mtd: nand: Move Samsung specific init/detection logic in nand_samsung.cMichael Trimarchi4-51/+98
Upstream linux commit c51d0ac59f2420. Move Samsung specific initialization and detection logic into nand_samsung.c. This is part of the "separate vendor specific code from core" cleanup process. Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-07-22mtd: nand: Export symbol nand_decode_ext_idMichael Trimarchi1-1/+2
In preparation of moving specific nand support that are not jedec or onfi Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-07-22mtd: nand: Fix MediaTek MT7621 SoC buildMichael Trimarchi1-1/+1
nand_get_flash_type was reworked in commit 1ca6f9483e9ab5. This change break the Mediatek MT721. Fix it adjust the function call parameters +include/linux/mtd/rawnand.h:32:62: note: expected 'struct nand_chip *' but argument is of type 'struct mtd_info *' + 32 | struct nand_flash_dev *nand_get_flash_type(struct nand_chip *chip, + | ~~~~~~~~~~~~~~~~~~^~~~ +drivers/mtd/nand/raw/mt7621_nand.c:1189:48: error: passing argument 2 of 'nand_get_flash_type' from incompatible pointer type [-Werror=incompatible-pointer-types] + | ^~~~ + | | + | struct nand_chip * +include/linux/mtd/rawnand.h:33:49: note: expected 'int *' but argument is of type 'struct nand_chip *' + 33 | int *maf_id, int *dev_id, Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-07-22mtd: nand: Get rid of mtd variable in function callsMichael Trimarchi1-12/+13
chip points to mtd. Passing chip is enough to have a reference to mtd when is necessary Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-07-22mtd: nand: Add manufacturer specific initialization/detection stepsMichael Trimarchi1-23/+75
Upstream linux commit abbe26d144ec22. A lot of NANDs are implementing generic features in a non-generic way, or are providing advanced auto-detection logic where the NAND ID bytes meaning changes with the NAND generation. Providing this vendor specific initialization step will allow us to get rid of full-id entries in the nand_ids table or all the vendor specific cases added over the time in the generic NAND ID decoding logic. Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-07-22mtd: nand: Store nand ID in struct nand_chipMichael Trimarchi1-29/+29
Upstream linux commit 7f501f0a72036d. Store the NAND ID in struct nand_chip to avoid passing id_data and id_len as function parameters. Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-07-22mtd: nand: Get rid of busw parameterMichael Trimarchi1-27/+32
Upstream linux commit 29a198a1592d83. Auto-detection functions are passed a busw parameter to retrieve the actual NAND bus width and eventually set the correct value in chip->options. Rework the nand_get_flash_type() function to get rid of this extra parameter and let detection code directly set the NAND_BUSWIDTH_16 flag in chip->options if needed. Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-07-18sunxi-nand: fix the PIO instead of DMA implementationMarkus Hoffrogge1-1/+1
The sunxi nand SPL loader was broken at least for SUN4I, SUN5I and SUN7I SOCs since the implementation change from DMA to PIO usage - commit 6ddbb1e. Root cause for this issue is the NFC control flag NFC_CTL_RAM_METHOD being set by method nand_apply_config. This flag controls the bus being used for the NFCs internal RAM access. It must be set for the DMA use case only. See A33_Nand_Flash_Controller_Specification.pdf page 12. This fix is tested by myself on a Cubietruck A20 board. Others should test it on new generation SOCs as well. Signed-off-by: Markus Hoffrogge <mhoffrogge@gmail.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-07-13nand: raw: add support for MediaTek MT7621 SoCWeijie Gao5-2/+1488
This patch adds NAND flash controller driver for MediaTek MT7621 SoC. The NAND flash controller of MT7621 supports only SLC NAND flashes. It supports 4~12 bits correction with maximum 4KB page size. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2022-07-11Merge branch 'next'Tom Rini6-22/+41
2022-07-08mtd: rawnand: Add support to dedicated function to set timingsKory Maincent1-11/+19
With the current code if the board has an ONFI compliant NAND without support to the get and set features, U-boot returns an ENOTSUP error when trying to tune the timings which prevents the probe of the device. Indeed onfi_set_features() return ENOTSUP error if set/get features is not supported. In the case of timings we should not return ENOTSUP because we can use the default timings. The NAND is already capable of listening at its highest supported rate, so we assume in this case that it is fine to skip the operation. Fix it by adding an intermediate nand_onfi_set_timings() function which does not error out if set/get feature is not supported. Signed-off-by: Kory Maincent <kory.maincent@bootlin.com> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
2022-07-07spl: Ensure all SPL symbols in Kconfig have some SPL dependencyTom Rini1-2/+4
Tighten up symbol dependencies in a number of places. Ensure that a SPL specific option has at least a direct dependency on SPL. In places where it's clear that we depend on something more specific, use that dependency instead. This means in a very small number of places we can drop redundant dependencies. Reported-by: Pali Rohár <pali@kernel.org> Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-03mtd: rawnand: fsl_elbc: Fix detection when nand_scan_ident() has not ↵Pali Rohár1-1/+5
selected ecc.mode ecc.mode is set to 0 (aliased to NAND_ECC_NONE) either when function nand_scan_ident() has not selected ecc.mode or when it selected it to none ecc mode. Distinguish between these two states by checking of node property "nand-ecc-mode" which function nand_scan_ident() uses for filling ecc.mode. This change fixes usage of none ecc mode if it is specified in DTS file. Fixes: c9ea9019c5aa ("mtd: rawnand: fsl_elbc: Use ECC configuration from device tree") Signed-off-by: Pali Rohár <pali@kernel.org>
2022-06-29mtd: mxs_nand_spl: fix nand_command protocol violationAndrea Scian1-1/+13
mxs_nand_command() implementation assume that it's working with a LP NAND, which is a common case nowadays and thus uses two bytes for column address. However this is wrong for NAND_CMD_READID and NAND_CMD_PARAM, which expects only one byte of column address, even for LP NANDs. This leads to ONFI detection problem with some NAND manufacturer (like Winbond) but not with others (like Samsung and Spansion) We fix this with a simple workaround to avoid the 2nd byte column address for those two commands. Also align the code with nand_base to support 16 bit devices. Tested on an iMX6SX device with: * Winbond W29N04GVSIAA * Spansion S34ML04G100TF100 * Samsung K9F4G08U00 Tested on imx8mn device with: * Windbond W29N04GV Signed-off-by: Andrea Scian <andrea.scian@dave.eu> CC: Stefano Babic <sbabic@denx.de> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-06-20Merge tag 'u-boot-stm32-20220620' of ↵Tom Rini1-2/+2
https://source.denx.de/u-boot/custodians/u-boot-stm into next - Add STM32MP13 SoCs support with associated board STM32M135F-DK - Correct livetree support in stm32mp1 boards - Activate livetree for stm32mp15 DHSOM boards
2022-06-20mtd: rawnand: fsl_elbc: Fix DM support in DTS code pathPali Rohár1-4/+5
For proper DM support it is required to fill also mtd->dev member. Otherwise DM would not see nand device at all. Signed-off-by: Pali Rohár <pali@kernel.org>
2022-06-17stm32mp1: fix reference for STMicroelectronicsPatrick Delaunay1-2/+2
Replace reference to the correct name STMicroelectronics Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-06-06Convert CONFIG_TPL_NAND_INIT to KconfigTom Rini3-2/+6
This converts the following to Kconfig: CONFIG_TPL_NAND_INIT Signed-off-by: Tom Rini <trini@konsulko.com>
2022-05-20mtd: nand: mxs_nand_spl: Fix bad block skippingMichael Trimarchi1-41/+49
The specific implementation was having bug. Those bugs are since the beginning of the implementation. Some manufactures can already experience this bug in their SPL code. This bug can be more visible on architecture that has complicated boot process like imx8mn. Older version of uboot can be affected if the bad block appear in correspoding of the beginning of u-boot image. In order to adjust the function we scan from the first erase block. The problematic part of old code was in this part: while (is_badblock(mtd, offs, 1)) { page = page + nand_page_per_block; /* Check i we've reached the end of flash. */ if (page >= mtd->size >> chip->page_shift) { free(page_buf); return -ENOMEM; } } Even we fix it adding increment of the offset of one erase block size , we don't fix the problem, because the first erase block where the image start is not checked. The code was tested on an imx8mn where the boot rom api was not able to skip it. This code is used by other architecures like imx6 and imx8mm Cc: Han Xu <han.xu@nxp.com> Cc: Fabio Estevam <festevam@gmail.com> Acked-by: Han Xu <han.xu@nxp.com> Tested-By: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
2022-05-20nand: raw: mxs_nand: Fix specific hook registrationMichael Trimarchi1-16/+16
Move the hook after nand_scan_tail is called. The hook must be replaced to the mxs specific one but those must to be assignment later in the probe function. With this fix markbad is working again. Before this change: nand markbad 0xDEC00 NXS NAND: Writing OOB isn't supported NXS NAND: Writing OOB isn't supported block 0x000dec00 NOT marked as bad! ERROR 0 Cc: Han Xu <han.xu@nxp.com> Cc: Fabio Estevam <festevam@gmail.com> Acked-by: Han Xu <han.xu@nxp.com> Tested-By: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
2022-05-19mtd: rawnand: mxs_nand: Fix use_minimum_ecc for spl driverYe Li1-0/+3
Because mxs_nand_spl driver does not support DM, to use the minimum ECC layout, it needs to handle the CONFIG_NAND_MXS_USE_MINIMUM_ECC. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Han Xu <han.xu@nxp.com>
2022-05-03pci: Add mask parameter to dm_pci_map_bar()Andrew Scull2-3/+5
Add a mask parameter to control the lookup of the PCI region from which the mapping can be made. Signed-off-by: Andrew Scull <ascull@google.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2022-05-03pci: Map bars with offset and lengthAndrew Scull2-3/+3
Evolve dm_pci_map_bar() to include an offset and length parameter. These allow a portion of the memory to be mapped and range checks to be applied. Passing both the offset and length as zero results in the previous behaviour and this is used to migrate the previous callers. Signed-off-by: Andrew Scull <ascull@google.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2022-04-26mtd: nand: raw: Add support for DT property nand-ecc-algo=bchPali Rohár1-0/+6
According to Linux kernel DT schema nand-controller.yaml, using DT property nand-ecc-algo=bch is the correct way for specifying BCH as ECC algorithm. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26mtd: rawnand: fsl_elbc: Use ECC configuration from device treePali Rohár1-23/+26
Initialize ECC configuration after nand_scan_ident() call and only in case nand_scan_ident() have not done it. nand_scan_ident() fills ECC configuration from device tree. Fixes usage of NAND_ECC_SOFT_BCH when it is specified in device tree. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26mtd: rawnand: fsl_elbc: Add device tree supportPali Rohár2-2/+44
This allows boards to specify NAND settings via standard DT properties. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26mtd: rawnand: fsl_elbc: Implement RNDOUT commandPali Rohár1-0/+8
This is needed for SW ECC. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-13Merge tag 'u-boot-imx-20220413' of ↵Tom Rini1-5/+0
https://gitlab.denx.de/u-boot/custodians/u-boot-imx u-boot-imx-20220413 i.MX patches for 2022.07 CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/11710
2022-04-12mtd: nand: mxs_nand_spl: Remove the page aligned accessYe Li1-5/+0
The mxs_nand_spl driver can support to read from page unaligned offset, so don't need to set bl_len to ask spl_load_simple_fit to handle the page unaligned access. Actually spl_load_simple_fit has two parts of reading: spl_simple_fit_read and spl_load_fit_image. The spl_load_fit_image can handle the page unaligned offset, but the spl_simple_fit_read can't do it. spl_simple_fit_read requires the FIT location at page aligned offset. Hence, remove the nand_get_mtd overwrite function from mxs_nand_spl to use page unaligned read by driver. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Tim Harvey <tharvey@gateworks.com> #gw_ventana
generated by cgit v1.1 at 2024-07-14 20:08:56 +0000