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2017-06-01dm: Rename dev_addr..() functionsSimon Glass17-18/+19
These support the flat device tree. We want to use the dev_read_..() prefix for functions that support both flat tree and live tree. So rename the existing functions to avoid confusion. In the end we will have: 1. dev_read_addr...() - works on devices, supports flat/live tree 2. devfdt_get_addr...() - current functions, flat tree only 3. of_get_address() etc. - new functions, live tree only All drivers will be written to use 1. That function will in turn call either 2 or 3 depending on whether the flat or live tree is in use. Note this involves changing some dead code - the imx_lpi2c.c file. Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-01dm: Use dm.h header when driver mode is usedSimon Glass5-5/+5
This header includes things that are needed to make driver build. Adjust existing users to include that always, even if other dm/ includes are present Signed-off-by: Simon Glass <sjg@chromium.org>
2017-05-29mmc: meson: increase max block number per requestHeiner Kallweit1-1/+1
Number of blocks is a 9 bit field where 0 stands for a unlimited number of blocks. Therefore the max number of blocks which can be set is 511. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
2017-05-17x86: Convert MMC to driver modelSimon Glass1-26/+60
Convert the pci_mmc driver over to driver model and migrate all x86 boards that use it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
2017-05-16mmc: atmel_sdhci: Enable the quirk SDHCI_QUIRK_WAIT_SEND_CMDWenyou Yang1-2/+2
To fix the timeout of sending the write command, enable the quirk SDHCI_QUIRK_WAIT_SEND_CMD. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-15mmc: descend into drivers/mmc only when CONFIG_MMC is enabledMasahiro Yamada1-16/+12
This simplifies makefiles. Also, arrange the order of objects in drivers/mmc/Makefile so that the framework objects are listed before drivers. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-05-15mmc: replace CONFIG_GENERIC_MMC with CONFIG_MMCMasahiro Yamada3-10/+6
Now CONFIG_GENERIC_MMC and CONFIG_MMC match for all defconfig. We do not need two options for the same feature. Deprecate the former. This commit was generated with the sed script 's/GENERIC_MMC/MMC/' and manual fixup of drivers/mmc/Kconfig. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-05-15mmc: sdhci-cadence: import updates from Linux 4.12Masahiro Yamada1-10/+57
This driver is a counterpart of drivers/mmc/host/sdhci-cadence.c from Linux. Some updates for v4.12-rc1 can be imported to U-Boot. - Fix value of SDHCI_CDNS_HRS04_RDATA_SHIFT - Add polling for ACK bit to be sure that data are written to the PHY register - Retrieve PHY values from DT properties instead of fixed data The following is the list of upstream commits: - Linux commit 4e03f628b464e0580abadf5161eaa38c61d20943 mmc: sdhci-cadence: fix bit shift of read data from PHY port - Linux commit a0f8243229ed071c8da0ea7cedc1b7bf1b1515da mmc: sdhci-cadence: Fix writing PHY delay - Linux commit a89c472d8b55c5afc4c79e6e3d1338730034eb01 mmc: sdhci-cadence: Update PHY delay configuration Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-05-15mmc: sdhci: Fix maximum clock for programmable clock modeWenyou Yang1-7/+11
In the programmable clock mode, the SDCLK frequency is incorrectly assigned when the maximum clock has been assigned during probe, this causes the SDHCI not work well. In the programmable clock mode, when calculating the SDCLK Frequency Select, when the maximum clock has been assigned, it is the actual value, should not be multiplied by host->clk_mul. Otherwise, the maximum clock is multiplied host->clk_mul by the base clock achieved from the BASECLKF field of the Capabilities 0 Register. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
2017-05-15drivers: omap_hsmmc: move to DM_MMC_OPSJean-Jacques Hiblot2-7/+33
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-11dm: mmc: omap_hsmmc: Add pre-reloc flag to the driverLokesh Vutla1-0/+1
For platforms that don't use device tree in SPL the only way to mark this driver as 'required by relocation' is with the DM_FLAG_PRE_RELOC flag. Add this to ensure that the driver is bound. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2017-05-11dm: mmc: omap_hsmmc: Update to support of-platdataLokesh Vutla1-10/+14
This is to aid platforms that uses OF_PLATDATA. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2017-05-10rockchip: mmc: handle deprecation of 'clock-freq-min-max'Philipp Tomsich1-2/+18
The 'clock-freq-min-max' property was deprecated in the upstream (i.e. Linux) DTS bindings in favor of the 'max-frequency' property. With the latest RK3399 DTSI does no longer include the deprecated property and the rockchip_dw_mmc driver requiring it to be present, the driver doesn't bind to the node in the RK3399 DTSI any longer (thus breaking access to the SD card on the RK3399-Q7 board). To fix this, we implement a similar logic as in the Linux driver: if the deprecated property is present, we issue a warning (if DEBUG is enabled); if it is missing, we require 'max-frequency' to be set and use it to create a min/max value-pair. See https://github.com/torvalds/linux/commit/b023030f10573de738bbe8df63d43acab64c9f7b for the deprecation/matching change in Linux. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-05-10mmc: dw_mmc: rockchip: select proper card clockXu Ziyuan1-2/+2
As you know, biu_clk is used for AMBA AHB/APB interface, ciu_clk is used for communication between host and card devices. The real bus clock is ciu, so let's rectify it. Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2017-05-09omap_hsmmc: update struct hsmmc to accommodate omap3 from DTAdam Ford1-4/+31
This patch changes the way DM_MMC calculates offset to the base register of MMC. Previously this was through an #ifdef but that wasn't necessary for OMAP3. This patch will now add in the offset to the base address based on the .compatible flags. Signed-off-by: Adam Ford <aford173@gmail.com> V2: Remove ifdef completely and reference offset from the omap_hsmmc_ids table. V1: Change ifdef to ignore OMAP3 Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-09dm: mmc: rpi: Convert Raspberry Pi to driver model for MMCSimon Glass1-16/+65
Convert the bcm2835 SDHCI driver over to support CONFIG_DM_MMC and move all boards over. There is no need to keep the old code since there are no other users. Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Simon Glass <sjg@chromium.org>
2017-04-18drivers: remove Blackfin specific driversMasahiro Yamada2-307/+0
These drivers have no user since commit ea3310e8aafa ("Blackfin: Remove"). Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
2017-04-14mmc: sdhci: Wait for SDHCI_INT_DATA_END when transferring.Alex Deymo1-4/+11
sdhci_transfer_data() function transfers the blocks passed up to the number of blocks defined in mmc_data, but returns immediately once all the blocks are transferred, even if the loop exit condition is not met (bit SDHCI_INT_DATA_END set in the STATUS word). When doing multiple writes to mmc, returning right after the last block is transferred can cause the write to fail when sending the MMC_CMD_STOP_TRANSMISSION command right after the MMC_CMD_WRITE_MULTIPLE_BLOCK command, leaving the mmc driver in an unconsistent state until reboot. This error was observed in the rpi3 board. This patch waits for the SDHCI_INT_DATA_END bit to be set even after sending all the blocks. Test: Reliably wrote 2GiB of data to mmc in a rpi3. Signed-off-by: Alex Deymo <deymo@google.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-04-14mmc: bcm2835_sdhci: Speed up mmc writes.Jocelyn Bohr1-2/+6
The linux kernel driver for this module does not use a delay when writing to the SDHCI_BUFFER register. This patch mimics that behavior in order to speed up the mmc writes on the Raspberry Pi. Signed-off-by: Alex Deymo <deymo@google.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-04-14mmc: gen_atmel_mci: add driver model support for mciWenyou Yang2-1/+166
Add the driver model support for Atmel mci while retaining the existing legacy code. This allows the driver to support boards that have converted to driver model as well as those that have not. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-04-14mmc: meson: add MMC driver for Meson GX (S905)Carlo Caione3-0/+298
This driver implements MMC support on Meson GX (S905) based systems. It's based on Carlo Caione's work, changes: - BLK support added - general refactoring Signed-off-by: Carlo Caione <carlo@caione.org> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Tested-by: Vagrant Cascadian <vagrant@debian.org>
2017-04-04dm: core: Add flags parameter to device_remove()Stefan Roese1-1/+1
This patch adds the flags parameter to device_remove() and changes all calls to this function to provide the default value of DM_REMOVE_NORMAL for "normal" device removal. This is in preparation for the driver specific pre-OS (e.g. DMA cancelling) remove support. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org>
2017-04-04Merge git://git.denx.de/u-boot-tegraTom Rini2-0/+27
2017-04-01mmc: tegra: allow disabling external clock loopbackMarcel Ziswiler2-0/+27
Introduce CONFIG_TEGRA124_MMC_DISABLE_EXT_LOOPBACK to disable the external clock loopback and use the internal one on SDMMC3 as per the SDMMC_VENDOR_MISC_CNTRL_0 register's SDMMC_SPARE1 bits being set to 0xfffd according to the TRM. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2017-03-30mmc: omap_hsmmc: add support for CONFIG_BLKJean-Jacques Hiblot1-0/+17
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2017-03-30mmc: omap_hsmmc: move the mmc_config to platdata when DM_MMC is usedJean-Jacques Hiblot1-5/+22
This is a preparation work for the support of CONFIG_BLK. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2017-03-30mmc: omap_hsmmc: use mmc_get_blk_desc() to get the block device descJean-Jacques Hiblot1-1/+1
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2017-03-30mmc: omap_hsmmc: use an accessor to get the private dataJean-Jacques Hiblot1-21/+33
For consistency, use an accessor to access the private data. Also for the same reason, rename all priv_data to priv. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2017-03-21mmc: xenon_sdhci: Add missing host->max_clk to Xenon SDHCI driverStefan Roese1-1/+2
The Xenon SDHCI driver just missed the integration of this patch: git ID 6d0e34bf mmc: sdhci: Distinguish between base clock and maximum peripheral frequency With this patch applied, the SDHCI subsystem complains now with this warning while probing: sdhci_setup_cfg: Hardware doesn't specify base clock frequency This patch fixes this issue, by providing the missing host->max_clk variable to the SDHCI subsystem. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Hu Ziji <huziji@marvell.com> Cc: Victor Gu <xigu@marvell.com> Cc: Konstantin Porotchkin <kostap@marvell.com> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> Cc: Jaehoon Chung <jh80.chung@samsung.com>
2017-03-21mmc: drop unnecessary send_status requestXu Ziyuan1-4/+0
It's redundant to send cmd13 after cmd9 whose response is not R1b. The card devices will not be busy w/ cmd9. Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
2017-03-21mmc: sdhci: only flush cache for data commandKevin Liu1-2/+4
No need to flush cache for command without data. Signed-off-by: Kevin Liu <kevinliu@asrmicro.com>
2017-03-21mmc: tangier: Add Intel Tangier eMMC/SDHCI driverFelipe Balbi3-0/+96
This patch adds Intel Tangier eMMC/SDHCI driver. Intel Tangier SoC contains a hybrid of PCI and non-PCI devices. SDHCI controller is one of the devices which are *not* on a PCI and, hence, cannot be enumerated by standard PCI means. This driver, allows for SDHCI controller on Tangier SoC to work in U-Boot. Signed-off-by: Vincent Tinelli <vincent.tinelli@intel.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-03-21mmc: pci: Add CONFIG_MMC_PCIFelipe Balbi2-1/+9
We don't want pci_mmc to compile every time x86 compiles, only when there's a platform that needs it. For that reason, we're adding a new CONFIG_MMC_PCI which platforms can choose to enable. Suggested-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2017-03-19Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini1-0/+8
Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: configs/bk4r1_defconfig configs/colibri_vf_defconfig configs/pcm052_defconfig include/configs/colibri_vf.h include/configs/pcm052.h
2017-03-17Merge git://git.denx.de/u-boot-rockchipTom Rini1-1/+16
This includes support for rk3188 from Heiko Stübner and and rk3328 from Kever Yang. Also included is SPL support for rk3399 and a fix for rk3288 to get it booting again (spl_early_init()).
2017-03-17mmc: fsl_esdhc: support i.MX7ULPPeng Fan1-0/+8
Add compatible property for i.MX7ULP. Add a weak init_usdhc_clk function, i.MX7ULP use this to init the clock. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by : Stefano Babic <sbabic@denx.de>
2017-03-16rockchip: sdhci: rk3399: update driver to support of-platdataKever Yang1-1/+16
Change some API in order to enable of-platdata. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Added rockchip tag: Signed-off-by: Simon Glass <sjg@chromium.org>
2017-03-16Merge tag 'xilinx-for-v2017.05' of git://www.denx.de/git/u-boot-microblazeTom Rini1-2/+31
Xilinx changes for v2017.05 - Move to DM clk driver - Add clk support for zynq_sdhci
2017-03-14STiH410-B2260: Add device treePatrice Chotard1-1/+1
This device tree has been extracted from v4.9 kernel Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-03-14STiH410: Add STi SDHCI driverPatrice Chotard3-0/+149
Add SDHCI host controller found on STMicroelectronics SoCs On some ST SoCs, i.e. STiH407/STiH410, the MMC devices can live inside a dedicated flashSS sub-system that provides an extend subset of registers that can be used to configure the Arasan MMC/SD Host Controller. This means, that the SDHCI Arasan Controller can be configured to be eMMC4.5 or 4.3 spec compliant. W/o these settings the SDHCI will configure and use the MMC/SD controller with limited features e.g. PIO mode, no DMA, no HS etc. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2017-02-17mmc: zynq: Add fdt max-frequency supportStefan Herbrechtsmeier1-1/+8
The maximum supported peripheral clock frequency of the zynq depends on the IO routing. The MIO and EMIO support a maximum frequency of 50 MHz respectively 25 MHz. Use the max-frequency value of the device tree to determine the maximal supported peripheral clock frequency. Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> Acked-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-02-17mmc: zynq: Determine base clock frequency via clock frameworkStefan Herbrechtsmeier1-2/+24
The zynq_sdhci controller driver use CONFIG_ZYNQ_SDHCI_MAX_FREQ as base clock frequency but this clock is not fixed and depends on the hardware configuration. Additionally the value of CONFIG_ZYNQ_SDHCI_MAX_FREQ doesn't match the real base clock frequency of SDIO_FREQ. Use the clock framework to determine the frequency at run time. Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-02-09omap_hsmmc.c: Fix build warning on non-omap3Tom Rini1-1/+3
It was incorrect to always include "asm/arch-omap3/mux.h" constantly. This introduced warnings on non-omap3 where certain values will conflict between the various families. Conditionally guard the inclusion in order to correct the problem. Fixes: 6aca17c9b7e8 ("drivers: mmc: omap_hsmmc: Fix IO Buffer on OMAP36xx") Signed-off-by: Tom Rini <trini@konsulko.com>
2017-02-09mmc: init mmc block devices on probeFiach Antaw1-0/+12
MMC devices accessed exclusively via the driver model were not being initialized before being exposed as block devices, causing issues in scenarios where the MMC device is first accessed via the uclass block interface. Signed-off-by: Fiach Antaw <fiach.antaw@uqconnect.edu.au>
2017-02-09drivers: mmc: omap_hsmmc: Fix IO Buffer on OMAP36xxAdam Ford2-0/+30
On the OMAP36xx/37xx the CONTROL_WKUP_CTRL register has a field (bit 6) named GPIO_IO_PWRDNZ. If 0, the IO buffers which are related to GPIO_126, 127 and 129 are disabled. Some boards may need this for MMC. After the PBIAS is configured, this bit should be set high to enable these GPIO pins. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2017-02-09mmc: ftsdc021_sdhci: remove the ftsdc021_sdhci.cJaehoon Chung2-35/+0
ftsdc021_sdhci.c is dead file. There is no reason to maintain this host controller. Removes the entire ftsdc021_sdhci.c. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2017-02-09mmc: mmc-uclass: use the fixed devnum with alias nodeJaehoon Chung1-3/+10
If there are alias nodes as "mmc", use the devnum as alias index number. This patch is for fixing a problem of Exynos4 series. Problem is the below thing. Current legacy mode: EXYNOS DWMMC: 0, SAMSUNG SDHCI: 1 After using DM: SAMSUNG SDHCI: 0, EXYNOS DWMMC: 1 Dev index is swapped. Then u-boot can't find the kernel image..because it is already set to 0 as mmcdev. If change from legacy to DM, also needs to touch all exynos4 config file. For using simply, just supporting the fixed devnum with alias node is better than it. Usage: alaise { .... mmc0 = &sdhci2; /* eMMC */ mmc1 = &sdhci1; /* SD */ ... } Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-02-08dm: core: Replace of_offset with accessorSimon Glass13-35/+34
At present devices use a simple integer offset to record the device tree node associated with the device. In preparation for supporting a live device tree, which uses a node pointer instead, refactor existing code to access this field through an inline function. Signed-off-by: Simon Glass <sjg@chromium.org>
2017-01-31mmc: atmel: rename CONFIG_ATMEL_SDHCI to CONFIG_MMC_SDHCI_ATMELMasahiro Yamada2-12/+13
Make the naming scheme consistent; all SDHCI-base drivers prefixed with CONFIG_MMC_SDHCI_. While we are here, add "depends on ARCH_AT91". Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-01-31mmc: pic32: rename CONFIG_PIC32_SDHCI to CONFIG_MMC_SDHCI_PIC32Masahiro Yamada2-8/+8
Make the naming scheme consistent; all SDHCI-base drivers prefixed with CONFIG_MMC_SDHCI_. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
generated by cgit v1.1 at 2024-08-18 02:48:17 +0000