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2021-07-29Merge tag 'ti-v2021.10-rc2' of ↵WIP/29Jul2021Tom Rini2-0/+4
https://source.denx.de/u-boot/custodians/u-boot-ti - Add MMC High speed modes for AM64 and J7200 - Add Sierra/Torrent SERDES driver - Minor clean-ups for R5F boot from SPL
2021-07-28Rename GPIO_SUPPORT to GPIOSimon Glass1-1/+1
Rename these options so that CONFIG_IS_ENABLED can be used with them. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-27mmc: sdhci_am654: Read ti, strobe-sel property from device treeAswath Govindraju1-0/+1
Read the strobe select value from the device tree property ti,strobe-sel, required for HS400 speed mode Fixes: a20008eabd95 ("mmc: am654_sdhci: Add Support for configuring PHY in J721e") Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Link: https://lore.kernel.org/r/20210525093826.10390-2-a-govindraju@ti.com
2021-07-27mmc: sdhci: Write to HOST_CONTROL2 register for HS400 speed modeFaiz Abbas1-0/+3
Enable HS400 speed mode by writing to HOST_CONTROL2 register. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Link: https://lore.kernel.org/r/20210405144428.12159-1-a-govindraju@ti.com
2021-07-26mmc: zynq_sdhci: Make variables/structure staticMichal Simek1-6/+10
All these variables/structure are local and should be static. Issues are reported by sparse: drivers/mmc/zynq_sdhci.c:49:11: warning: symbol 'zynqmp_iclk_phases' was not declared. Should it be static? drivers/mmc/zynq_sdhci.c:50:11: warning: symbol 'zynqmp_oclk_phases' was not declared. Should it be static? drivers/mmc/zynq_sdhci.c:53:11: warning: symbol 'versal_iclk_phases' was not declared. Should it be static? drivers/mmc/zynq_sdhci.c:54:11: warning: symbol 'versal_oclk_phases' was not declared. Should it be static? drivers/mmc/zynq_sdhci.c:546:24: warning: symbol 'arasan_ops' was not declared. Should it be static? Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-07-26mmc: zynq_sdhci: Fix kernel doc warningsMichal Simek1-12/+12
Fix these kernel doc warnings: drivers/mmc/zynq_sdhci.c:181: warning: contents before sections drivers/mmc/zynq_sdhci.c:236: warning: contents before sections drivers/mmc/zynq_sdhci.c:291: warning: contents before sections drivers/mmc/zynq_sdhci.c:297: warning: Function parameter or member 'degrees' not described in 'sdhci_versal_sdcardclk_set_phase' drivers/mmc/zynq_sdhci.c:354: warning: contents before sections drivers/mmc/zynq_sdhci.c:360: warning: Function parameter or member 'degrees' not described in 'sdhci_versal_sampleclk_set_phase' drivers/mmc/zynq_sdhci.c:467: warning: contents before sections Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-07-26mmc: zynq_sdhci: Split set_tapdelay function to in and outAshok Reddy Soma1-2/+8
Split arasan_zynqmp_set_tapdelay() to handle input and output tapdelays separately. This is required to handle zero values for ITAP and OTAP values. If we dont split, we will have to remove the if() in the function, which makes ITAP values to be overwritten when OTAP values are called to set and vice-versa. Restrict tap_delay value calculated to max allowed 8 bits for ITAP and 6 bits for OTAP for ZynqMP. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-07-26mmc: zynq_sdhci: Use Mask writes for Tap delaysAshok Reddy Soma1-27/+31
Restrict tap_delay value to the allowed size(8bits for itap and 6 bits for otap) before writing to the tap delay register. Clear ITAP and OTAP delay bits before updating with the new tap value for Versal platform. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-07-26mmc: zynq_sdhci: Allow configuring zero Tap valuesAshok Reddy Soma1-12/+4
Allow configuring ITAP and OTAP values with zero to avoid failures in some cases (one of them is SD boot mode). Legacy, SDR12 modes require to program the ITAP and OTAP values as zero, whereas for SDR50 and SDR104 modes ITAP value is zero. In SD boot mode firmware configures the SD ITAP and OTAP values and in this case u-boot has to re-configure required tap values(including zero) based on the operating mode. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-07-26mmc: zynq_sdhci: Resolve uninitialized return valueAshok Reddy Soma1-12/+8
set_phase() functions are not modifying the ret value and returning the same uninitialized ret, return 0 instead. Keep the return type as int to return errors when the tapdelay's are set via xilinx_pm_request() in future. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-07-21sandbox: mmc: Support fixed MMC devicesSimon Glass1-3/+21
Add support for reading devicetree flags for MMC devices. With this we can distinguish between fixed and removable drives. Note that this information is only available when the device is probed, not when it is bound, since it is read in the of_to_plat() method. This could be changed if needed later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-07-15mmc: mmc_get_op_cond: Allow quiet detection of eMMCPali Rohár1-3/+4
Add a new 'quiet' argument to mmc_get_op_cond() function which avoids printing error message when SD/eMMC card is not detected. Espressobin and mx6cuboxi boards use this function for detecting presence of eMMC and therefore it is expected and normal that eMMC does not have to be connected. So error message "Card did not respond to voltage select!" should be skipped in this case as it is not an error. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de> Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-07-10mmc: sunxi: Use mmc_of_parse()Andre Przywara1-15/+17
At the moment the Allwinner MMC driver parses the bus-width and non-removable DT properties itself, in the probe() routine. There is actually a generic function provided by the MMC framework doing this job, also it parses more generic properties like broken-cd and advanced transfer modes. Drop our own code and call mmc_of_parse() instead, to get all new features for free. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-07-10mmc: sunxi: Increase MMIO FIFO read performanceAndre Przywara1-8/+31
To avoid the complexity of DMA operations (with chained descriptors), we use repeated MMIO reads and writes to the SD_FIFO_REG, which allows us to drain or fill the MMC data buffer FIFO very easily. However those MMIO accesses are somewhat costly, so this limits our MMC performance, to between 17 and 22 MB/s, but down to 9.5 MB/s on the H6 (partly due to the lower AHB1 frequency). As it turns out we read the FIFO status register after *every* word we read or write, which effectively doubles the number of MMIO accesses, thus effectively more than halving our performance. To avoid this overhead, we can make use of the FIFO level bits, which are in the very same FIFO status registers. So for a read request, we now can collect as many words as the FIFO level originally indicated, and only then need to update the status register. We don't know for sure the size of the FIFO (and it seems to differ across SoCs anyway), so writing is more fragile, which is why we still use the old method for that. If we find a minimum FIFO size available on all SoCs, we could use that, in a later optimisation. This patch increases the eMMC read speed on a Pine64-LTS from about 22MB/s to 44 MB/s. SD card reads don't gain that much, but with 23 MB/s we now reach the practical limit for 3.3V SD cards. On the H6 we double our transfer speed, from 9.5 MB/s to 19.7 MB/s. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-07-10mmc: sunxi: Cleanup and fix self-calibration codeAndre Przywara1-8/+19
Newer SoCs have a self calibration feature, which avoids us writing hard coded phase delay values into the controller. Consolidate the code by avoiding unnecessary #ifdefs, and also enabling the feature for all those newer SoCs. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-07-10mmc: sunxi: Cleanup "new timing mode" selectionAndre Przywara1-9/+6
Among the SoCs using the "new timing mode", only the A83T needs to explicitly switch to that mode. By just defining the symbol for that one odd A83T bit to 0 for any other SoCs, we can always OR that in, and save the confusing nested #ifdefs. Clean up the also confusing new_mode setting on the way. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-07-10mmc: sunxi: Fix MMC clock parent selectionAndre Przywara1-3/+7
Most Allwinner SoCs which use the so called "new timing mode" in their MMC controllers actually use the double-rate PLL6/PERIPH0 clock as their parent input clock. This is interestingly enough compensated by a hidden "by 2" post-divider in the mod clock, so the divider and actual output rate stay the same. Even though for the H6 and H616 (but only for them!) we use the doubled input clock for the divider computation, we never accounted for the implicit post-divider, so the clock was only half the speed on those SoCs. This didn't really matter so far, as our slow MMIO routine limits the transfer speed anyway, but we will fix this soon. Clean up the code around that selection, to always use the normal PLL6 (PERIPH0(1x)) clock as an input. As the rate and divider are the same, that makes no difference. Explain the hardware differences in a comment. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-07-10mmc: sunxi: Fix warnings with CONFIG_PHYS_64BITAndre Przywara1-2/+2
When enabling PHYS_64BIT on 32-bit platforms, we get two warnings about pointer casts in sunxi_mmc.c. Those are related to MMIO addresses, which are always below 1GB on all Allwinner SoCs, so there is no problem with anything having more than 32 bits. Add the proper casts to make it compile cleanly. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-07-10mmc: sunxi: Avoid #ifdefs in delay and width setupAndre Przywara1-18/+15
The delay and bus-width setup are slightly different across the Allwinner SoC generations, and we covered this so far with some preprocessor conditionals. Use the more readable IS_ENABLE() instead. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-07-07Merge tag 'dm-pull-6jul21' of https://source.denx.de/u-boot/custodians/u-boot-dmWIP/07Jul2021Tom Rini1-0/+2
various minor sandbox improvements
2021-07-06Merge branch '2021-07-06-platform-updates'Tom Rini3-0/+92
- mpc8379erdb DM_USB, DM_PCI and DM_ETH support. - Drop PCI support from the integrator family of boards - Add synquacer support - Assorted lpc32xx updates and improvements - snapdragon (and related) fixes, Broadcom iproc update
2021-07-06mmc: synquacer: Add SynQuacer F_SDH30 SDHCI driverJassi Brar3-0/+92
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org> Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-07-06dm: define LOG_CATEGORY for all uclassPatrick Delaunay1-0/+2
Define LOG_CATEGORY for all uclass to allow filtering with log command. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-07-06mmc: openpiton: add piton_mmc driverTianrui Wei3-0/+171
This commit adds support to piton_mmc driver for OpenPiton-riscv64 This driver has many things set as preconfigured because the hardware automatically configures most of the settings during startup. Signed-off-by: Tianrui Wei <tianrui-wei@outlook.com> Signed-off-by: Jonathan Balkind <jbalkind@ucsb.edu> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-06-22Revert "mmc: fsl_esdhc_imx: use VENDORSPEC_FRC_SDCLK_ON to control card ↵Fabio Estevam1-21/+8
clock output" This reverts commit 63756575b42b8b4fb3f59cbbf0cedf03331bc2d2. Since this commit a imx6qdl-pico board boots extremely slowly in both SPL as well as U-Boot proper. Fix this regression by reverting the offending commit for now. Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Tested-by: Pierre-Jean Texier <texier.pj2@gmail.com>
2021-06-22mmc: mmc-uclass: change to static about dm functionJaehoon Chung1-12/+12
Change to static about dm function. They can be used with wrapper functions. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-06-22mmc: fsl_esdhc_imx: use mmc_send_cmd instead of dm_mmc_send_cmdJaehoon Chung2-2/+1
Use mmc_send_cmd instead of dm_mmc_send_cmd. It doesn't need to distinguish this function. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-06-22mmc: dwmmc: socfpga: Get "fifo-mode" property from DTLey Foon Tan1-0/+2
Add FIFO mode support for SoCFPGA dwmmc, read "fifo-mode" property from DT. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-06-22mmc: dw_mmc: Fixes data read when receiving DTO interrupt in FIFO modeLey Foon Tan1-3/+3
The data read is not working when using FIFO mode. From DesignWare databook, when a Data_Transfer_Over (DTO) interrupt is received, the software should read the remaining data from FIFO. Add DTO interrupt checking on data read path and clear interrupts before start reading from FIFO. So, it doesn't clear the next pending interrupts unintentionally after read from FIFO. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-06-22mmc: mtk-sd: increase the minimum bus frequencyWeijie Gao1-0/+5
With a 48MHz input clock, the lowest bus frequency can be as low as 48000000 / (4 * 4095) = 2930Hz. Such an extremely low frequency will cause the mmc framework take seconds to finish the initialization. Limiting the minimum bus frequency to a slightly higher value can solve the issue without any side effects. Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2021-06-17mmc: fsl_esdhc_imx: drop CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33Yangbo Lu1-6/+1
There is no i.MX board using such option. Drop it. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-06-17mmc: fsl_esdhc: convert to CONFIG_FSL_ESDHC_VS33_NOT_SUPPORTYangbo Lu2-3/+21
For eSDHC, power supply is through peripheral circuit. Some eSDHC versions have value 0 of the bit but that does not reflect the truth. 3.3V is common for SD/MMC, and is supported for all boards with eSDHC in current u-boot. So, make 3.3V is supported in default in code. CONFIG_FSL_ESDHC_VS33_NOT_SUPPORT can be enabled if future board does not support 3.3V. This is also a fix-up for one previous patch, which converted to use IS_ENABLED() for CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 that is not a Kconfig option. Fixes: 52faec31827e ("mmc: fsl_esdhc: replace most #ifdefs by IS_ENABLED()") Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-05-12Merge tag 'ti-v2021.07-rc3' of ↵WIP/12May2021Tom Rini1-0/+18
https://source.denx.de/u-boot/custodians/u-boot-ti - Initial support for AM64 EVM and SK - K3 DDR driver unification for J7 and AM64 platforms. - Minor fixes for TI clock driver
2021-05-12mmc: sdhci_am654: Add Support for TI's AM642 SoCDave Gerlach1-0/+18
Add support for the controller present on the AM642 SoC. There are instances: sdhci0: 8bit bus width, max 400 MBps sdhci1: 4bit bus width, max 100 MBps Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2021-05-11DM: DM_MMC migration is now mandatory for non-SPLWIP/finish-DM_MMC-migrationTom Rini1-0/+2
As it has been now two years past the migration deadline, it is required to have migrated. Remove the check from the Makefile and rework some of the Kconfig logic slightly to get the functional dependencies of DM_MMC / BLK right in both the SPL and non-SPL case. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-04-22mmc: octeontx_hsmmc: Add support for MIPS OcteonStefan Roese2-56/+149
Until now, the Octeontx MMC driver did only support the ARM Octeon TX/Tx2 platforms. This patch adds support for the MIPS Octeon platform to this driver. Here a short summary of the changes: - Enable driver compilation for MIPS Octeon, including the MMC related header file - Reorder header inclusion - Switch to using the clk framework to get the input clock - Remove some functions for MIPS Octeon, as some registers don't exist here Signed-off-by: Stefan Roese <sr@denx.de> Cc: Peng Fan <peng.fan@nxp.com> Cc: Aaron Williams <awilliams@marvell.com> Cc: Chandrakala Chavva <cchavva@marvell.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2021-04-10arm: Remove s32v234evb boardTom Rini1-1/+1
This board has not been converted to CONFIG_DM_MMC by the deadline. Remove it. Cc: Eddy Petrișor <eddy.petrisor@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2021-04-09Merge tag 'u-boot-imx-20210409' of ↵Tom Rini1-17/+33
https://gitlab.denx.de/u-boot/custodians/u-boot-imx u-boot-imx-20210409 ------------------- - Secure Boot : - HAB for MX8M / MX7ULP - CAAM fixes - Fixes for imxrt1020 - Fixes for USDHC driver - Fixes for Toradex (Colibri / Apalis) - Switch to DM for several boards - mx23 olinuxo - usbarmory - marsboard / riotboard - Gateworks GW Ventana - NXP upstream patches (LPDDR / CAAM / HAB) CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/7089
2021-04-08mmc: fsl_esdhc_imx: add extra delay for IO voltage switch if necessaryHaibo Chen1-0/+12
Some board like imx8mm-evkb, IO voltage switch from 3.3v to 1.8v need around 18ms, common code only delay 10ms, so need to delay extra 8ms. Otherwise voltage switch will timeout when wait for data0 line. This IO voltage switch time depends on board design, depend on the PMIC and capacitance. imx8mm-evkb board use PCA9450(PMIC) and 10uF capacitance. Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
2021-04-08mmc: fsl_esdhc_imx: remove redundant cmd11 related code.Haibo Chen1-9/+0
Common code already handle the voltage switch sequence based on spec, so remove the redundant voltage switch code. Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
2021-04-08mmc: fsl_esdhc_imx: use VENDORSPEC_FRC_SDCLK_ON to control card clock outputHaibo Chen1-8/+21
For FSL_USDHC, it do not implement VENDORSPEC_CKEN/PEREN/HCKEN/IPGEN, these are reserved bits. Instead, use VENDORSPEC_FRC_SDCLK_ON to gate on/off the card clock output. After commit b5874b552ffa ("mmc: fsl_esdhc_imx: add wait_dat0() support"), we meet SD3.0 card can't work at UHS mode, mmc_switch_voltage() fail because the second mmc_wait_dat0 return -ETIMEDOUT. According to SD spec, during voltage switch, need to gate off/on the card clock. If not set the FRC_SDCLK_ON, after CMD11, hardware will gate off the card clock automatically, so card do not detect the clock off/on behavior, so will draw the data0 line low until next command. Fixes: b5874b552ffa ("mmc: fsl_esdhc_imx: add wait_dat0() support") Tested-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
2021-04-08mmc: mvebu: convert to driver modelHarm Berntsen2-126/+190
This is a straightforward conversion of the old, non-dm driver. It was done in-place as the deadline for non-dm MMC has passed. Previous commits ensured that no board depends on the old, non-dm variant. Tested on a Kirkwood based board with eMMC. Signed-off-by: Harm Berntsen <harm.berntsen@nedap.com> Tested-by: Harm Berntsen <harm.berntsen@nedap.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Stefan Roese <sr@denx.de> CC: Pantelis Antoniou <panto@antoniou-consulting.com> CC: Stefan Roese <sr@denx.de> CC: Gerald Kerma <drEagle@doukki.net> CC: Simon Glass <sjg@chromium.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-04-06mmc: mmc-uclass: Use dev_seq() to read aliases node's indexAswath Govindraju1-7/+5
Use dev_seq() to read aliases node's index and pass it as device number for creating bulk device. Suggested-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-04-06mmc: Check for device with a seq number equal to num before checking against ↵Aswath Govindraju1-3/+5
index First check if there is an alias for the device tree node defined with the given num before checking against device index. Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-04-06mmc: fsl_esdhc: add pulse width detection workaroundMichael Walle2-1/+8
HS400 mode on the LS1028A SoC isn't reliable. The linux driver has a workaroung for the pulse width detection. Apply this workaround in u-boot, too. This will make HS400 mode work reliably on the LS1028A SoC. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-04-06mmc: fsl_esdhc: add workaround for erratum A-011334Michael Walle2-1/+27
LS1028A SoCs are restricted in what divider values are allowed for HS400 mode. This is basically a port from the corresponding linux driver. Signed-off-by: Michael Walle <michael@walle.cc>
2021-03-29Merge tag 'v2021.04-rc5' into nextWIP/29Mar2021-nextTom Rini1-1/+2
Prepare v2021.04-rc5
2021-03-27mmc: pci_mmc: Set up the card detectSimon Glass1-1/+5
The driver currently reads the card-detect but does not register it with the MMC stack. Update this so that card-detect works as expected. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-26dm: Rename device_get_by_driver_info_idx()Simon Glass1-2/+1
This function finds a device by its driver_info index. With of-platdata-inst we do not use driver_info, but instead instantiate udevice records at build-time. However the semantics of using the function are the same in each case: the caller provides an index and gets back a device. So rename the function to device_get_by_ofplat_idx(), so that it can be used for both situations. The caller does not really need to worry about the details. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-22mmc: pci: Fix Kconfig dependencyBin Meng1-0/+1
The PCI MMC driver depends on the generic MMC SDHCI driver, otherwise it does not compile. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
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