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2022-04-25bootstd: mmc: Add a bootdev driverSimon Glass3-0/+90
Add a bootdev driver for MMC. It mostly just calls the bootdev helper function. Add a function to obtain the block device for an MMC controller. Fix up the comment for mmc_get_blk_desc() while we are here. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-18rockchip: mmc: rockchip_dw_mmc: add rk3066/rk3188 supportJohan Jonker1-1/+2
The Rockchip SoCs rk3066/rk3188 have MMC DT nodes with as compatible string "rockchip,rk2928-dw-mshc". Add OF_PLATDATA support to the existing driver with help of a DM_DRIVER_ALIAS. This type needs a permanent enabled fifo. The other Rockchip SoCs always have the property "u-boot,spl-fifo-mode" in the MMC DT nodes, because MMC to SRAM can't do DMA. Make this property a requirement for MMC OF_PLATDATA structures. The property "fifo-mode" must be added for all other compile modes. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18rockchip: mmc: rockchip_dw_mmc: fix ciu clock indexJohan Jonker1-2/+2
The document rockchip-dw-mshc.yaml decribes a maximum of 4 clocks. In the rockchip_dw_mmc driver the clock name in use was "fixed" to "ciu" with index 1, but later reverted back to index 0. The clock drivers can handle both, but the calling driver should submit correct data as a standard practice. Fix the "ciu" clock index by setting it back to 1. clock-names: minItems: 2 items: - const: biu - const: ciu - const: ciu-drive - const: ciu-sample Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18mmc: rockchip_sdhci: Correct error checkingHaolin Li1-1/+1
A pointer can not be negative. Use macro IS_ERR_OR_NULL() for checking. Signed-off-by: Haolin Li <li.haolin@qq.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-04-12mmc: fsl_esdhc_imx: Add i.MX8MP compatible stringMarek Vasut1-0/+1
Add compatible string for i.MX8MP, which permits i.MX8MP to use HS400ES mode, just like all the other i.MX8M. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@denx.de> Cc: Haibo Chen <haibo.chen@nxp.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Fabio Estevam <festevam@denx.de> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2022-04-12iopoll: Extend read_poll_timeout macro to support variable parametersAriel D'Alessandro1-4/+5
This macro currently supports only one parameter. Based on Linux iopoll, let's extend read_poll_timeout common API to allow multiple variable parameters. Signed-off-by: Ariel D'Alessandro <ariel.dalessandro@collabora.com>
2022-04-09mmc: call device_probe() after scanningAKASHI Takahiro1-0/+12
Every time a mmc bus/port is scanned and a new device is detected, we want to call device_probe() as it will give us a chance to run additional post-processings for some purposes. In particular, support for creating partitions on a device will be added. Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-03-29mmc: zynq_sdhci: Fix SDx_BASECLK configurationAshok Reddy Soma1-0/+9
The DLL mode supported SD reference clocks are 50 MHz, 100 MHz and 200 MHz. When user select SD frequency as 200MHz in the design, the actual frequency is going to come around ~187MHz (<= 200MHz considering the parent clock and divisor selection). We need to set SDx_BASECLK as 200 in this case, setting 187 will result in tuning failures in mmc. Set SDx_BASECLK to exact value of 200, 100 or 50 based on the frequency range. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Link: https://lore.kernel.org/r/6c1e5eeeedd2864a0c85e6b409d182031d8c6c1a.1648210268.git.michal.simek@xilinx.com
2022-03-28Merge tag 'v2022.04-rc5' into nextTom Rini4-10/+157
Prepare v2022.04-rc5
2022-03-16Merge tag 'xilinx-for-v2022.07-rc1' of ↵WIP/16Mar2022-nextTom Rini1-6/+104
https://source.denx.de/u-boot/custodians/u-boot-microblaze into next Xilinx changes for v2022.07-rc1 microblaze: - Add support for reserved memory xilinx: - Update FRU code with MAC reading zynqmp: - Remove double AMS setting - DT updates (mostly for SOMs) - Add support for zcu106 rev 1.0 zynq: - Update nand binding nand: - Aligned zynq_nand to upstream DT binding net: - Add support for ethernet-phy-id mmc: - Workaround CD in zynq_sdhci driver also for ZynqMP - Add support for dynamic/run-time SD config for SOMs gpio: - Add driver for slg7xl45106 firmware: - Add support for dynamic SD config power-domain: - Update zynqmp driver with the latest firmware video: - Add skeleton driver for DP and DPDMA i2c: - Fix i2c to work with QEMU pinctrl: - Add driver for zynqmp pinctrl driver
2022-03-16rockchip: sdhci: Add HS400 Enhanced Strobe support for RK3568Alper Nebi Yasak1-6/+58
On RK3568, a register bit must be set to enable Enhanced Strobe. However, it appears that the address of this register may differ from vendor to vendor and should be read from the underlying MMC IP. Let the Rockchip SDHCI driver read this address and set the relevant bit when Enhanced Strobe configuration is requested. The IP uses a custom mode select value (0x7) for HS400, use that instead of the common but non-standard SDHCI_CTRL_HS400 value (0x5). Also add some necessary DLL_STRBIN and DLL_TXCLK configuration for HS400. Additionally, a bit signifying that the connected hardware is an eMMC chip must be set to enable Data Strobe for HS400 and HS400ES modes. Also make the driver set this bit as appropriate. This is partly ported from Linux's Synopsys DWC MSHC driver which happens to be the underlying IP. (drivers/mmc/host/sdhci-of-dwcmshc.c in Linux tree). Co-developed-by: Yifeng Zhao <yifeng.zhao@rock-chips.com> Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com> Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-03-16rockchip: sdhci: Add HS400 Enhanced Strobe support for RK3399Alper Nebi Yasak1-0/+53
On RK3399, a register bit must be set to enable Enhanced Strobe. Let the Rockchip SDHCI driver set it when Enhanced Strobe configuration is requested. However, having it set makes the lower-speed modes stop working and makes reinitialization fail, so let it be unset as needed in set_control_reg(). This is mostly ported from Linux's Arasan SDHCI driver which happens to be the underlying IP. (drivers/mmc/host/sdhci-of-arasan.c in Linux tree). Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-03-16mmc: sdhci: Add HS400 Enhanced Strobe supportAlper Nebi Yasak1-0/+18
Delegate setting the Enhanced Strobe configuration to individual drivers if they set a function for it. Return -ENOTSUPP if they do not, like what the MMC uclass does. Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-03-16mmc: xenon_sdhci: remove wait_dat0 SDHCI OPRobert Marko1-1/+6
Generic SDHCI driver received support for checking the busy status by polling the DAT[0] level instead of waiting for the worst MMC switch time. Unfortunately, it appears that this does not work for Xenon controllers despite being a part of the standard SDHCI registers and the Armada 3720 datasheet itself telling that BIT(20) is useful for detecting the DAT[0] busy signal. I have tried increasing the timeout value, but I have newer managed to catch DAT_LEVEL bits change from 0 at all. This issue appears to hit most if not all SoC-s supported by Xenon driver, at least A3720, A8040 and CN9130 have non working eMMC currently. So, until a better solution is found drop the wait_dat0 OP for Xenon. I was able to only test it on A3720, but it should work for others as well. Fixes: 40e6f52454fc ("drivers: mmc: Add wait_dat0 support for sdhci driver") Signed-off-by: Robert Marko <robert.marko@sartura.hr> Reviewed-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Stefan Roese <sr@denx.de>
2022-03-16mmc: fsl_esdhc_imx: use VENDORSPEC_FRC_SDCLK_ON when necessaryHaibo Chen1-3/+22
After commit f132aab40327 ("Revert "mmc: fsl_esdhc_imx: use VENDORSPEC_FRC_SDCLK_ON to control card clock output""), it involve issue in mmc_switch_voltage(), because of the special design of usdhc. For FSL_USDHC, it do not implement VENDORSPEC_CKEN/PEREN/HCKEN/IPGEN, these are reserved bits(Though RM contain the definition of these bits, but actually internal IC logic do not implement, already confirm with IC team). Instead, use VENDORSPEC_FRC_SDCLK_ON to gate on/off the card clock output. Here is the definition of this bit in RM: [8] FRC_SDCLK_ON Force CLK output active Do not set this bit to 1 unless it is necessary. Also, make sure that this bit is cleared when uSDHC’s clock is about to be changed (frequency change, clock source change, or delay chain tuning). 0b - CLK active or inactive is fully controlled by the hardware. 1b - Force CLK active In default, the FRC_SDCLK_ON is 0. This means, when there is no command or data transfer on bus, hardware will gate off the card clock. But in some case, we need the card clock keep on. Take IO voltage 1.8v switch as example, after IO voltage change to 1.8v, spec require gate off the card clock for 5ms, and gate on the clock back, once detect the card clock on, then the card will draw the dat0 to high immediately. If there is not clock gate off/on behavior, some card will keep the dat0 to low level. This is the reason we fail in mmc_switch_voltage(). To fix this issue, and concern that this is only the fsl usdhc hardware design limitation, set the bit FRC_SDCLK_ON in the beginning of the wait_dat0() and clear it in the end. To make sure the 1.8v IO voltage switch process align with SD specification. For standard tuning process, usdhc specification also require the card clock keep on, so also add these behavior in fsl_esdhc_execute_tuning(). Reviewed-by: Marek Vasut <marex@denx.de> Tested-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Haibo Chen <haibo.chen@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-03-14Merge tag 'v2022.04-rc4' into nextTom Rini1-10/+66
Prepare v2022.04-rc4
2022-03-14rockchip: sdhci: Fix RK3399 eMMC PHY power cyclingAlper Nebi Yasak1-10/+66
The Rockchip RK3399 eMMC PHY has to be power-cycled while changing its clock speed to some higher speeds. This is dependent on the desired SDHCI clock speed, and it looks like the PHY should be powered off while setting the SDHCI clock in these cases. Commit ac804143cfd1 ("mmc: rockchip_sdhci: add phy and clock config for rk3399") attempts to do this in the set_ios_post() hook by setting the SDHCI clock once more while the PHY is turned off/on as necessary, as the SDHCI framework does not provide a way to override how it sets its clock. However, the commit breaks reinitializing the eMMC on a few boards including chromebook_kevin and reportedly ROCKPro64. This patch reworks the power cycling to utilize the SDHCI framework slightly better (using the set_control_reg() hook to power off the PHY and set_ios_post() hook to power it back on) which happens to fix the issue, at least on a chromebook_kevin. Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-03-09mmc: zynq_sdhci: Add support for dynamic configurationAshok Reddy Soma1-2/+99
Add support for dynamic configuration which will takes care of configuring the SD secure space configuration registers using firmware APIs, performing SD reset assert and deassert. High level sequence: - Check for the PM dynamic configuration support, if no error proceed with SD dynamic configurations(next steps) otherwise skip the dynamic configuration. - Put the SD Controller in reset. - Configure SD Fixed configurations. - Configure the SD Slot Type. - Configure the BASE_CLOCK. - Configure the 8-bit support. - Bring the SD Controller out of reset. In the above steps, apart from the Fixed configurations, remaining all configurations are dynamic and they will be read from devicetree. And also remove hardcoded secure register writes, as dynamic sd config support is added. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/030a3ec041ff3efebd574b4d2b477ad85f12cbce.1645626962.git.michal.simek@xilinx.com
2022-03-07arm: mmc: Add "ti, am335-sdhci" compatible for TI's omap_hsmmc driverLukasz Majewski1-0/+1
In the Linux kernel (v5.16) for this SoC there are two separate drivers - namely sdhci-omap.c and omap_hsmmc.c which have separate set of compatibles. The U-Boot's drivers/mmc/omap_hsmmc.c driver supports both eMMC and SD devices - hence the compatible for SDHCI can be added. After this change the am335x DTS description can be easier ported from Linux kernel. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-03-07mmc: zynq_sdhci: Enable card detect workaround for ZynqMPAshok Reddy Soma1-1/+1
Card detect state stable issue is observed on few ZynqMP boards(SOM), so enable the workaround 'commit b6f44082d5cd ("mmc: zynq_sdhci: Wait till sd card detect state is stable")' for ZynqMP platforms also. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/0bf6154c79f24227d786efc5e2c1f506185b2bce.1645625609.git.michal.simek@xilinx.com
2022-03-07mmc: zynq_sdhci: Change granularity of timeout to 1usAshok Reddy Soma1-2/+2
The timeout used in 'commit b6f44082d5cd ("mmc: zynq_sdhci: Wait till sd card detect state is stable")' workaround is 1000ms at a granularity of 1msec. Change it to 1usec, to not waste time incase the cd is stable. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/f008d2bcf864702a01564789f14f9cdecb8acd45.1645625609.git.michal.simek@xilinx.com
2022-03-07mmc: zynq_sdhci: Fix timeout issueAshok Reddy Soma1-1/+2
In the workaround added with 'commit b6f44082d5cd ("mmc: zynq_sdhci: Wait till sd card detect state is stable")' the timeout variable has post decrement. Whenever timeout happens, this post decrement is making timeout=0xffffffff, so timeout error print and return statement are never reached. Fix it by decrementing it inside the while loop. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/61fc1160ada0dd622cd29e381a74af7bf3d9a200.1645625609.git.michal.simek@xilinx.com
2022-02-19mmc: fsl_esdhc_imx: correct the actual card clockHaibo Chen1-1/+2
The original code logic can not show the correct card clock, and also has one risk when the div is 0. Because there is div -=1 before. So move the operation before div -=1, and also involve ddr_pre_div to get the correct value. Signed-off-by: Haibo Chen <haibo.chen@nxp.com> Reviewed-by: Marek Vasut <marex@denx.de>
2022-02-19mmc: fsl_esdhc_imx: remove redundant ARCH_MXCHaibo Chen1-12/+3
Now original fsl_esdhc.c are split as fsl_esdhc.c and fsl_esdhc_imx.c. fsl_esdhc_imx.c only cover i.MX SoC. So ARCH_MXC is redundant. Signed-off-by: Haibo Chen <haibo.chen@nxp.com> Reviewed-by: Marek Vasut <marex@denx.de>
2022-02-19mmc: fsl_esdhc_imx: Use esdhc_soc_data flags to set host capsAdam Ford1-1/+22
The Linux driver automatically can detect and enable UHS, HS200, HS400 and HS400_ES automatically without extra flags being placed into the device tree. Right now, for U-Boot to use UHS, HS200 or HS400, the extra flags are needed in the device tree. Instead, go through the esdhc_soc_data flags and enable the host caps where applicable to automatically enable higher speeds. Suggested-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Adam Ford <aford173@gmail.com>
2022-02-09Merge https://gitlab.denx.de/u-boot/custodians/u-boot-mmcTom Rini1-3/+2
- Fix an issue with fsl_esdhc_imx - Consider GP partitions in "mmc hwpartition user enh start -"
2022-02-08mmc: fsl: Use brackets around if()Simon Glass1-1/+1
At present the IS_ENABLED() macro has extra brackets, making it possible to write: if IS_ENABLED(CONFIG_XXX) but it is a bit confusing. Add the missing brackets. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-02-09mmc: fsl_esdhc_imx: fix watermark level in dmaMarcel Ziswiler1-3/+2
Seems that we need the waterlevel setting not only for PIO mode as without this at least the i.MX 8M Mini won't boot anymore when being written by such a U-Boot. Corruption has also been observed both on the i.MX 6 as well as i.MX 8M Mini when using ums on the eMMC. Fix this by setting the watermark level again regardless of whether in DMA or PIO mode. Fixes: 41c6a22fc296 ("mmc: fsl_esdhc_imx: simplify esdhc_setup_data()") Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Tested-by: Fabio Estevam <festevam@gmail.com>
2022-01-30mmc: sunxi: Use DM_GPIO flags to set pull-upSamuel Holland1-6/+2
Now that the sunxi_gpio driver handles pull-up/down via the driver model, pin configuration does not need a platform-specific function. Signed-off-by: Samuel Holland <samuel@sholland.org> Tested-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-01-19doc: replace @return by Return:Heinrich Schuchardt5-27/+27
Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-01-18mmc: actions: add MMC driver for Actions OWL S700/S900Amit Singh Tomar3-0/+416
This commit adds support for MMC controllers found on Actions OWL SoC platform(S700/S900). Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
2022-01-12mmc: dwmmc: return a proper error code when busyJohn Keeping1-1/+1
When failing to send a command because the hardware is busy, return EBUSY to indicate the cause instead of just -1. Signed-off-by: John Keeping <john@metanate.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-01-12mmc: fsl_esdhc_imx: set sysctl register for clock initializationSean Anderson1-1/+1
[ fsl_esdhc commit 263ddfc3454ead3a988adef39b962479adce2b28 ] The initial clock setting should be through sysctl register only, while the mmc_set_clock() will call mmc_set_ios() introduce other configurations like bus width, mode, and so on. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-01-12mmc: fsl_esdhc_imx: Replace more #ifdefs by ifSean Anderson1-83/+69
This builds on the previous patch by converting yet more preprocessor macros to C ifs. This is split off so that the changes adapted from Micheal's patch may be clearly distinguished from the ones I have authored myself. MMC_SUPPORTS_TUNING should really get a Kconfig conversion. And DM_GPIO needs some -ENOSYS stubs when it isn't defined. Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-01-12mmc: fsl_esdhc_imx: replace most #ifdefs by IS_ENABLED()Sean Anderson1-106/+97
[ fsl_esdhc commit 52faec31827ec1a1837977e29c067424426634c5 ] Make the code cleaner and drop the old-style #ifdef constructs where it is possible. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-01-12mmc: fsl_esdhc_imx: simplify esdhc_setup_data()Sean Anderson1-33/+48
[ fsl_esdhc commit 7e48a028a42c111ba38a90b86e5f57dace980fa0 ] First, we need the waterlevel setting for PIO mode only. Secondy, both DMA setup code is identical for both directions, except for the data pointer. Thus, unify them. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Sean Anderson <sean.anderson@seco.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-01-12mmc: fsl_esdhc_imx: use dma-mapping APISean Anderson1-35/+15
[ fsl_esdhc commit b1ba1460a445bcc67972a617625d0349e4f22b31 ] Use the dma_{map,unmap}_single() calls. These will take care of the flushing and invalidation of caches. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Sean Anderson <sean.anderson@seco.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-01-12mmc: fsl_esdhc_imx: simplify 64bit check for SDMA transfersSean Anderson1-27/+6
[ fsl_esdhc commit da86e8cfcb03ed5c1d8e0718bc8bc8583e60ced8 ] SDMA can only do DMA with 32 bit addresses. This is true for all architectures (just doesn't apply to 32 bit ones). Simplify the code and remove unnecessary CONFIG_FSL_LAYERSCAPE. Also make the error message more concise. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Sean Anderson <sean.anderson@seco.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-01-12mmc: fsl_esdhc_imx: fix mmc->clock with actual clockSean Anderson1-0/+1
[ fsl_esdhc commit 30f6444d024a74ee48aa6969c1531aecd3c59deb ] Fix mmc->clock with actual clock which is divided by the controller, and record it with priv->clock. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Signed-off-by: Sean Anderson <sean.anderson@seco.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-01-12mmc: fsl_esdhc_imx: drop redundant code for non-removable featureSean Anderson1-21/+13
[ fsl_esdhc commit commit 08197cb8dff7cd097ab07a325093043c39d19bbd ] Drop redundant code for non-removable feature. "non-removable" property has been read in mmc_of_parse(). Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> [ set MMC_CAP_NONREMOVABLE in plat->cfg.host_caps ] Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-01-12mmc: fsl_esdhc_imx: clean up bus width configuration codeSean Anderson1-57/+26
[ fsl_esdhc commit 07bae1de382723b94244096953b05225572728cd ] This patch is to clean up bus width setting code. - For DM_MMC, remove getting "bus-width" from device tree. This has been done in mmc_of_parse(). - For non-DM_MMC, move bus width configuration from fsl_esdhc_init() to fsl_esdhc_initialize() which is non-DM_MMC specific. And fix up bus width configuration to support only 1-bit, 4-bit, or 8-bit. Keep using 8-bit if it's not set because many platforms use driver without providing max bus width. - Remove bus_width member from fsl_esdhc_priv structure. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> [ converted if statement to switch ] Signed-off-by: Sean Anderson <sean.anderson@seco.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-01-12mmc: fsl_esdhc_imx: fix voltage validationSean Anderson1-22/+13
[ fsl_esdhc commit 5b05fc0310cd933acf76ee661577c6b07a95e684 ] Voltage validation should be done by CMD8. Current comparison between mmc_cfg voltages and host voltage capabilities is meaningless. So drop current comparison and let voltage validation is through CMD8. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Signed-off-by: Sean Anderson <sean.anderson@seco.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-01-12mmc: fsl_esdhc_imx: remove redundant DM_MMC checkingSean Anderson1-2/+0
[ fsl_esdhc commit 2913926f3b3dec282f8773e3c02377c9600d8267 ] Remove redundant DM_MMC checking which is already in DM_MMC conditional compile block. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Signed-off-by: Sean Anderson <sean.anderson@seco.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-01-12mmc: fsl_esdhc_imx: make BLK as hard requirement of DM_MMCSean Anderson1-32/+1
U-boot prefers DM_MMC + BLK for MMC. Now eSDHC driver has already support it, so let's force to use it. - Drop non-BLK support for DM_MMC introduced by below patch. 66fa035 mmc: fsl_esdhc: fix probe issue without CONFIG_BLK enabled - Support only DM_MMC + BLK (assuming BLK is always enabled for DM_MMC). - Use DM_MMC instead of BLK for conditional compile. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Signed-off-by: Sean Anderson <sean.anderson@seco.com> Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-11-30mmc: stm32_sdmmc2: Add support for probing bus voltage level translatorMarek Vasut1-1/+62
Add support for testing whether bus voltage level translator is present and operational. This is useful on systems where the bus voltage level translator is optional, as the translator can be auto-detected by the driver and the feedback clock functionality can be disabled if it is not present. The translator test sets CMD high to avoid interfering with a card, and then verifies whether signal set on CK is detected on CKIN. If the signal is detected, translator is present, otherwise the CKIN feedback clock are disabled. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Yann Gautier <yann.gautier@foss.st.com>
2021-11-29Merge tag 'v2022.01-rc3' into nextTom Rini1-0/+6
Prepare v2022.01-rc3 Signed-off-by: Tom Rini <trini@konsulko.com>
2021-11-28mmc: Allow for children other than the block deviceSimon Glass1-2/+2
At present the MMC uclass assumes that the only child it can have is a block device. Update this so we can add a bootmethod too. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-11-28sandbox: mmc: Support a backing fileSimon Glass1-9/+51
Provide a way for sandbox MMC to present data from a backing file. This allows a filesystem to be created on the host and easily served via an emulated mmc device. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-11-17mmc: mtk-sd: implement waiting for DAT0 line stateJulien Masson1-0/+15
With the recent changes on mmc driver, we saw that the boot is ~5 secs longer compared to v2021.07 on mediatek platforms. This regression is seen during mmc_init and caused by the following patch [1]. Indeed since we did not support poll dat0, we fulfilled the condition of [1] and a delay of 500 ms was added for every __mmc_switch call. By adding the support of wait_dat0(), we now don't need to mdelay during mmc_init anymore. [1]: https://patchwork.ozlabs.org/project/uboot/patch/1629192034-64056-1-git-send-email-ye.li@nxp.com/ Signed-off-by: Julien Masson <jmasson@baylibre.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-11-16Merge tag 'xilinx-for-v2022.01-rc3' of ↵WIP/16Nov2021Tom Rini1-0/+6
https://source.denx.de/u-boot/custodians/u-boot-microblaze Xilinx changes for v2022.01-rc3 sdhci: - Fix emmc mini case with missing firmware interface zynqmp: - Restore JTAG interface if required - Allow overriding board name - Add support for DLC21 - Fix one fallthrought statement description - Use config macro instead of name duplication - Save multiboot to variable firmware: - Handle ipi_req errors better - Use local buffer in case user doesn't need it instead of NULL/0 location spi: - gqsi: Fix write issue at low frequencies net: - gem: Disable broadcasts
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