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2018-03-14Merge git://git.denx.de/u-boot-sunxiTom Rini1-2/+8
2018-03-13mmc: stm32: sdmmc2: add support for st, pin-ckinsdmmc_ckinPatrick Delaunay1-1/+6
This patch adds "st,pin-ckin" support to activate sdmmc_ckin feature. When using an external driver (a voltage switch transceiver), it's advised to select SDMMC_CKIN feedback clock input to sample the received data. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13mmc: stm32: sdmmc2: add hardware flow control supportPatrick Delaunay1-1/+2
The hardware flow control functionality is used to avoid FIFO underrun (TX mode) and overrun (RX mode) errors. The behavior is to stop SDMMC_CK during data transfer and freeze the SDMMC state machines. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13mmc: sunxi: support cd-invertedHeinrich Schuchardt1-2/+8
With CONFIG_DM_MMC the BananaPi does not detect SD cards. The sunxi device trees use the cd-inverted property to indicate that the card detect is inverted. This property is documented in Linux kernel devicetree/bindings/mmc/mmc.txt The property is not marked as deprecated. A similar patch was posted by Tuomas but is in status "Changes Requested". https://patchwork.ozlabs.org/patch/850377/ This patch is a stripped down version of his patch. Suggested-by: Tuomas Tynkkynen <tuomas@tuxera.com> Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-03-05Merge git://git.denx.de/u-boot-shTom Rini1-0/+1
2018-03-05libfdt: move headers to <linux/libfdt.h> and <linux/libfdt_env.h>Masahiro Yamada8-8/+8
Thomas reported U-Boot failed to build host tools if libfdt-devel package is installed because tools include libfdt headers from /usr/include/ instead of using internal ones. This commit moves the header code: include/libfdt.h -> include/linux/libfdt.h include/libfdt_env.h -> include/linux/libfdt_env.h and replaces include directives: #include <libfdt.h> -> #include <linux/libfdt.h> #include <libfdt_env.h> -> #include <linux/libfdt_env.h> Reported-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-03-05mmc: uniphier-sd: Add R8A77965 M3N entriesMarek Vasut1-0/+1
Add entries for the R8A77965 M3N SoC. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Jaehoon Chung <jh80.chung@samsung.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-03-01mmc: Added Kconfig support for CONFIG_ZYNQ_SDHCI_MIN_FREQVipul Kumar2-4/+7
This patch added Kconfig support for CONFIG_ZYNQ_SDHCI_MIN_FREQ and enabled it in respective defconfig. Signed-off-by: Vipul Kumar <vipulk@xilinx.com> Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-01mmc: Added Kconfig support for CONFIG_ZYNQ_SDHCI_MAX_FREQVipul Kumar1-0/+6
This patch added Kconfig support for CONFIG_ZYNQ_SDHCI_MAX_FREQ and enabled it in respective defconfig. Signed-off-by: Vipul Kumar <vipulk@xilinx.com> Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-02-25Merge git://git.denx.de/u-boot-mmcTom Rini3-26/+34
2018-02-26mmc: omap_hsmmc: use a default 52MHz max clock rate if none is specifiedJean-Jacques Hiblot1-0/+2
mmc_of_parse() doesn't set a default value if none is available in DT. In that case, use a default 52MHz clock rate. Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Tested-by: Adam Ford <aford173@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2018-02-26mmc: omap_hsmmc: make it possible to compile out ADMA supportJean-Jacques Hiblot2-6/+15
Some platforms don't have ADMA controllers. For those platforms, compiling it out reduces the size of the binary by about 600 bytes. Leaving the support in doesn't break things as the driver checks at runtime if the ADMA2 controller is present. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Tested-by: Adam Ford <aford173@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2018-02-26mmc: omap_hsmmc: compile out write support if not neededJean-Jacques Hiblot1-2/+9
This reduces the size of the binary by about 196 bytes. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Tested-by: Adam Ford <aford173@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2018-02-26mmc: omap_hsmmc: do not embed struct mmc in struct omap_hsmmc_platJean-Jacques Hiblot1-3/+3
The area for struct mmc can be allocated dynamically. It greatly reduces the size of struct omap_hsmmc_plat. This is useful in cases where the board level code declares one or two struct omap_hsmmc_plat because it doesn't use the Driver Model. This saves around 740 bytes for the am335x_evm SPL. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Tested-by: Adam Ford <aford173@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2018-02-23mmc: fix off-by-one bug in mmc_startup_v4()Alexander Kochetkov1-1/+1
MMC card with EXT_CSD_REV value 9 will trigger off-by-one bug while accessing mmc_versions array. The patch fix that. Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com>
2018-02-23mmc: Drop unnecessary case for mmc_probe()Faiz Abbas1-6/+1
Drop the unnecessary empty function case for mmc_probe(). Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2018-02-23mmc: uniphier-sd: Add compatible strings for RCar Gen2Marek Vasut1-0/+5
Add DT compatible strings for RCar Gen2 SoCs, so that this driver can bind with them. Unlike Gen3, which uses 64bit FIFO, the Gen2 uses 16bit FIFO. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-02-21mmc: synchronize the sequence with enum bus_mode in mmc.hJaehoon Chung1-8/+3
If some configs are disabled, number of freqs array will not assigned to correct value with bus_mode. Synchornize the ordering with enum bus_mode in mmc.h. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-02-19mmc: Fix uninitialised priv memberAlex Kiernan1-1/+1
When using omap_hsmmc without the device model then the allocation of mmc->priv ends up uninitialised. Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com> Tested-by: Robert Nelson <robertcnelson@gmail.com> Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
2018-02-19mmc: fix bug in mmc_startup_v4()Jean-Jacques Hiblot1-0/+1
The correspondence between mmc versions as used in u-boot and the version numbers reported in register EXT_CSD_REV is wrong for versions above and including MMC_VERSION_4_41. All those versions were shifted by one: real 4.5 hardware appeared to be MMC_VERSION_5_0. Fix this by adding the missing version in the correspondence table. Reported-by: eil Eilmsteiner Heribert <eil@keba.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
2018-02-19mmc: Fix bug in sd_set_card_speed()Jean-Jacques Hiblot1-1/+1
After settings the speed of the sd with the switch command, a check is done to make sure that the new speed has been set. The current check has a masking error: speed are encoded on 4 bits only. Fix it by masking the upper bits. This fixes a problem seen with QEmu emulating a vexpress-a15. Reported-by: Jonathan Gray <jsg@jsg.id.au> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Tested-by: Jonathan Gray <jsg@jsg.id.au>
2018-02-19mmc: omap_hsmmc: add signal voltage selection supportJean-Jacques Hiblot1-22/+154
I/O data lines of UHS SD card operates at 1.8V when in UHS speed mode (same is true for eMMC in DDR and HS200 modes). Add support to switch signal voltage to 1.8V in order to support UHS cards and eMMC HS200 and DDR modes. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19mmc: omap_hsmmc: allow mmc clock to be gatedKishon Vijay Abraham I1-0/+6
mmc core has defined a new parameter *clk_disable* to gate the clock. Disable the clock here if *clk_disable* is set. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19mmc: omap_hsmmc: implement send_init_stream callbackJean-Jacques Hiblot1-0/+13
This callback is used to send the 74 clock cycles after power up. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19mmc: omap_hsmmc: update mmc->clock with the actual bus speedJean-Jacques Hiblot1-1/+2
When the clock is applied, compute the actual value of the clock. It may be slightly different from the requested value (max freq, divisor threshold) Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19mmc: omap_hsmmc: allow the simple HS modes to use the default pinctrlJean-Jacques Hiblot1-10/+13
The default configuration is usually working fine for the the HS modes. Don't enforce the presence of a dedicated pinmux for the HS modes. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19mmc: omap_hsmmc: Add support to get pinctrl values and max frequency for ↵Kishon Vijay Abraham I1-14/+44
different hw revisions AM572x SR1.1 requires different IODelay values to be used than that used in AM572x SR2.0. These values are populated in device tree. Add capability in omap_hsmmc driver to extract IOdelay values for different silicon revision. The maximum frequency is also reduced when using a ES1.1. To keep the ability to boot both revsions with the same dtb, those values can be provided by the platform code. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19mmc: omap_hsmmc: Add support to set IODELAY valuesKishon Vijay Abraham I1-0/+372
The data manual of J6/J6 Eco recommends to set different IODELAY values depending on the mode in which the MMC/SD is enumerated in order to ensure IO timings are met. Add support to parse mux values and iodelay values from device tree and set these depending on the enumerated MMC mode. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19mmc: omap_hsmmc: use mmc_of_parse to populate mmc_configKishon Vijay Abraham I1-19/+5
Use the mmc_of_parse library function to populate mmc_config instead of repeating the same code in host controller driver. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19mmc: omap_hsmmc: Reduce the max timeout for reset controller fsmJean-Jacques Hiblot1-1/+2
>From OMAP3 SoCs (OMAP3, OMAP4, OMAP5, AM572x, AM571x), the DAT/CMD lines reset procedure section in TRM suggests to first poll the SRD/SRC bit until it is set to 0x1. But looks like that bit is never set to 1 and there is an observable delay of 1sec everytime the driver tries to reset DAT/CMD. (The same is observed in linux kernel). Reduce the time the driver waits for the controller to set the SRC/SRD bits to 1 so that there is no observable delay. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19mmc: omap_hsmmc: Workaround for errata id i802Jean-Jacques Hiblot1-6/+22
According to errata i802, DCRC error interrupts (MMCHS_STAT[21] DCRC=0x1) can occur during the tuning procedure. The DCRC interrupt, occurs when the last tuning block fails (the last ratio tested). The delay from CRC check until the interrupt is asserted is bigger than the delay until assertion of the tuning end flag. Assertion of tuning end flag is what masks the interrupts. Because of this race, an erroneous DCRC interrupt occurs. The suggested workaround is to disable DCRC interrupts during the tuning procedure which is implemented here. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19mmc: omap_hsmmc: Add tuning supportJean-Jacques Hiblot1-0/+122
HS200/SDR104 requires tuning command to be sent to the card. Use the mmc_send_tuning library function to send the tuning command and configure the internal DLL. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19mmc: omap_hsmmc: Enable DDR mode supportKishon Vijay Abraham I1-0/+5
In order to enable DDR mode, Dual Data Rate mode bit has to be set in MMCHS_CON register. Set it here. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19mmc: omap_hsmmc: set MMC mode in the UHSMS bit fieldJean-Jacques Hiblot1-0/+47
Use the timing parameter set in the MMC core to set the mode in UHSMS bit field. This is in preparation for adding HS200 support in omap hsmmc driver. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19mmc: omap_hsmmc: add support to set default io voltageKishon Vijay Abraham I1-0/+67
"ti,dual-volt" is used in linux kernel to set the voltage capabilities. For host controller dt nodes that doesn't have "ti,dual-volt", it's assumed 1.8v is the io voltage. This is not always true (like in the case of beagle-x15 where the io lines are connected to 3.3v). Hence if "no-1-8-v" property is set, io voltage will be set to 3v. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19mmc: omap_hsmmc: cleanup omap_hsmmc_set_iosKishon Vijay Abraham I1-9/+20
No functional change. Move bus width configuration setting to a separate function and invoke it only if there is a change in the bus width. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19mmc: omap_hsmmc: cleanup clock configurationJean-Jacques Hiblot1-24/+52
Add a separate function for starting the clock, stopping the clock and setting the clock. Starting the clock and stopping the clock can be used irrespective of setting the clock (For example during iodelay recalibration). Also set the clock only if there is a change in frequency. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19mmc: use pr_* log functionsMasahiro Yamada1-34/+34
Use pr_* log functions from Linux. They can be enabled/disabled via CONFIG_LOGLEVEL. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-02-08Move most CONFIG_HAVE_BLOCK_DEVICE to KconfigAdam Ford1-0/+1
config_fallbacks.h has some logic that sets HAVE_BLOCK_DEVICE based on a list of enabled options. Moving HAVE_BLOCK_DEVICE to Kconfig allows us to drastically shrink the logic in config_fallbacks.h Signed-off-by: Adam Ford <aford173@gmail.com> [trini: Rename HAVE_BLOCK_DEVICE to CONFIG_BLOCK_DEVICE] Signed-off-by: Tom Rini <trini@konsulko.com>
2018-02-08Convert CONFIG_APBH_DMA et al to KconfigAdam Ford1-0/+4
This converts the following to Kconfig: CONFIG_APBH_DMA CONFIG_APBH_DMA_BURST CONFIG_APBH_DMA_BURST8 Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Stefan Agner <stefan.agner@toradex.com> [trini: Add in MMC as well] Signed-off-by: Tom Rini <trini@konsulko.com>
2018-02-04mmc: fsl_esdhc: support SDR104 and HS200Peng Fan1-5/+358
Introduce SDR104 and HS200 support The implementation takes linux kernel sdhci.c and sdhci-esdhc-imx.c as reference. - Implement esdhc_change_pinstate to dynamically change pad settings - Implement esdhc_set_timing - Implement esdhc_set_voltage to switch voltage - Implement fsl_esdhc_execute_tuning to execute time process - Enlarge the cfg->f_max to 200MHz. - Parse fsl,tuning-step, fsl,tuning-start-tap and fsl,strobe-dll-delay-target from device tree. - Parse no-1-8-v property - Introduce esdhc_soc_data to indicate the flags and caps Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-02-04mmc: fsl_esdhc: add strobe and tuning entryPeng Fan1-8/+12
Add entries that will be used for tuning control. The whole layout not changed, just expand reserved3[84] and rename other reservedx in sequence. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-02-04mmc: fsl_esdhc: support i.MX8MPeng Fan1-4/+8
Support i.MX8M in fsl esdhc driver. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-28mmc: Add bcm2835 sdhost controllerAlexander Graf3-0/+994
The BCM2835 family of SoCs has 2 different SD controllers: One based on the SDHCI spec and a custom, home-grown one. This patch implements a driver for the latter based on the Linux driver. This is needed so that we can make use of device trees that assume driver presence of both SD controllers. Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-26Merge git://git.denx.de/u-boot-spiTom Rini1-4/+4
2018-01-24mmc: Poll for broken card detection caseJun Nie2-0/+9
Poll for broken card detection case instead of return no card detected. Signed-off-by: Jun Nie <jun.nie@linaro.org>
2018-01-24mmc: fix to assign to correct clock value when clock is enablingJaehoon Chung1-1/+1
When clock is enabling, it's assigned to 0 as mmc->clock. Then it can't initialize any card. Fix to assign to correct clock value as mmc->cfg->f_min or f_max. Fixes: 9546eb92cb6 ("mmc: fix the wrong disabling clock") Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Tested-by: Guillaume GARDET <guillaume.gardet@free.fr> Tested-by: Anand Moon <linux.amoon@gmail.com> Tested-by: Stephen Warren <swarren@nvidia.com>
2018-01-24wait_bit: use wait_for_bit_le32 and remove wait_for_bitÁlvaro Fernández Rojas1-4/+4
wait_for_bit callers use the 32 bit LE version Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-22mmc: fsl_esdhc: Fix i.MX53 eSDHCv3 clockBenoît Thébaudeau1-1/+6
Commit 4f425280fa71 ("mmc: fsl_esdhc: Allow all supported prescaler values") made it possible to set SYSCTL.SDCLKFS to 0 in SDR mode on i.MX, thus bypassing the SD clock frequency prescaler, in order to be able to get higher SD clock frequencies in some contexts. However, that commit missed the fact that this value is illegal on the eSDHCv3 instance of the i.MX53. This seems to be the only exception on i.MX, this value being legal even for the eSDHCv2 instances of the i.MX53. Fix this issue by changing the minimum prescaler value for the single instance of the i.MX53 eSDHCv3 controller. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-22mmc: fix the wrong disabling clockJaehoon Chung1-5/+7
When power is off, clock is not disabling. Because it's passed to 1, mmc->clock should be set to f_min value. Some drivers can't initialize the eMMC/SD card with current status. This patch is to fix the disabling clock value to 0. Fixes: 2e7410d76ad1 ("mmc: disable the mmc clock during power off") Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Tested-by: Guillaume GARDET <guillaume.gardet@free.fr> Tested-by: Anand Moon <linux.amoon@gmail.com>