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2018-06-15mmc: zynq: Fix tuning_loop_counter type in arasan_sdhci_execute_tuning()Michal Simek1-1/+1
Code around tuning_loop_counter variable expects to go below zero. That's why this variable can't use unsigned type. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-06-15mmc: sdhci: Fix MMC HS200 tuning command failuresSiva Durga Prasad Paladugu1-4/+4
This patch fixes the mmc tuning command failures when tuning pattern data needs to read back for comparision against the expected bit pattern. Reported-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Tested-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-06-02Merge branch 'master' of git://git.denx.de/u-boot-shTom Rini1-0/+1
2018-06-01Merge tag 'xilinx-for-v2018.07-2' of git://www.denx.de/git/u-boot-microblazeTom Rini2-24/+32
Xilinx changes for v2018.07 second pull zynqmp: - Show reset reason - Remove emulation platform - Update pmufw version - Simplify mmc bootmode - Remove dc2 useless configuration file - Cleanup mini config - Defconfig syncup - zcu100, zcu104 and zcu111 dts fixes xilinx: - Use live-tree functions in some drivers - Add support for Avnet Minized and Antminer S9 fpga: - Add secure bitstream loading support mmc: - Add hs200 mode support usb xhci: - Header fix
2018-06-01mmc: renesas-sdhi: Add R8A77990 E3 compatibleMarek Vasut1-0/+1
Add new compatible to the Uniphier SD driver for R8A77990 E3 SoC. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-05-31mmc: zynqmp: Add HS200 modes support for ZynqMPSiva Durga Prasad Paladugu1-8/+17
This patch adds HS200 suuport for ZynqMP and enables the same for ZC1751 DC1 board which has eMMC on it. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-31mmc: sdhci: Update sdhci_send_command() to handle HS200Siva Durga Prasad Paladugu1-3/+6
This patch updates sdhci_send_command() to handle MMC HS200 tuning command. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-31mmc: zynq: Use live-tree functionsMichal Simek1-13/+9
Use live-tree functions. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-29mmc: ftsdc010_mci: Sync compatible with DT mmc nodeRick Chen1-1/+1
The compatible string of ftsdc010_mci.c is different from the mmc driver in Linux Kernel. Modify it for consistency. Signed-off-by: Rick Chen <rick@andestech.com> Signed-off-by: Rick Chen <rickchen36@gmail.com> Cc: Greentime Hu <green.hu@gmail.com>
2018-05-26mmc: stm32_sdmmc2: Fix stm32_sdmmc2_start_cmd()Patrice Chotard1-2/+2
SDMMC_CMD_CPSMEN bit is wrongly check and set in SDMMC_ARG register instead of SDMMC_CMD register. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-05-24Merge tag 'signed-rpi-next' of git://github.com/agraf/u-bootTom Rini1-218/+47
Patch queue for rpi - 2018-05-24 Some minor fixes for the Raspberry Pi: - Fix SD writes on new sdhost controller - Sanitize default load addresses, allowing for better payload placement
2018-05-23Convert CONFIG_SUPPORT_EMMC_RPMB to KconfigAlex Kiernan1-0/+7
Convert CONFIG_SUPPORT_EMMC_RPMB to Kconfig. Split the command handling from the underlying support and expose this through CMD_MMC_RPMB. Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
2018-05-23mmc: Unirqify bcm2835_sdhost and fix writesAlexander Graf1-218/+47
The bcm2835 sdhost driver has a problem with "write multiple" commands. It seems to boil down to the fact that the controller dislikes its FIFO to get drained at the end of a block when a write multiple blocks command is in flight. The easy fix is to simply get rid of all the IRQ driven logic and make the driver push as much data into the FIFO as it can. That way we never drain and we never run into the problem. Reported-by: Jan Leonhardt <jan@cyberdesigner.net> Signed-off-by: Alexander Graf <agraf@suse.de>
2018-05-14mmc: sdhci: Check that ops are definedRamon Fried1-2/+2
The check is necessary to avoid NULL pointer dereference. Signed-off-by: Ramon Fried <ramon.fried@gmail.com> Reviewed-by: Michal Simek <michal.simek@xilinx.com>
2018-05-13mmc: Improve tinificationMarek Vasut2-26/+59
Drop all the extra content from the MMC core, so that tiny MMC support is really tiny, no fancy anything. That means the tiny MMC support does only 1-bit transfers at default speed settings. Moreover, this patch drops duplicate instance of struct mmc mmc_static, which wasted about 360 bytes. Furthermore, since MMC tiny supports only one controller at all times, get rid of mallocating the ext csd backup and replace it with static array. All in all, this patch saves ~4 kiB of bloat from the MMC core, which on platforms with severe limitations can be beneficial. Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> [trini: Fixup checkpatch.pl style warnings] Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-11mmc: zynq_sdhci: Add support for SD3.0Siva Durga Prasad Paladugu1-5/+226
This patch adds support of SD3.0 for ZynqMP. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11mmc: sdhci: Read capabilities register1 and update host capsSiva Durga Prasad Paladugu1-1/+27
This patch reads the capabilities register1 and update the host caps accordingly for mmc layer usage. This patch mainly reads for UHS capabilities inorder to support SD3.0. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11mmc: sdhci: Invoke platform specific tuning and delay routinesSiva Durga Prasad Paladugu1-0/+24
This patch adds support to invoke any platform specific tuning and delay routines if available. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11mmc: sdhci: Handle execute tuning command in sdhci_send_commandSiva Durga Prasad Paladugu1-2/+6
This patch upadted sdhci_send_command to handle execute tuning command. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11mmc: sdhci: Add support for disabling clockSiva Durga Prasad Paladugu1-0/+3
This patch adds support to disable clock if clk_disable was set and then enable or set clock if the clock was changed or clock was disabled when clock needs to be enabled. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11mmc: Changed the datatype of the variable to handle 64-bit archVipul Kumar2-3/+3
This patch changed the datatype of variable "start" from uint to ulong to work properly on 64-bit machines as well. Also the return type of get_timer() function is ulong. Signed-off-by: Vipul Kumar <vipul.kumar@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-08dm: mmc: socfpga: call dwmci_probe()Patrick Bruenn1-1/+1
On a socfpga_cyclone5 based board the SD card, was never powered up. For other dw_mmc based SoCs dwmci_probe() is called in the platform specific probe(). It seems this call is missing for socfpga_dw_mmc. With this change DWMCI_PWREN is set by dmwci_init(). Signed-off-by: Patrick Bruenn <p.bruenn@beckhoff.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-05-08mmc: Kconfig: add the MMC_TRACE config in KconfigJaehoon Chung1-0/+8
Add the MMC_TRACE config in Kconfig. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-05-08mmc: add the debug message in mmc_set_clockJaehoon Chung1-0/+2
Add the debug message for checking the mmc clock status. It's helpful to debug the controlling clock. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-05-08mmc: add the MMC_CLK_ENABLE/DISABLE macro in mmc.hJaehoon Chung3-10/+12
mmc_set_clock() function has the disable argument as bool type. When mmc_set_clock is called, it might be passed to "true" or "false". But it's too confusion whether clock is enabled or disabled with only "true" and "false". To prevent the confusion, replace to MMC_CLK_ENABLE/DISABLE macro from true/false. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-05-07SPDX: Convert all of our single license tags to Linux Kernel styleTom Rini51-103/+51
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-02mmc: zynq_sdhci: use correct quirk if CONFIG_ZYNQ_HISPD_BROKEN is definedHannes Schmelzer1-1/+1
The 'SDHCI_QUIRK_NO_HISPD_BIT' is used wrong here. The purpose of this quirk is to tell the sdhci-driver that the IP-core doesn't have a "high- speed-enable" bit in its registers. With this commit we change this to the correct quirk: SDHCI_QUIRK_BROKEN_HISPD_MODE Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
2018-05-02mmc: sdhci: add SDHCI_QUIRK_BROKEN_HISPD_MODEHannes Schmelzer1-1/+7
Some IP-core implementations of the SDHCI have different troubles on the silicon where they are placed. On ZYNQ platform for example Xilinx doesn't accept the hold timing of an eMMC chip which operates in High-Speed mode and must be forced to operate in non high-speed mode. To get rid of this "SDHCI_QUIRK_BROKEN_HISPD_MODE" is introduced. For more details about this refer to the Xilinx answer-recor #59999 https://www.xilinx.com/support/answers/59999.html This commit: - doesn't set HISPD bit on the host-conroller - reflects this fact within the host-controller capabilities Upon this the layer above (mmc-driver) can setup the card correctly. Otherwise the MMC card will be switched into high-speed mode and causes possible timing violation on the host-controller side. Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at> Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
2018-05-02mmc: fix return value check conditionPeng Fan1-1/+1
sd_read_ssr returns 0, means no error. Fixes: 5b2e72f32721484("mmc: read ssr only if MMC write support is enabled") Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Cc: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-04-30Merge git://git.denx.de/u-boot-sunxiTom Rini1-15/+20
2018-04-27Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTRTom Rini9-17/+0
We have a large number of places where while we historically referenced gd in the code we no longer do, as well as cases where the code added that line "just in case" during development and never dropped it. Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-25sunxi: improve throughput in the sunxi_mmc driverPhilipp Tomsich1-11/+16
Throughput tests have shown the sunxi_mmc driver to take over 10s to read 10MB from a fast eMMC device due to excessive delays in polling loops. This commit restructures the main polling loops to use get_timer(...) to determine whether a (millisecond) timeout has expired. We choose not to use the wait_bit function, as we don't need interruptability with ctrl-c and have at least one case where two bits (one for an error condition and another one for completion) need to be read and using wait_bit would have not added to the clarity. The observed speedup in testing on a A31 is greater than 10x (e.g. a 10MB write decreases from 9.302s to 0.884s). Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Tested-by: Mylène Josserand <mylene.josserand@bootlin.com> Acked-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2018-04-23mmc: Staticize sd_select_bus_widthMarek Vasut1-1/+1
Staticize the function since it's only used in mmc.c . Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Cc: Tom Rini <trini@konsulko.com>
2018-04-23Merge git://git.denx.de/u-boot-uniphierTom Rini3-22/+52
2018-04-24mmc: uniphier-sd: skip clock set-up for SPLMasahiro Yamada1-0/+4
The size of SPL is hitting the limit (64KB) for uniphier_v7_defconfig. When booting from SD/eMMC, obviously its clock has been properly set up by the boot ROM. Acutually, no need to re-initialize the clock in SPL. Using a clock driver would generalize the SoC specific code, but solving the memory footprint problem would win. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-24mmc: tmio: move clk_enable() to each driver's probe functionMasahiro Yamada3-22/+48
I need to differentiate the clock handling for uniphier-sd. Move it to each driver's probe function from the tmio common code so that renesas-sdhi will not be affected. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-23mmc: avoid division by zero in meson_mmc_config_clockHeinrich Schuchardt1-0/+3
The Odroid C2 fails to read from mmc with U-Boot v2018.03. The change avoids a division by zero. The fix was suggested by Jaehoon in https://lists.denx.de/pipermail/u-boot/2018-January/318577.html Reported-by: Vagrant Cascadian <vagrant@debian.org> Suggested-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Tested-by: Vagrant Cascadian <vagrant@debian.org>
2018-04-23sunxi: mmc: Fix phase delaysStefan Mavrodiev1-4/+4
U-boot driver for sunxi-mmc uses PLL6, unlike linux kernel where PLL5 is used, with clock rates respectively 600MHz and 768MHz. Thus there are different phase degree steps - 24 for the kernel and 30 for u-boot. In the kernel driver the phase is set 90 deg for output and 120 for sample. Dividing by 30 will result values 3 and 4. Those are the values set in the u-boot driver. However, the condition defining delays is wrong. MMC core driver requests clock of 52MHz, sunxi-driver sets clock of 50MHz, but phase is set 30 deg for output and 120 deg for sample. Apparently this works for most cards. On A20-SOM204-EVB-eMMC there is eMMC card (KLMAG2GEND) which complains about it. Maybe there is other boards with similar problem? So the fix is to match delays for both u-boot and kernel. Signed-off-by: Stefan Mavrodiev <stefan@olimex.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-04-21mmc: sh_mmcif: Add Kconfig entryMarek Vasut1-0/+6
Add Kconfig entry for SH MMCIF driver. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Jaehoon Chung <jh80.chung@samsung.com>
2018-04-21mmc: sh_mmcif: Add DM and DT probing supportMarek Vasut1-13/+152
Add MMC DM and DT probing support into the SH MMCIF driver. This patch abstracts out the common bits of the send command and set ios functions, so they can be used both by DM and non DM setups and adds the DM probe support. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Jaehoon Chung <jh80.chung@samsung.com>
2018-04-17mmc: mv_sdhci: zero out sdhci_host structureMatt Pelland1-1/+1
The mv_sdhci driver was not zeroing the sdhci_host structure it allocates causing random access violations in parts of the mmc core where the "ops" member pointers are checked and called if not NULL. Signed-off-by: Matt Pelland <mpelland@starry.com> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
2018-04-14mmc: tmio: Rename Matsushita to TMIOMarek Vasut6-422/+422
Synchronize the naming with Linux, call the common code TMIO. No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-11mmc: renesas-sdhi: Wait after reconfiguring pinsMarek Vasut1-0/+3
The IP requires some time to recuperate after the IO pin properties were changed. Add a delay to assure this. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-11mmc: matsushita-common: Add missing elseMarek Vasut1-1/+1
Fix minor rebase omission, the else was missing which triggered two accesses to the register on 64bit variant of the IP. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-11mmc: matsushita-common: Wait for command completionMarek Vasut2-0/+3
Make sure to wait for the command to complete altogether, including the trailing 8 clock cycles. This prevents the driver for accidentally writing the CMD register too fast before the previous command fully completed. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-11mmc: matsushita-common: Correctly set mode in 16bitMarek Vasut1-2/+0
The HOST_MODE register must be set to 0 when the IP is operated in 16bit mode, otherwise 16bit access to the data FIFO may fail. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-11mmc: matsushita-common: Special case only select registers in 16bitMarek Vasut1-1/+3
There are only a few registerse used in the 16bit mode which are 32bit internally. Special-case only those in the IO accessors and always write both halves. Any other register access is protected from accidentally overwriting neighboring register. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-11mmc: renesas-sdhi: Add Renesas SDR104/HS200 tuning supportMarek Vasut1-2/+290
Add code for PHY tuning required for SDR104/HS200 support on Renesas RCar. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-11mmc: matsushita-common: Export register access functionsMarek Vasut2-2/+6
Export the matsu_sd_{read,write}l() common register access functions, so that they can be used by other drivers sharing the common code. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-11mmc: matsushita-common: Properly handle pin voltage configurationMarek Vasut2-9/+46
Factor out the regulator handling into set_ios and add support for selecting pin configuration based on the voltage to support UHS modes. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
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