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2017-09-18rockchip: sdhci: update reg map for of-platdataKever Yang1-1/+1
After Simon's patch, the dtoc can work with 64bit address, so we need to fix reg number for it. Depend on Simon's patch set: https://patchwork.ozlabs.org/cover/807266/ Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-09-18rockchip: sdhci: Convert to livetreePhilipp Tomsich1-2/+1
Update the Rockchip SDHCI wrapper to support a live device tree. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Version-changes: 2 - use the dev_read_addr_ptr function in rockchip_sdhci.c
2017-09-18rockchip: mmc: convert to livetreePhilipp Tomsich1-1/+1
Update the Rockchip-specific wrapper for the Designware driver to support a live device tree. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Version-changes: 2 - use the dev_read_addr_ptr function in rockchip_dw_mmc.c
2017-09-12dma: import linux/dma-direction.h to consolidate enum dma_data_directionMasahiro Yamada1-1/+1
Import include/linux/dma-direction.h from Linux 4.13-rc7 and delete duplicated definitions of enum dma_data_direction. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2017-09-01mmc: sunxi: Only update timing mode bit when enabling new timing modeChen-Yu Tsai1-1/+1
When enabling the new mmc timing mode, we inadvertently clear all the remaining bits in the new timing mode register. The bits cleared include a default phase delay on the output clock. The BSP kernel states that the default values are supposed to be used. Clearing them results in decreased performance or transfer errors on some boards. Fixes: de9b1771c3b6 ("mmc: sunxi: Support new mode") Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2017-08-28mmc: sunxi: fix legacy MMC initialisationMaxime Ripard1-1/+1
The driver-model rework changed, among other things, the way the private data were moved around. It now uses the private field in the struct mmc. However, the mmc_create argument was changed in the process to always pass the array we used to have to store our private structures. The basically means that all the MMC driver instances will now have the private data of the first instance, which obviously doesn't work very well. Pass the proper pointer to mmc_create. Fixes: 034e226bc77e ("dm: mmc: sunxi: Pass private data around explicitly") Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Tested-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2017-08-28mmc: sunxi: Support new modeMaxime Ripard2-3/+28
Almost all of the newer Allwinner SoCs have a new operating mode for the eMMC clocks that needs to be enabled in both the clock and the MMC controller. Details about that mode are sparse, and the name itself (new mode vs old mode) doesn't give much details, but it seems that the it changes the sampling of the MMC clock. One side effect is also that it divides the parent clock rate by 2. Add support for it through a Kconfig option. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2017-08-18mmc: Support generic PCI SD host controllerBin Meng1-6/+1
This changes pci_mmc driver to use PCI_CLASS_SYSTEM_SDHCI instead of individual vendor id & device id pair to support generic PCI SD host controller. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2017-08-17cmd: mmc: add mmc partconf read capabilityAngelo Dureghello1-4/+13
This patch allows to show the EXT_CSD[179] partition_config register info, just by specifying the dev param: U-Boot> mmc partconf 0 EXT_CSD[179], PARTITION_CONFIG: BOOT_ACK: 0x0 BOOT_PARTITION_ENABLE: 0x0 PARTITION_ACCESS: 0x0 Signed-off-by: Angelo Dureghello <angelo@sysam.it> Signed-off-by: Anatolij Gustschin <agust@denx.de>
2017-08-17dm: mmc: Drop CONFIG_DM_MMC_OPSSimon Glass7-54/+28
All boards which use DM_MMC have now been converted to use DM_MMC_OPS. Drop the option and good riddance. Signed-off-by: Simon Glass <sjg@chromium.org>
2017-08-17dm: mmc: Correct Kconfig condition for SPL_DM_MMC_OPSSimon Glass1-1/+1
This should depend on SPL_DM_MMC, not SPL_DM. For it and update the only affected board's defconfig. Signed-off-by: Simon Glass <sjg@chromium.org>
2017-08-17dm: imx: cm_fx6: Enable more driver model supportSimon Glass1-1/+1
Enable driver model for MMC (including BLK), SATA and USB. Note that USB does not yet work correctly since the nodes are disabled. Hopefully this can be resolved by the maintainer. Signed-off-by: Simon Glass <sjg@chromium.org>
2017-08-17dm: mmc: fsl_esdhc: Update to support MMC operationsSimon Glass1-5/+64
This driver does not currently support CONFIG_DM_MMC_OPS. Update it to fully convert it to driver model. Signed-off-by: Simon Glass <sjg@chromium.org>
2017-08-17dm: mmc: fsl_esdhc: Update to support livetreeSimon Glass1-9/+7
Update this driver to support a live device tree. Signed-off-by: Simon Glass <sjg@chromium.org>
2017-08-17dm: mmc: fsl_esdhc: Drop mmc_init() call from fsl_esdhc_init()Simon Glass1-7/+7
We want to use fsl_esdhc_init() with driver model. Move the mmc_init() out of this function so that we can use it for our common init. Signed-off-by: Simon Glass <sjg@chromium.org>
2017-08-17dm: mmc: fsl_esdhc: Set up platform dataSimon Glass1-22/+39
With driver model we want to store the mmc and configuration structure in platform data. Set up structure up and use it for non-DM as well. Signed-off-by: Simon Glass <sjg@chromium.org>
2017-08-17dm: mmc: fsl_esdhc: Detect init failureSimon Glass1-3/+6
Since esdhc_init_common() can fail it should return an error code. Update this and also adjust the timeout mechanism to use get_timer(), which is a more common approach. Signed-off-by: Simon Glass <sjg@chromium.org>
2017-08-17dm: mmc: fsl_esdhc: Detect reset failureSimon Glass1-7/+15
Since esdhc_reset() can fail it should return an error code. Update this and also adjust the timeout mechanism to use get_timer(), which is a more common approach. Signed-off-by: Simon Glass <sjg@chromium.org>
2017-08-17dm: mmc: fsl_esdhc: Set up common versions of operationsSimon Glass1-11/+36
Driver model wants to use the core functions in this file but accesses the driver-private data in a different way. Move the code into new 'common' functions and set up stubs to call these. Also sort the operations into alphabetical order for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
2017-08-17dm: mmc: fsl_esdhc: Pass private data to internal functionsSimon Glass1-14/+11
With driver model we will not use mmc->priv to access driver-private data. To accomodate this, update internal functions so that we can pass the private data directly. This will allow the caller to obtain it as it prefers. Signed-off-by: Simon Glass <sjg@chromium.org>
2017-08-17mmc: gen_atmel_mci: Fix wrong arguments used of bind()Wenyou.Yang@microchip.com1-22/+42
The bind() method is called before the device is probed and so the device has no private data, should use the platform data, and set up a new struct to hold the mmc and cfg members. Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-17mmc: sd_sdhi: Enable clock using clock frameworkMarek Vasut1-0/+15
Since we now have clock driver for the RCar Gen3 , add support for enabling the clock into the SH SDHI driver to prevent hacks in the board files. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-08-17mmc: sh_sdhi: Fix the ACMD handlingMarek Vasut1-48/+55
The command handling in this driver is awful, esp. because the driver depends on command numbers to determine whether this is APPCMD or not. Also, handling of command RSP response types is totally wrong. This patch at least plucks out some of the custom command encoding and fixes the APPCMD handling. The RSP handling still needs work, yet that might not be needed as it turns out the uniphier-sd.c driver is in much better shape and supports the same IP, so we might be able to just drop this driver in favor of the uniphier one. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-08-17mmc: sh_sdhi: Add DM and DT probing supportMarek Vasut1-20/+145
Add MMC DM and DT probing support into the SH SDHI driver. This patch abstracts out the common bits of the send command and set ios functions, so they can be used both by DM and non DM setups and adds the DM probe support. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-08-17mmc: uniphier-sd: Fix long response processingMarek Vasut1-7/+7
The long response entry 0..3 LSByte comes from the next response register MSByte, not from the next response register LSByte. Fix this to make the driver report correct values in response 136 . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-08-09mmc: fsl_esdhc: not always setting esdhc fdt status to okayYang Li1-2/+0
We shouldn't always change the status to okay. There could be situations that the esdhc is intentionally disabled in the device tree. Signed-off-by: Li Yang <leoyang.li@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-08-09driver: mmc: fsl_esdhc: Fix compiling warningYork Sun1-0/+2
Commit 4483b7eb added variable vqmmc_dev but only uses it under CONFIG_DM_REGULATOR. Add the same macro to variable declaration to get rid of compiling warning. Signed-off-by: York Sun <york.sun@nxp.com>
2017-08-01Merge git://git.denx.de/u-boot-x86Tom Rini1-26/+60
2017-08-01x86: Convert MMC to driver modelSimon Glass1-26/+60
Convert the pci_mmc driver over to driver model and migrate all x86 boards that use it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: remove DM_MMC from edison_defconfig] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2017-08-01dm: mmc: sunxi: Add support for driver modelSimon Glass1-0/+133
Add a driver-model version of this driver which mostly uses the existing code. The old code can be removed once all boards are switched over. Signed-off-by: Simon Glass <sjg@chromium.org>
2017-08-01dm: mmc: sunxi: Drop mmc_clk_io_on()Simon Glass1-24/+18
This function has #ifdefs in it which we want to avoid for driver model. Instead we should use different compatible strings and the .data field. It also uses the MMC device number which is not available in driver model except through aliases. Move the function's into its caller so that the driver-model version can do things its own way. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-08-01dm: mmc: sunxi: Pass private data around explicitlySimon Glass1-29/+42
At present the driver-private data is obtained in various functions by various means. With driver model this is provided automatically. Without driver model it comes from a C array declared at the top of the file. Adjust internal functions so that they are passed the private data as a parameter, allowing the caller to obtain it using either means. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-08-01dm: mmc: sunxi: Rename mmchost to privSimon Glass1-63/+62
Use the driver-model naming convention for this structure. It is data private to the driver so the local variable should be called 'priv'. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-08-01dm: mmc: sunxi: Rename struct sunxi_mmc_host to sunxi_mmc_privSimon Glass1-14/+14
Use the driver-model naming convention for this structure. It is data private to the driver. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-08-01dm: mmc: Allow disabling driver model in SPLSimon Glass7-33/+54
At present if U-Boot proper uses driver model for MMC, then SPL has to also. While this is desirable, it places a significant barrier to moving to driver model in some cases. For example, with a space-constrained SPL it may be necessary to enable CONFIG_SPL_OF_PLATDATA which involves adjusting some drivers. Add new SPL versions of the options for DM_MMC, DM_MMC_OPS and BLK. By default these follow their non-SPL versions, but this can be changed by boards which need it. Signed-off-by: Simon Glass <sjg@chromium.org>
2017-07-28dm: tegra: mmc: Convert to livetreeSimon Glass1-10/+7
Update the tegra mmc driver to support a live device tree. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-on: Beaver, Jetson-TK1 Tested-by: Stephen Warren <swarren@nvidia.com>
2017-07-19mmc: cadence: use fdt32_t for DT property value to fix sparse warningMasahiro Yamada1-1/+1
DTB is encoded in big endian. When we retrieve property values, we need to use fdt32_to_cpu (aka be32_to_cpu) for endian conversion. This is a bit error-prone, but sparse is useful to detect endian mismatch. We need to use (fdt32_t *) instead of (u32 *) for a pointer of a property value. Otherwise sparse warns "cast to restricted __be32". Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2017-07-19mmc: rpmb: update size format for write_counterKever Yang1-1/+1
According to MMC spec, the write_counter is 4-byte length, use 'int' instead of 'long' type for the 'long' is not 4-byte in 64 bit CPU. Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2017-07-12imx: reorganize IMX code as other SOCsStefano Babic1-1/+1
Change is consistent with other SOCs and it is in preparation for adding SOMs. SOC's related files are moved from cpu/ to mach-imx/<SOC>. This change is also coherent with the structure in kernel. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@nxp.com> CC: Akshay Bhat <akshaybhat@timesys.com> CC: Ken Lin <Ken.Lin@advantech.com.tw> CC: Marek Vasut <marek.vasut@gmail.com> CC: Heiko Schocher <hs@denx.de> CC: "Sébastien Szymanski" <sebastien.szymanski@armadeus.com> CC: Christian Gmeiner <christian.gmeiner@gmail.com> CC: Stefan Roese <sr@denx.de> CC: Patrick Bruenn <p.bruenn@beckhoff.com> CC: Troy Kisky <troy.kisky@boundarydevices.com> CC: Nikita Kiryanov <nikita@compulab.co.il> CC: Otavio Salvador <otavio@ossystems.com.br> CC: "Eric Bénard" <eric@eukrea.com> CC: Jagan Teki <jagan@amarulasolutions.com> CC: Ye Li <ye.li@nxp.com> CC: Peng Fan <peng.fan@nxp.com> CC: Adrian Alonso <adrian.alonso@nxp.com> CC: Alison Wang <b18965@freescale.com> CC: Tim Harvey <tharvey@gateworks.com> CC: Martin Donnelly <martin.donnelly@ge.com> CC: Marcin Niestroj <m.niestroj@grinn-global.com> CC: Lukasz Majewski <lukma@denx.de> CC: Adam Ford <aford173@gmail.com> CC: "Albert ARIBAUD (3ADEV)" <albert.aribaud@3adev.fr> CC: Boris Brezillon <boris.brezillon@free-electrons.com> CC: Soeren Moch <smoch@web.de> CC: Richard Hu <richard.hu@technexion.com> CC: Wig Cheng <wig.cheng@technexion.com> CC: Vanessa Maegima <vanessa.maegima@nxp.com> CC: Max Krummenacher <max.krummenacher@toradex.com> CC: Stefan Agner <stefan.agner@toradex.com> CC: Markus Niebel <Markus.Niebel@tq-group.com> CC: Breno Lima <breno.lima@nxp.com> CC: Francesco Montefoschi <francesco.montefoschi@udoo.org> CC: Jaehoon Chung <jh80.chung@samsung.com> CC: Scott Wood <oss@buserror.net> CC: Joe Hershberger <joe.hershberger@ni.com> CC: Anatolij Gustschin <agust@denx.de> CC: Simon Glass <sjg@chromium.org> CC: "Andrew F. Davis" <afd@ti.com> CC: "Łukasz Majewski" <l.majewski@samsung.com> CC: Patrice Chotard <patrice.chotard@st.com> CC: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> CC: Hans de Goede <hdegoede@redhat.com> CC: Masahiro Yamada <yamada.masahiro@socionext.com> CC: Stephen Warren <swarren@nvidia.com> CC: Andre Przywara <andre.przywara@arm.com> CC: "Álvaro Fernández Rojas" <noltari@gmail.com> CC: York Sun <york.sun@nxp.com> CC: Xiaoliang Yang <xiaoliang.yang@nxp.com> CC: Chen-Yu Tsai <wens@csie.org> CC: George McCollister <george.mccollister@gmail.com> CC: Sven Ebenfeld <sven.ebenfeld@gmail.com> CC: Filip Brozovic <fbrozovic@gmail.com> CC: Petr Kulhavy <brain@jikos.cz> CC: Eric Nelson <eric@nelint.com> CC: Bai Ping <ping.bai@nxp.com> CC: Anson Huang <Anson.Huang@nxp.com> CC: Sanchayan Maity <maitysanchayan@gmail.com> CC: Lokesh Vutla <lokeshvutla@ti.com> CC: Patrick Delaunay <patrick.delaunay@st.com> CC: Gary Bisson <gary.bisson@boundarydevices.com> CC: Alexander Graf <agraf@suse.de> CC: u-boot@lists.denx.de Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2017-07-12mmc: fsl_esdhc: drop CONFIG_SYS_FSL_ESDHC_FORCE_VSELECTPeng Fan1-4/+0
CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT is not the correct method to set I/O to 1.8. To boards that does not support vqmmc-supply, use vs18_enable in fsl_esdhc_cfg. If regulator is supported, use fixed 1.8V regulator for vqmmc-supply. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Cc: York Sun <york.sun@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
2017-07-12dm: mmc: fsl_esdhc: handle vqmmc supplyPeng Fan1-0/+25
Handle vqmmc supply. Some boards have a fixed I/O voltage at 1.8V for emmc, so the usdhc also needs to be configured as 1.8V by setting VSELECT bit. The vs18_enable is the one that used to checking whether setting VSELECT or not in the driver. So if vqmmc supply is 1.8V, set vs18_enable, the driver will set VSELECT. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Cc: York Sun <york.sun@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2017-07-12mmc: fsl_esdhc: introduce vs18_enable for 1.8V fix I/OPeng Fan1-0/+9
When using eMMC with 1.8V I/O, the VSELECT bit need to be set in the USDHC controller when init. This patch adds a parameter "vs18_enable" in fsl_esdhc_cfg structure and priv data, so each controller can have different settings. We could not use CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT, it has problem that it will apply to all USDHC controllers and it only set the 1.8V at init phase. So if user does not select to the eMMC device, the voltage on the I/O pins are not correct. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Cc: York Sun <york.sun@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
2017-07-11Merge branch 'master' of git://git.denx.de/u-boot-rockchipTom Rini2-16/+12
2017-07-11Revert "mmc: dw_mmc: rockchip: select proper card clock"Kever Yang1-2/+2
The origin patch get rockchip dwmmc by name 'ciu', which lead to the SPL not able to remove 'clock-names' node in dts. I'm not saying this is not correct, but I would prefer to handle this in dts or clock driver to save memory for SPL. For example the rk3288 SPL size has out of memory if not enable BACK_TO_BROM option, there are many other SoCs has less internal memory than rk3288. This reverts commit 480a9b834c661fc88217f50bdf780192c3018d66. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11rockchip: dwmmc: use max-frequency when OF_PLATDATA enabledKever Yang1-1/+2
Since the 'clock-freq-min-max' is deprecated, we use max-frequency for all rockchip SoC dwmmc controller. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11rockchip: mmc: dm: convert fdt_get to dev_readPhilipp Tomsich2-13/+8
With the new dev_read functions available, we can convert the rockchip architecture-specific drivers and common drivers used by these devices over to the dev_read family of calls. This covers the dw_mmc and sdhci wrapper drivers for Rockchip. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-07-10driver: mmc: update debug infoJorge Ramirez-Ortiz1-1/+1
This driver is used in another board; remove board information from the driver debug log. Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-27Merge git://git.denx.de/u-boot-x86Tom Rini1-60/+26
2017-06-27Merge git://www.denx.de/git/u-boot-imxTom Rini1-25/+28
Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: include/configs/imx6qdl_icore_rqs.h include/configs/imx6ul_geam.h include/configs/imx6ul_isiot.h
2017-06-27Revert "x86: Convert MMC to driver model"Bin Meng1-60/+26
This reverts commit ddb3ac3c716f56cead695444e65a7ba7b0946555. With MMC converted to driver model, SCSI driver is broken due to zero address access at (ops->read) in block_dread() function. The fix (SCSI driver converted to DM) is ready in u-boot-dm branch, but it is too late for this relese to get that in. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
generated by cgit v1.1 at 2024-07-13 09:24:33 +0000