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path: root/drivers/mmc/zynq_sdhci.c
AgeCommit message (Expand)AuthorFilesLines
2021-08-26mmc: zynq_sdhci: Use set_control_reg from sdhci.cAshok Reddy Soma1-20/+1
2021-08-26mmc: zynq_sdhci: Wait till sd card detect state is stableT Karthik Reddy1-0/+19
2021-08-26mmc: zynq_sdhci: Move setting tapdelay code to driverAshok Reddy Soma1-1/+107
2021-08-26mmc: zynq_sdhci: Add xilinx_pm_request() method to set tapdelaysAshok Reddy Soma1-14/+59
2021-08-06mmc: zynq_sdhci: Return errors from arasan_sdhci_set_tapdelayAshok Reddy Soma1-5/+18
2021-07-26mmc: zynq_sdhci: Make variables/structure staticMichal Simek1-6/+10
2021-07-26mmc: zynq_sdhci: Fix kernel doc warningsMichal Simek1-12/+12
2021-07-26mmc: zynq_sdhci: Split set_tapdelay function to in and outAshok Reddy Soma1-2/+8
2021-07-26mmc: zynq_sdhci: Use Mask writes for Tap delaysAshok Reddy Soma1-27/+31
2021-07-26mmc: zynq_sdhci: Allow configuring zero Tap valuesAshok Reddy Soma1-12/+4
2021-07-26mmc: zynq_sdhci: Resolve uninitialized return valueAshok Reddy Soma1-12/+8
2021-02-23clk: zynq: Add dummy clock enable functionMichal Simek1-1/+1
2020-12-13dm: treewide: Rename ofdata_to_platdata() to of_to_plat()Simon Glass1-2/+2
2020-12-13dm: treewide: Rename dev_get_platdata() to dev_get_plat()Simon Glass1-2/+2
2020-12-13dm: treewide: Rename 'platdata' variables to just 'plat'Simon Glass1-1/+1
2020-12-13dm: treewide: Rename auto_alloc_size members to be shorterSimon Glass1-2/+2
2020-10-29mmc: zynq_sdhci: Extend UHS timings till hs200Ashok Reddy Soma1-1/+1
2020-10-27mmc: zynq_sdhci: Add clock phase delays for VersalAshok Reddy Soma1-4/+156
2020-10-27mmc: zynq_sdhci: Set tapdelays based on clk phase delaysAshok Reddy Soma1-5/+123
2020-10-27mmc: zynq_sdhci: Read clock phase delays from dtMichal Simek1-0/+85
2020-10-27mmc: zynq_sdhci: Move macro to the topMichal Simek1-2/+2
2020-10-27mmc: Define timing macro'sAshok Reddy Soma1-13/+11
2020-10-27Revert "mmc: zynq: parse dt when probing"Ashok Reddy Soma1-0/+5
2020-09-23mmc: zynq: Fix incorrect indentationMichal Simek1-1/+1
2020-08-20mmc: zynq: Fix default value for xlnx,mio-bankMichal Simek1-1/+1
2020-08-20xilinx: Fix xlnx,mio_bank propertyMichal Simek1-1/+1
2020-06-24mmc: zynq_sdhci: Remove global pointerMichal Simek1-2/+0
2020-05-18common: Drop linux/delay.h from common headerSimon Glass1-0/+1
2020-05-18common: Drop log.h from common headerSimon Glass1-0/+1
2020-04-27mmc: zynq: parse dt when probingBenedikt Grassl1-9/+6
2020-03-09mmc: Merge SD_LEGACY and MMC_LEGACY bus modesFaiz Abbas1-1/+0
2020-02-05dm: core: Create a new header file for 'compat' featuresSimon Glass1-0/+1
2020-02-05dm: core: Require users of devres to include the headerSimon Glass1-0/+1
2019-10-08mmc: zynq_sdhci: Remove check for DM_MMC configSiva Durga Prasad Paladugu1-2/+2
2019-08-09mmc: zynq_sdhci: fix uninitialized pointer deref on probeMatwey V. Kornilov1-3/+4
2019-07-17mmc: sdhci: Add support for HOST_CONTROL2 and setting UHS timingsFaiz Abbas1-36/+9
2019-01-24mmc: zynq: Remove unused pwrseq variableMichal Simek1-1/+0
2018-06-15mmc: zynq: Fix tuning_loop_counter type in arasan_sdhci_execute_tuning()Michal Simek1-1/+1
2018-05-31mmc: zynqmp: Add HS200 modes support for ZynqMPSiva Durga Prasad Paladugu1-8/+17
2018-05-31mmc: zynq: Use live-tree functionsMichal Simek1-13/+9
2018-05-11mmc: zynq_sdhci: Add support for SD3.0Siva Durga Prasad Paladugu1-5/+226
2018-05-07SPDX: Convert all of our single license tags to Linux Kernel styleTom Rini1-2/+1
2018-05-02mmc: zynq_sdhci: use correct quirk if CONFIG_ZYNQ_HISPD_BROKEN is definedHannes Schmelzer1-1/+1
2018-03-05libfdt: move headers to <linux/libfdt.h> and <linux/libfdt_env.h>Masahiro Yamada1-1/+1
2018-03-01mmc: Added Kconfig support for CONFIG_ZYNQ_SDHCI_MIN_FREQVipul Kumar1-4/+0
2017-06-01dm: core: Replace of_offset with accessor (part 2)Simon Glass1-1/+1
2017-06-01dm: Rename dev_addr..() functionsSimon Glass1-1/+1
2017-02-17mmc: zynq: Add fdt max-frequency supportStefan Herbrechtsmeier1-1/+8
2017-02-17mmc: zynq: Determine base clock frequency via clock frameworkStefan Herbrechtsmeier1-2/+24
2017-01-23mmc: sdhci: Distinguish between base clock and maximum peripheral frequencyStefan Herbrechtsmeier1-1/+3
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